Datasheet FDC6303N Datasheet (Fairchild)

Page 1
FDC6303N Digital FET, Dual N-Channel
General Description Features
August 1997
These dual N-Channel logic level enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for digital transistors in load switching applications. Since bias resistors are not required this one N-Channel FET can replace several digital transistors with different bias resistors like the IMHxA series.
SOT-23
SuperSOTTM-6
Mark: .303
SuperSOTTM-8
25 V, 0.68 A continuous, 2 A Peak.
R
= 0.6 Ω @ V
DS(ON)
R
= 0.45 Ω @ VGS= 4.5 V.
DS(ON)
= 2.7 V
GS
Very low level gate drive requirements allowing direct operation in 3V circuits. V
GS(th)
< 1.5 V.
Gate-Source Zener for ESD ruggedness. >6kV Human Body Model
Replace multiple NPN digital transistors (IMHxA series) with one DMOS FET.
SO-8
SOT-223
4
5
6
SOIC-16
3
2
1
Absolute Maximum Ratings T
= 25°C unless otherwise noted
A
V
DSS
V
GSS
I
D
Drain-Source Voltage 25 V Gate-Source Voltage 8 V Drain Current - Continuous 0.68 A
- Pulsed 2
P
D
Maximum Power Dissipation (Note 1a) 0.9 W
(Note 1b) 0.7 TJ,T ESD Electrostatic Discharge Rating MIL-STD-883D
Operating and Storage Temperature Range -55 to 150 °C
STG
6.0 kV
Human Body Model (100pf / 1500 Ohm)
THERMAL CHARACTERISTICS
R
JA
θ
R
JC
θ
© 1997 Fairchild Semiconductor Corporation
Thermal Resistance, Junction-to-Ambient (Note 1a) 140 °C/W
Thermal Resistance, Junction-to-Case (Note 1) 60 °C/W
FDC6303N Rev.C
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DMOS Electrical Characteristics (T
= 25 OC unless otherwise noted )
A
Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS
BV
∆BV
I
DSS
DSS
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 25 V Breakdown Voltage Temp. Coefficient
/∆T
J
Zero Gate Voltage Drain Current
ID = 250 µA, Referenced to 25 o C VDS = 20 V, V
GS
= 0 V
26
1 µA
mV /o C
TJ = 55°C 10 µA
I
GSS
Gate - Body Leakage Current
VGS = 8 V, VDS= 0 V
100 nA
ON CHARACTERISTICS (Note 2)
∆V
V R
GS(th)
GS(th)
DS(ON)
Gate Threshold Voltage Temp.Coefficient
/∆T
J
ID = 250 µA, Referenced to 25 o C Gate Threshold Voltage VDS = VGS, ID = 250 µA 0.65 0.8 1.5 V Static Drain-Source On-Resistance
VGS = 4.5 V, ID = 0.5 A
TJ =125°C
-2.6
0.33 0.45
0.52 0.8
mV /o C
Ω
VGS = 2.7 V, ID = 0.2 A 0.44 0.6
I g
D(ON)
FS
On-State Drain Current
VGS = 2.7 V, VDS = 5 V Forward Transconductance VDS = 5 V, ID= 0.5 A 1.45 S
0.5 A
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance Output Capacitance 28 pF
VDS = 10 V, VGS = 0 V,
f = 1.0 MHz Reverse Transfer Capacitance 9 pF
50 pF
SWITCHING CHARACTERISTICS (Note 2)
t t t t Q Q Q
D(on)
r
D(off)
f
Turn - On Delay Time Turn - On Rise Time 8.5 18 ns
VDD = 6 V, ID = 0.5 A,
VGS = 4.5 V, R
GEN
= 50 Ω
Turn - Off Delay Time 17 30 ns Turn - Off Fall Time 13 25 ns
g
gs
gd
Total Gate Charge Gate-Source Charge 0.38 nC Gate-Drain Charge 0.45 nC
VDS = 5 V, ID = 0.5 A,
VGS = 4.5 V
3 6 ns
1.64 2.3 nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
V
SD
Notes:
1. R
JA
θ
design while R
Maximum Continuous Source Current 0.3 A Drain-Source Diode Forward Voltage
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
is determined by the user's board design. R
CA
θ
shown below for single device operation on FR-4 in still air.
JA
θ
VGS = 0 V, IS = 0.5 A (Note 2)
0.83 1.2 V
is guaranteed by
JC
θ
a. 140OC/W on a 0.125 in2 pad of
2oz copper.
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
b. 180OC/W on a 0.005 in2 of pad
of 2oz copper.
FDC6303N Rev.C
Page 3
Typical Electrical Characteristics
1.5
V = 4.5V
GS
3.5
1.2
0.9
0.6
0.3
D
I , DRAIN-SOURCE CURRENT (A)
3.0
2.7
0
0 0.5 1 1.5 2
2.5
2.0
1.5
V , DRAIN-SOURCE VOLTAGE (V)
DS
Figure 1. On-Region Characteristics.
1.6
I =0.5 A
D
V = 4.5 V
1.4
GS
1.2
1
DS(ON)
R , NORMALIZED
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50 -25 0 25 50 75 100 125 150 T , JUNCTION TEMPERATURE (°C)
J
2
V = 2.0V
GS
1.5
1
R DS(on) , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
0.5 0 0.2 0.4 0.6 0.8 1 1.2
2.5
2.7
3.0
I , DRAIN CURRENT (A)
D
3.5
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
2
1.6
1.2
0.8
0.4
DS(on)
0
R , ON-RESISTANCE (OHM)
1 1.5 2 2.5 3 3.5 4 4.5 5
V , GATE TO SOURCE VOLTAGE (V)
125°C
25°C
GS
4.5
ID= 0.5A
Figure 3. On-Resistance Variation
with Temperature.
1
V = 5.0V
DS
0.8
0.6
0.4
D
I , DRAIN CURRENT (A)
0.2
0
0 0.5 1 1.5 2 2.5
V , GATE TO SOURCE VOLTAGE (V)
GS
Figure 5. Transfer Characteristics.
T = -55°C
J
25°C
125°C
Figure 4. On Resistance Variation with
Gate-To- Source Voltage.
1
V = 0V
GS
0.1
0.01
0.001
S
I , REVERSE DRAIN CURRENT (A)
0.0001 0 0.2 0.4 0.6 0.8 1 1.2
T = 125°C
J
25°C
-55°C
V , BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 6. Body Diode Forward Voltage
Variation with Source Current and
Temperature.
FDC6303N Rev.C
Page 4
Typical Electrical And Thermal Characteristics
5
4
I = 0.5A
D
V = 5V
DS
15V
3
2
1
GS
V , GATE-SOURCE VOLTAGE (V)
0
0 0.4 0.8 1.2 1.6 2
Q , GATE CHARGE (nC)
g
Figure 7. Gate Charge Characteristics.
5
1
RDS(ON) LIMIT
0.3
0.1
D
I , DRAIN CURRENT (A)
0.03
0.01
V = 4.5V
GS
SINGLE PULSE
R = See note 1b
JA
θ
T = 25°C
A
0.1 0.2 0.5 1 2 5 10 20 40 V , DRAI N-SOURCE VOLTAGE (V)
DS
DC
10ms
100ms
1s
100µs
1ms
10V
150 100
50
20
f = 1 MHz
CAPACITANCE (pF)
V = 0V
10
GS
5
0.1 0.5 1 2 5 10 25 V , DRAIN TO SOURCE VOLTAGE (V)
DS
C
iss
C
oss
C
rss
Figure 8. Capacitance Characteristics.
5
4
3
2
POWER (W)
1
0
0.01 0.1 1 10 100 300 SINGLE PULSE TIME (SEC)
SINGLE PULSE
R =See note 1b
JA
θ
T = 25°C
A
Figure 9. Maximum Safe Operating Area.
1
D = 0.5
0.5
0.2
0.2
0.1
0.1
0.05
r(t), NORMALIZED EFFECTIVE
0.02
TRANSIENT THERMAL RESISTANCE
0.01
0.05
0.02
0.01 Single Pulse
0.0001 0.001 0.01 0.1 1 10 100 300
Figure 11. Transient Thermal Response Curve.
Note: Thermal characterization performed using the conditions described in note 1b.Transient thermal response will change depending on the circuit board design.
t , TIME (sec)
1
Figure 10. Single Pulse Maximum Power
Dissipation.
R (t) = r(t) * R
JA
θ
R = See Note 1b
JA
θ
P(pk)
t
1
t
2
T - T = P * R (t)
J
A
Duty Cycle, D = t / t
JA
θ
JA
θ
2
1
FDC6303N Rev.C
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TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOS EnSigna
TM
TM
FACT™ FACT Quiet Series™
STAR*POWER is used under license
FAST FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™
OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench
QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER
SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™
UltraFET
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Formative or In Design
First Production
Full Production
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or
effectiveness.
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. H4
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