Datasheet fdc6000nz Datasheet

Page 1
June 2004
FDC6000NZ
Dual N-Channel 2.5V Specified PowerTrench MOSFET
FDC6000NZ
This N-Channel 2.5V specified MOSFET is a rugged gate version of Fairchild's Semiconductor’s advanced PowerTrench process. It has been optimized for power management applications with a wide range of gate
Features
• 6.5 A, 20 V R
R
= 20 mΩ @ VGS = 4.5 V
DS(ON)
= 28 mΩ @ VGS = 2.5 V
DS(ON)
drive voltage (2.5V – 12V). Packaged in FLMP SSOT-6, the R
and thermal properties of the device are
DS(ON)
• ESD protection diode (note 3)
optimized for battery power management applications.
Applications
• High performance trench technology for extremely
DS(ON)
low R
• Battery management/Charger Application
• Load switch
S2
S2
S1
S1
G1
G1
SuperSOT-6
SuperSOT-6
TM
TM
FLMP
FLMP
S1
S1
S2
S2
G2
G2
MOSFET Maximum Ratings T
o
=25
C unless otherwise noted
A
• FLMP SSOT-6 package: Enhanced thermal
performance in industry-standard package size
Bottom Drain Contact
4
5
6
Bottom Drain Contact
3
2
1
Symbol Parameter Ratings Units
V
Drain-Source Voltage 20 V
DSS
V
Gate-Source Voltage
GSS
±12
ID Drain Current – Continuous (Note 1a) 7.3 A
– Pulsed 20
PD Power Dissipation for Dual Operation (Note 1a) 1.6 W
Power Dissipation for Single Operation (Note 1a) 1.8
TJ, T
STG
Operating and Storage Junction Temperature Range –55 to +150
(Note 1b)
1.2
V
°C
Thermal Characteristics
R
θJA
R
θJc
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a) 68
(Note 1a) 1
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
.0NZ FDC6000NZ 7’’ 8mm 3000 units
2004 Fairchild Semiconductor Corpora tion
FDC6000NZ Rev E1 (W)
°C/W
Page 2
Electrical Characteristics T
= 25°C unless otherwise noted
A
FDC6000NZ
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
Drain–Source Breakdown Voltage
DSS
∆BVDSS ∆T
J
I
Zero Gate Voltage Drain Current VDS = 16 V, VGS = 0 V 1
DSS
I
Gate–Body Leakage
GSS
Breakdown Voltage Temperature Coefficient
= 0 V, ID = 250 µA
V
GS
= 250 µA, Referenced to 25°C
I
D
= ±12 V, VDS = 0 V
V
GS
20 V
14
mV/°C
µA
± 10 µA
On Characteristics (Note 2)
V
Gate Threshold Voltage
GS(th)
∆VGS(th) ∆TJ
R
DS(on)
Gate Threshold Voltage Temperature Coefficient
Static Drain–Source
On–Resistance
= VGS, ID = 250 µA
V
DS
= 250 µA, Referenced to 25°C
I
D
V
= 4.5 V, ID = 6.5 A
GS
= 4.0 V, ID = 6.4 A
V
GS
= 3.1 V, ID = 6.3 A
V
GS
= 2.5 V, ID = 5.5 A
V
GS
V
= 4.5 V, ID = 6.5A, TJ=125°C
GS
gFS Forward Transconductance VDS = 5 V, ID = 6.5 A 30 S
0.6 0.9 1.5 V
–4
16.5
16.8
19.2
22.5
22.8
20 21 24 28 30
mV/°C
mΩ
Dynamic Characteristics
V
= 10 V, V
C
Input Capacitance
iss
C
Output Capacitance 210 pF
oss
C
Reverse Transfer Capacitance
rss
DS
f = 1.0 MHz
RG Gate Resistance VGS = 15 mV, f = 1.0 MHz 2.3
= 0 V,
GS
840 pF
100 pF
Ω
Switching Characteristics (Note 2)
= 10 V, ID = 1 A,
V
t
Turn–On Delay Time
d(on)
tr Turn–On Rise Time 15 27 ns
t
Turn–Off Delay Time 18 32 ns
d(off)
DD
= 4.5 V, R
V
GS
GEN
= 6 Ω
tf Turn–Off Fall Time
= 10 V, ID = 6.5 A,
V
Qg Total Gate Charge
Qgs Gate–Source Charge 1.5 nC
DS
V
GS
= 4.5 V
Qgd Gate–Drain Charge
10 20 ns
9 18 ns
8 11 nC
2.1 nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current 1.25 A
VSD Drain–Source Diode Forward Voltage VGS = 0 V, IS = 1.25A (Note 2) 0.7 1.2 V
FDC6000NZ RevE1 (W)
Page 3
FDC6000NZ
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Drain–Source Diode Characteristics and Maximum Ratings
trr Diode Reverse Recovery Time IF = 6.5 A, diF/dt = 100 A/µs 16 nS
Qrr Diode Reverse Recovery Charge 4.3 nC
NOTES:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
θJA
the
drain pins. R
is guaranteed by design while R
θJC
is determined by the user's board design.
θCA
a) 68°C/W when
mounted on a 1in2 pad of 2 oz copper (Single Operation).
b) 102°C/W when mounted
on a minimum pad of 2 oz copper (Single Operation).
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
4. Electrical characterization and datasheet limits was based on a single source configuration (pin 2 & 5 no connection).
FDC6000NZ RevE1 (W)
Page 4
Dimensional Outline and Pad Layout
FDC6000NZ
Bottom View
Recommended Landing Pattern
For Common Drain Configuration
Recommended Landing Pattern
For Standard Dual Configuration
Top View
FDC6000NZ RevE1 (W)
Page 5
Typical Characteristics
20
VGS = 4.5V
3.5V
15
10
, DRAIN CURRENT (A)
5
D
I
0
00.511.522.5
2.5V
3.0V
V
, DRAIN-SOURCE VOLTAGE (V)
DS
2.0V
1.8V
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
3
2.8
VGS = 1.8V
2.6
2.4
2.2
, NORMALIZED
DS(ON)
R
2
1.8
1.6
1.4
1.2
DRAIN-SOURCE ON-RESISTANCE
1
0.8
2.0V
2.5V
3.0V
0 5 10 15 20
I
, DRAIN CURRENT (A)
D
Drain Current and Gate Voltage.
3.5V
FDC6000NZ
4.5V
1.6 ID = 6.5A
= 4.5V
V
GS
1.4
1.2
, NORMALIZED
1
DS(ON)
R
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50 -25 0 25 50 75 100 125 150
T
, JUNCTION TEMPERATURE (oC)
J
Figure 3. On-Resistance Variation with
Temperature.
30
VDS = 5V
25
20
15
10
, DRAIN CURRENT (A)
D
I
5
0
11.522.5
V
, GATE TO SOURCE VOLTAGE (V)
GS
TA = -55oC
25oC
125oC
0.062
0.057
0.052
0.047
0.042
0.037
0.032
, ON-RESISTANCE (OHM)
0.027
0.022
DS(ON)
R
0.017
0.012
TA = 25oC
12345
, GATE TO SOURCE VOLTAGE (V)
V
GS
TA = 125oC
ID = 3.3 A
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
VGS = 0V
10
1
0.1
0.01
0.001
, REVERSE DRAIN CURRENT (A)
S
I
0.0001 0 0.2 0.4 0.6 0.8 1 1.2
TA = 125oC
25oC
-55oC
, BODY DIODE FORW ARD VOLTAGE (V)
V
SD
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDC6000NZ Rev E1(W)
Page 6
Typical Characteristics
FDC6000NZ
5
ID = 6.5A
4
3
2
1
, GATE-SOURCE VOLTAGE (V)
GS
V
0
0246810
Q
VDS = 5V
, GATE CHARGE (nC)
g
10V
15V
1200
1000
800
600
C
400
CAPACITANCE (pF)
200
0
0 5 10 15 20
OSS
C
RSS
C
ISS
, DRAIN TO SOURCE VOLTAGE (V)
V
DS
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
100
R
LIMIT
DS(ON)
10
100ms
1
VGS = 4.5V
, DRAIN CURRENT (A)
0.1
D
SINGLE PULSE
I
= 102oC/W
R
θJA
= 25oC
T
A
0.01
0.1 1 10 100
V
1s
10s
DC
, DRAIN-SOURCE VOLTAGE (V)
DS
10ms
100µs
1ms
50
40
30
20
10
P(pk), PEAK TRANSIENT POWER (W)
0
0.0001 0.001 0.01 0.1 1 10 100 10 00
, TIME (sec)
t
1
SINGLE PULSE R
V
= 102°C/W
θJA
T
= 25°C
A
f = 1MHz
= 0 V
GS
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
0.2
0.1
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
0.01
0.1
0.05
0.02
0.01
SINGLE PULSE
R
JA
θ
R
JA
θ
P(pk)
- TA = P * R
T
J
Duty Cycle, D = t
0.0001 0.001 0.01 0.1 1 10 100 1000
t
, TIME (sec)
1
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design.
(t) = r(t) * R
= 102 °C/W
t
1
t
2
JA
θ
(t)
JA
θ
/ t
1
2
FDC6000NZ Rev E1(W)
Page 7
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ ActiveArray™ Bottomless™
FPS™
CoolFET™ CROSSVOL T™ DOME™ EcoSPARK™ E2CMOS™ EnSigna™ FACT™ FACT Quiet Series™
Across the board. Around the world.™ The Power Franchise Programmable Active Droop™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE T O ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY , FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PA TENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAST FASTr™
LittleFET™
FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ I2C™ i-Lo™ ImpliedDisconnect™
ISOPLANAR™ MICROCOUPLER™
MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC
OPTOPLANAR™ P ACMAN™ POP™
Power247™ PowerSaver™ PowerTrench
QFET
QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ SILENT SWITCHER SMART ST ART™ SPM™ Stealth™
SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET
VCX™
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORA TION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
PRODUCT STA TUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Formative or In Design
First Production
Full Production
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or
effectiveness.
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I11
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