Datasheet FDC5612 Datasheet (Fairchild)

FDC5612

60V N-Channel PowerTrench® MOSFET

FDC5612

December 2004

General Description

This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers.

These MOSFET s feature faster switching and lower gate
charge than other MOSFETs with comparable R
specifications.

The result is a MOSFET that is easy and safer to drive
(even at very high frequencies), and DC/DC power supply

designs with higher overall efficiency .

DS(ON)

S

D

D

G

D

SuperSOT

TM

-6

Absolute Maximum Ratings

D

TA = 25°C unless otherwise noted

Features

•

4.3 A, 60 V. R

= 0.055 Ω @ VGS = 10 V

DS(ON)

R

= 0.064 Ω

DS(ON)

@ V

GS

= 6 V

• Low gate charge (12.5nC typical).

• Fast switching speed.

• High performance trench technology for extremely

low R

• SuperSOT

than standard SO-8); low profile (1mm thick).

.

DS(ON)

TM

-6 package: small footprint (72% smaller

1

2

3

6

5

4

Symbol Parameter Ratings Units

V

DSS

V

GSS

I

D

P

D

TJ, T

stg

Drain-Source Voltage 60 V
Gate-Source Voltage
Drain Current - Continuous
Drain Current - Pulsed 20
Power Dissipation for Single Operation

Operating and Storage Junction Temperature Range -55 to +150

(Note 1a)

(Note 1a)
(Note 1b)

20

±

4.3 A

1.6 W

0.8

Thermal Characteristics

R

JA

θ

R

JC

θ

Thermal Resistance, Junction-to- Ambient
Thermal Resistance, Junction-to- Case

(Note 1a)
(Note 1)

78
30

Package Outlines and Ordering Information

Device Marking Device Reel Size Tape Width Quantity

.562 FDC5612 7’’ 8mm 3000 units

©2004 Fairchild Semiconductor Corporation

V

C

°

C/W

°

C/W

°

FDC5612 Rev. C2

FDC5612

yp

)

Electrical Characteristics

TA = 25°C unless otherwise noted

Symbol Parameter Test Conditions Min T
Off Characteristics

BV

DSS

BV

∆

T

∆

I

DSS

I

GSSF

I

GSSR

On Characteristics

V

GS(th)

GS(th)

V

∆

T

∆

R

DS(on)

I

D(on)

g

FS

Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA60 V

DSS

Breakdown Voltage Temperature
Coefficient

J

ID = 250 µA, Referenced to 25°C58mV/

Zero Gate Voltage Drain Current VDS = 48 V, VGS = 0 V 1
Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V 100 nA
Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V -100 nA

(Note 2)

Gate Threshold Voltage VDS = VGS, ID = 250 µA22.24V
Gate Threshold Voltage

Temperature Coefficient

J

Static Drain-Source
On-Resistance

ID = 250 µA, Referenced to 25°C-5.5mV/

VGS = 10 V, ID = 4.3 A
V

= 10 V, ID = 4.3 A, TJ = 125°C

GS

V

= 6 V, ID = 4 A

GS

On-State Drain Current VGS = 10 V, VDS = 5 V 10 A
Forward Transconductance VDS = 10 V, ID = 4.3 A 14 S

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance 650 pF
Output Capacitance 80 pF

= 25 V, VGS = 0 V,

V

DS

f = 1.0 MHz

Reverse Transfer Capacitance

Max Units

0.055

0.042

0.094

0.072

0.064

0.048

35 pF

C

°

A

µ

C

°

Ω

(Note 2)

Switching Characteristics

t
t
t
t
Q
Q
Q

d(on)

r

d(off)

f

g

gs

gd

Turn-On Delay Time 11 20 ns
Turn-On Rise Time 8 18 ns
Turn-Off Delay Time 19 35 ns
Turn-Off Fall Time
Total Gate Charge 12.5 18 nC
Gate-Source Charge 2.4 nC
Gate-Drain Charge

V

= 30 V, ID = 1 A,

DD

V

= 10 V, R

GS

= 30 V, ID = 4.3 A,

V

DS

V

= 10 V

GS

GEN

= 6

Ω

615ns

2.6 nC

Drain-Source Diode Characteristics and Maximum Ratings

I

S

V

SD

Notes:

1. R

qJA

of the drain pins. R

a) 78°C/W when mounted on a 1.0 in2 pad of 2 oz. copper.
b) 156°C/W when mounted on a minimum pad.

2. Pulse Test: Pulse Width £ 300 ms, Duty Cycle £ 2.0%

Maximum Continuous Drain-Source Diode Forward Current 1.3 A
Drain-Source Diode Forward Voltage V

is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface

is guaranteed by design while R

qJC

is determined by the user's board design.

qCA

= 0 V, I

= 1.3 A

(Note 2

0.75 1.2 V

FDC5612 Rev. C2

T ypical Characteristics

C

FDC5612

20

VGS = 10V

6.0V

16

5.0V

12

8

4

, DRAIN-SOURCE CURRENT (A)

D

I

0

01234

4.5V

4.0V

, DRAIN-SOURCE VOLTAGE (V)

V

DS

3.5V

Figure 1. On-Region Characteristics.

2

ID = 4.3A

1.8

V

= 10V

GS

1.6

1.4

1.2

, NORMALIZED

1

DS(ON)

R

0.8

0.6

DRAIN-SOURCE ON-RESISTANCE

0.4

-50 -25 0 25 50 75 100 125 150

T

, JUNCTION TEMPERATURE (oC)

J

1.8

1.6
VGS = 4.0V

1.4

, NORMALIZED

1.2

DS(ON)

R

1

DRAIN-SOURCE ON-RESISTAN

0.8

048121620

4.5V

5.0V

6.0V

ID, DRAIN CURRENT (A)

8.0V
10V

Figure 2. On-Resistance Variation

with Drain Current and Gate Voltage.

0.14

0.12

0.1

0.08

0.06

, ON-RESISTANCE (OHM)

0.04

DS(ON)

R

0.02

0

246810

V

, GATE TO SOURCE VOLTAGE (V)

GS

TA = 125oC

TA = 25oC

ID = 2.2A

Figure 3. On-Resistance Variation

with Temperature.

20

VDS = 5V

16

12

8

, DRAIN CURRENT (A)

D

I

4

0

123456

, GATE TO SOURCE VOLTAGE (V)

V

GS

TA = -55oC

25oC

125oC

Figure 4. On-Resistance Variation

with Gate-to-Source Voltage.

100

VGS = 0V

10

1

0.1

0.01

0.001

, REVERSE DRAIN CURRENT (A)

S

I

0.0001
0 0.2 0.4 0.6 0.8 1 1.2

TA = 125oC

25oC

, BODY DIODE FORWARD VOLTAGE (V)

V

SD

-55oC

Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage

Variation with Source Current

and Temperature.

FDC5612 Rev. C2

Typical Characteristics

µ

1ms

P(pk)

SINGLE PULSE

0.01

0.02

0.05

0.1

0.2

D = 0.5

FDC5612

10

ID = 4.3A

8

6

4

2

, GATE-SOURCE VOLTAGE (V)

GS

V

0

0 2 4 6 8 10 12 14

, GATE CHARGE (nC)

Q

g

VDS = 10V

30V

20V

900
800
700

C

ISS

600
500
400
300

CAPACITANCE (pF)

200
100

0

0 10 20 30 40 50 60

V

C

OSS

C

RSS

, DRAIN TO SOURCE VOLTAGE (V)

DS

Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.

100

R

LIMIT

DS(ON)

10

10ms

1

, DRAIN CURRENT (A)

D

I

VGS = 10V

SINGLE PULSE

0.1
R

= 156oC/W

θ

JA

T

= 25oC

A

0.01

0.1 1 10 100

, DRAIN-SOURCE VOLTAGE (V)

V

DS

100ms

1s

10s

DC

10

SINGLE PULSE

8

R

6

4

2

P(pk), PEAK TRANSIENT POWER (W)

0

0.01 0.1 1 10 100 1000

t

, TIME (sec)

1

= 156°C/W

θ

JA

T

= 25°C

A

f = 1 MHz
V

= 0 V

GS

Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum

Power Dissipation.

1

R

(t) = r(t) * R

θ

JA

R

θ

JA

= 156oC/W

θ

JA

0.1

t

1

t

0.01

r(t), NORMALIZED EFFECTIVE

0.001

TRANSIENT THERMAL RESISTANCE

2

T

- TA = P * R

J

Duty Cycle, D = t

(t)

θ

JA

/ t

1

2

0.0001 0.001 0.01 0.1 1 10 100 1000

t

, TIME (sec)

1

Figure 11. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.

FDC5612 Rev. C2

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PRODUCT STA TUS DEFINITIONS
Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Formative or
In Design

First Production

Full Production

2. A critical component is any component of a life
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This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.

This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
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This datasheet contains final specifications. Fairchild
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any time without notice in order to improve design.

Obsolete

Not In Production

This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. I14