This P-Channel MOSFET has been produced using Fairchild
Semiconductor’s proprietary PowerTrench
deliver low
superior performance benefit in the applications.
Applications
Inverter
Power Supplies
November 2007
®
technology to
r
and optimized Bvdss capability to offer
DS(on)
FDC365P P-Channel PowerTrench
®
MOSFET
S
D
D
G
Pin 1
SuperSOT
MOSFET Maximum RatingsT
SymbolParameterRatingsUnits
V
DS
V
GS
I
D
P
D
, T
T
J
STG
Drain to Source Voltage-35V
Gate to Source Voltage±20V
-Continuous (Note 1a)-4.3
-Pulsed-20
Power Dissipation (Note 1a)1.6
Power Dissipation (Note 1b)0.8
Operating and Storage Junction Temperature Range-55 to +150°C
D
D
TM
-6
= 25°C unless otherwise noted
C
1
D
D
2
G
3
D
6
5
D
S
4
Thermal Characteristics
R
θJA
R
θJA
Thermal Resistance, Junction to Ambient (Note 1a)78
Thermal Resistance, Junction to Ambient (Note 1b)156
Drain to Source Breakdown VoltageID = -250µA, VGS = 0V-35V
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain CurrentVDS = -28V, V
Gate to Source Leakage CurrentVGS = ±20V, V
ID = -250µA, referenced to 25°C-26mV/°C
= 0V-1µA
GS
= 0V±100nA
DS
Gate to Source Threshold VoltageVGS = VDS, ID = -250µA-1-1.8-3V
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward TransconductanceVDS = -10V, ID = -4.2A8.7S
ID = -250µA, referenced to 25°C5.0mV/°C
VGS = -10V, ID = -4.2A 4555
VGS = -10V , ID = -4.2A, TJ = 125°C6990
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance105135pF
Reverse Transfer Capacitance5580pF
VDS = -20V, VGS = 0V,
f = 1MHz
530705pF
Gate Resistancef = 1MHz6.1Ω
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
Q
g
g
gs
gd
Turn-On Delay Time
Rise Time310ns
Turn-Off Delay Time1528ns
VDD = -20V, ID = -4.2A,
VGS = -10V, R
GEN
= 6Ω
713ns
Fall Time310ns
Total Gate Charge V
Total Gate Charge V
Gate to Source Charge1.7nC
= 0V to -10V
GS
= 0V to -5V 69nC
GS
VDD = -20V,
ID = -4.2A
1115nC
Gate to Drain “Miller” Charge2.2nC
mΩVGS = -4.5V, ID = -3.2A 7080
®
MOSFET
Drain-Source Diode Characteristics
V
SD
t
rr
Q
rr
Notes:
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
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Datasheet IdentificationProduct StatusDefinition
Advance InformationFormative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
This datasheet contains preliminary data; supplementary data will be pub-
PreliminaryFirst Production
lished at a later date. Fairchild Semiconductor reserves the right to make
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ued by Fairchild Semiconductor. The datasheet is printed for reference information only.