This N-Channel MOSFET is produced using Fairchild
Semiconductor‘s advanced Power Trench
been especially tailored to minimize the on-state resistance and
yet maintain superior switching performance.
May 2008
®
process that has
FDB3502 N-Channel Power Trench
Application
Synchronous rectifier
D
D
G
S
MOSFET Maximum RatingsT
SymbolParameterRatingsUnits
V
DS
V
GS
I
D
E
AS
P
D
, T
T
J
STG
Thermal Characteristics
Drain to Source Voltage75V
Gate to Source Voltage±20V
Drain Current -Continuous (Package limited) TC = 25°C 14
-Continuous (Silicon limited) T
-Continuous T
-Pulsed40
Single Pulse Avalanche Energy (Note 3)54mJ
Power Dissipation TC = 25°C41
Power Dissipation T
Operating and Storage Junction Temperature Range-55 to +150°C
TO-263A
FDB Series
= 25°C unless otherwise noted
C
= 25°C22
C
= 25°C (Note 1a)6
A
= 25°C (Note 1a)3.1
A
G
S
®
MOSFET
A
W
R
θJC
R
θJA
Thermal Resistance, Junction to Case3
Thermal Resistance, Junction to Ambient (Note 1a)40
Drain to Source Breakdown VoltageID = 250µA, VGS = 0V75V
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain CurrentV
Gate to Source Leakage CurrentVGS = ±20V, V
ID = 250µA, referenced to 25°C70mV/°C
= 0V, VDS = 60V, 1µA
GS
= 0V±100nA
DS
Gate to Source Threshold VoltageVGS = VDS, ID = 250µA2.53.84.5V
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward TransconductanceVDD = 10V, ID = 6A13S
ID = 250µA, referenced to 25°C-10mV/°C
VGS = 10V, ID = 6A 3747
VGS = 10V, ID = 6A, TJ = 125°C6380
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance75105pF
Reverse Transfer Capacitance3540pF
VDS = 40V, VGS = 0V,
f = 1MHz
615815pF
Gate Resistancef = 1MHz1.5Ω
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
g
gs
gd
Turn-On Delay Time
Rise Time310ns
Turn-Off Delay Time1322ns
VDD = 40V, ID = 6A,
VGS = 10V, R
GEN
= 6Ω
917ns
Fall Time310ns
Total Gate Charge at 10V
Gate to Source Charge4nC
Gate to Drain “Miller” Charge3nC
VDD = 40V
ID = 6A
1115nC
mΩ
®
MOSFET
Drain-Source Diode Characteristics
V
SD
t
rr
Q
rr
Notes:
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
1: R
θJA
R
θJC
a. 40°C/W when mounted on a 1 inb. 62.5°C/W when mounted on a minimum pad.
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global
subsidianries, and is not intended to be an exhaustive list of all such trademarks.
®
ACEx
Build it Now™
CorePLUS™
CorePOWER™
CROSSVOLT™
CTL™
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EcoSPARK
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APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE U NDER
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As used herein:
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(a) are intended for surgical implant into the body or (b)
support or sustain life, and (c) whose failure to perform when
properly used in accordance with instructions for use provided
2. A critical component in any component of a life support,
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in the labeling, can be reasonably expected to result in a
significant injury of the user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet IdentificationProduct StatusDefinition
Advance InformationFormative or In Design
This datasheet contains the design specifications for product development.
Specifications may change in any manner without notice.
This datasheet contains preliminary data; supplementary data will be pub-
PreliminaryFirst Production
lished at a later date. Fairchild Semiconductor reserves the right to make
changes at any time without notice to improve design.
This datasheet contains final specifications. Fairchild Semiconductor reserves
the right to make changes at any time without notice to improve the design.
This datasheet contains specifications on a product that is discontinued by
Fairchild Semiconductor. The datasheet is for reference information only.
www.fairchildsemi.com
Rev. I34
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