Datasheet FDH50N50, FDA50N50 Datasheet (Fairchild)

Page 1
查询FDA50N50供应商查询FDA50N50供应商
FDH50N50 / FDA50N50 500V N-Channel MOSFET
TM
UniFET
FDH50N50 / FDA50N50
500V N-Channel MOSFET
Features
• 48A, 500V, R
• Low gate charge ( typical 105 nC)
• Low C
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
( typical 45 pF)
rss
G
= 0.105Ω @VGS = 10 V
DS(on)
D
S
TO-247
FDH Series
Description
These N-Channel enhancement mode power field effect transis­tors are produced using Fairchild’s proprietary, planar stripe, DMOS technology.
This advanced technology has been especially tailored to mini­mize on-state resistance, provide superior switching perfor­mance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high effi­cient switched mode power supplies and active power factor correction.
D
!
!
"
"
"
"
!
!
"
" "
"
!
!
S
GSD
TO-3P
FDA Series
!
!
G
Absolute Maximum Ratings
Symbol Parameter FDH50N50/FDA50N50 Unit
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt P
D
T
J, TSTG
T
L
Drain-Source Voltage 500 V Drain Current - Continuous (TC = 25°C)
- Continuous (T Drain Current - Pulsed Gate-Source voltage ±20 V Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Power Dissipation (TC = 25°C)
- Derate above 25°C Operating and Storage Temperature Range -55 to +150 °C Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds
= 100°C)
C
(Note 1)
(Note 2)
(Note 1) (Note 1) (Note 3)
48
30.8 192 A
1868 mJ
48 A
62.5 mJ
4.5 V/ns
625
5
300 °C
Thermal Characteristics
Symbol Parameter Min. Max. Unit
R
θJC
R
θCS
R
θJA
Thermal Resistance, Junction-to-Case -- 0.2 °C/W Thermal Resistance, Case-to-Sink 0.24 -- °C/W Thermal Resistance, Junction-to-Ambient -- 40 °C/W
A A
W
W/°C
©2004 Fairchild Semiconductor Corporation
FDH50N50 / FDA50N50 Rev. A
1
www.fairchildsemi.com
Page 2
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
FDH50N50 FDH50N50 TO-247 - - 30 FDA50N50 FDA50N50 TO-3P - - 30
FDH50N50 / FDA50N50 500V N-Channel MOSFET
Electrical Characteristics
TC = 25°C unless otherwise noted
Symbol Parameter Conditions Min. Typ. Max Units
Off Characteristics
BV
DSS
∆BV / ∆T
I
DSS
I
GSSF
I
GSSR
On Characteristics
V
GS(th)
R
DS(on)
g
FS
Dynamic Characteristics
C
iss
C
oss
C
rss
C
oss
C
oss
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Drain-Source Diode Characteristics and Maximum Ratings
I
S
I
SM
V
SD
t
rr
Q
rr
Drain-Source Breakdown Voltage VGS = 0V, ID = 250µA 500 -- -- V Breakdown Voltage Temperature
DSS
Coefficient
J
Zero Gate Voltage Drain Current VDS = 500V, VGS = 0V
I
= 250µA, Referenced to 25°C--0.5--V/°C
D
V
= 400V, TC = 125°C
DS
--
--
--
--
25
250µAµA Gate-Body Leakage Current, Forward VGS = 20V, VDS = 0V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -20V, VDS = 0V -- -- -100 nA
Gate Threshold Voltage VDS = VGS, ID = 250µA3.0--5.0V Static Drain-Source
On-Resistance Forward Transconductance VDS = 40V, ID = 48A
Input Capacitance VDS = 25V, VGS = 0V, Output Capacitance -- 760 1000 pF
= 10V, ID = 24A -- 0.089 0.105 Ω
V
GS
(Note 4)
-- 20 -- S
-- 4979 6460 pF
f = 1.0MHz
Reverse Transfer Capacitance -- 50 65 pF Output Capacitance VDS = 400V, VGS = 0V, f = 1.0MHz -- 161 -- pF
eff. Effective Output Capacitance VDS = 0V to 400V, VGS = 0V -- 342 -- pF
Turn-On Delay Time VDD = 250V, ID = 48A
R
= 25Ω
Turn-On Rise Time -- 360 730 ns
G
-- 105 220 ns
Turn-Off Delay Time -- 225 460 ns Turn-Off Fall Time -- 230 470 ns Total Gate Charge VDS = 400V, ID = 48A
= 10V
V
Gate-Source Charge -- 33 -- nC
GS
Gate-Drain Charge -- 45 -- nC
(Note 4, 5)
-- 105 137 nC
(Note 4, 5)
Maximum Continuous Drain-Source Diode Forward Current -- -- 48 A Maximum Pulsed Drain-Source Diode Forward Current -- -- 192 A Drain-Source Diode Forward Voltage VGS = 0V, IS = 48A -- -- 1.4 V Reverse Recovery Time VGS = 0V, IS = 48A
/dt =100A/µs
dI
Reverse Recovery Charge -- 10 -- µC
F
(Note 4)
-- 580 -- ns
NOTES:
1. Repetitive Rating: Pulse width limited by maximum junction temperature
2. L = 1.46mH, I
3. ISD ≤ 48A, di/dt ≤ 200A/µs, VDD ≤ BV
4. Pulse Test: Pulse width ≤ 300µs, Duty Cycle ≤ 2%
5. Essentially Independent of Operating Temperature Typical Characteristics
= 48A, VDD = 50V, RG = 25Ω, Starting TJ = 25°C
AS
, Starting TJ = 25°C
DSS
FDH50N50 / FDA50N50 Rev. A
2
www.fairchildsemi.com
Page 3
Typ ical Perform ance Character istics
FDH50N50 / FDA50N50 500V N-Channel MOSFET
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics
V
2
10
1
10
0
10
, Drain Current [A]
D
I
-1
10
10
Top : 15.0 V 10 .0 V
8.0 V
7.0 V
6.5 V
6.0 V Bottom : 5.5 V
-1
GS
VDS, Drain-Source Voltage [V]
100
10
150oC
!
25oC
1
, Drain Current [A]
D
Notes :
1. 250
µ
s Pulse Test
2. T
= 25oC
!
0
10
C
1
10
I
0.1 45678910
!
VGS , Gate-Source Voltage [V]
-55oC
!
Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage
Drain Current and Gate Voltage Variation vs. Source Current
and Temperatue
0.4
0.3
],
Ω
[
0.2
DS(ON)
R
0.1
Drain-Source On-Resistance
0.0 0 25 50 75 100 125 150 175
VGS = 10V
ID, Drain Current [A]
VGS = 20V
Note : TJ = 25oC
160
120
80
40
, Reverse Drain Current [A]
DR
I
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
VSD , Source-Drain Voltage [V]
150oC
25oC
Notes :
1. V
2. 250
Notes :
1. V
2. 250
= 40V
DS
µ
s Pulse Test
= 0V
GS
µ
s Pulse Test
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
12,000
10,000
8,000
6,000
4,000
Capacitance [pF]
2,000
0
-1
10
FDH50N50 / FDA50N50 Rev. A
C
= Cgs + Cgd (Cds = shorted)
iss
C
= Cds + C
oss
C
= C
rss
C
C
oss
C
rss
0
10
1
10
VDS, Drain-Source Voltage [V]
12
gd
gd
10
VDS = 100V
VDS = 250V
VDS = 400V
8
iss
Notes :
1. V
= 0 V
GS
2. f = 1 MHz
2
10
6
4
, Gate-Source Voltage [V]
2
GS
V
0
0 20 40 60 80 100 120
Note : ID = 48A
QG, Total Gate Charge [nC]
3
www.fairchildsemi.com
Page 4
FDH50N50 / FDA50N50 500V N-Channel MOSFET
Typ ical Perform ance Character istics
(Continued)
Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation
vs. Temperature vs. Temperature
1.2
1.1
1.0
, (Normalized)
DSS
BV
0.9
Drain-Source Breakdown Voltage
0.8
-100 -50 0 50 100 150 200
TJ, Junction Temperature [oC]
Notes :
1. V
2. I
= 0 V
GS
= 250 µA
D
2.5
2.0
1.5
, (Normalized)
1.0
DS(ON)
R
0.5
Drain-Source On-Resistance
0.0
-100 -50 0 50 100 150 200
TJ, Junction Temperature [oC]
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
, Drain Current [A] I
D
3
10
2
10
1
10
0
10
-1
10
10
Notes :
1. T
= 25 oC
C
= 150 oC
2. T
J
3. Single Pulse
0
Operation in This Area is Limited by R
1
10
DS(on)
10 ms
DC
2
10
VDS, Drain-Source Voltage [V]
1 ms
100 us
10 us
50
40
30
20
, Drain Current [A]
D
I
10
3
10
0
25 50 75 100 125 150
TC, Case Temperature [oC]
Notes :
1. V
2. I
GS
= 24 A
D
= 10 V
Figure 11. Typical Drain Current Slope Figure 12. Typical Drain-Source Voltage
vs. Gate Resistance Slope vs. Gate Resistance
4,000
3,500
3,000
2,500
S]
µ
2,000
1,500
di/dt [A/
1,000
500
0
0 5 10 15 20 25 30 35 40 45 50
FDH50N50 / FDA50N50 Rev. A
di/dt(on)
di/dt(off)
RG, Gate resistance [Ω]
Notes :
1. V
2. V
3. I
D
4. T
= 400 V
DS
= 12 V
GS
= 25A
= 125oC
J
45
40
35
30
25
20
dv/dt [V/nS]
15
dv/dt(off)
10
5
0
0 5 10 15 20 25 30 35 40 45 50
dv/dt(on)
Notes :
1. V
2. V
3. I
4. T
= 400 V
DS
= 12 V
GS
= 25A
D
= 125oC
J
!
RG, Gate resistance [Ω]
4
www.fairchildsemi.com
Page 5
FDH50N50 / FDA50N50 500V N-Channel MOSFET
Typ ical Perform ance Character istics
(Continued)
Figure 13. Typical Switching Losses vs. Figure 14. Unclamped Inductive Switching
Gate Resistance Capability
1,000
800
J]
600
µ
400
Energy [
200
0
0 5 10 15 20 25 30 35 40 45 50
RG, Gate resistance [Ω]
Eoff
Eon
Notes :
1. V
2. V
3. I
4. T
= 400 V
DS
= 12 V
GS
= 25A
D
= 125oC
J
100
Starting TJ = 150oC
!
10
, Avalanche Current [A]
AS
I
1
0.01 0.1 1 10 100
Notes :
1. If R = 0 Ω tAV = (L)(IAS)/(1.3 Ra te d B V
2. If R ≠ 0
Ω
tAV = (L/R)In[ (IAS x R)/(1.3 Rated BV
Starting TJ = 25oC
tAV, Time In Av a l a n ch e [m s ]
Figure 15. Transient Thermal Resistance Curve
-1
D=0.5
10
0.2
0.1
0.05
-2
10
0.02
0.01
(t), Thermal Response
JC
θ
Z
single pulse
Notes :
1. Z
(t) = 0.2 oC/W Max.
θ
JC
2. Duty Factor, D=t
3. TJM - TC = PDM * Z
1/t2
(t)
θ
JC
- VDD)
DSS
- VDD)+1]
DSS
FDH50N50 / FDA50N50 Rev. A
-3
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
t1, Square Wave Pulse Duration [sec]
5
www.fairchildsemi.com
Page 6
Mechanical Dimensions
TO-247AD (FKS PKG CODE 001)
FDH50N50 / FDA50N50 500V N-Channel MOSFET
FDH50N50 / FDA50N50 Rev. A
Dimensions in Millimeters
6
www.fairchildsemi.com
Page 7
FDH50N50 / FDA50N50 500V N-Channel MOSFET
Mechanical Dimensions
15.60 ±0.20
13.60 ±0.20
ø3.20 ±0.10
13.90 ±0.20
2.00 ±0.20
3.00 ±0.20
1.00 ±0.20
9.60 ±0.20
(Continued)
TO-3P
3.80 ±0.20
12.76 ±0.20
19.90 ±0.20
3.50 ±0.20
23.40 ±0.20
16.50 ±0.30
18.70 ±0.20
4.80 ±0.20
+0.15
1.50
–0.05
1.40 ±0.20
5.45TYP
±0.30]
[5.45
5.45TYP
[5.45
±0.30]
0.60
+0.15 –0.05
FDH50N50 / FDA50N50 Rev. A
Dimensions in Millimeters
7
www.fairchildsemi.com
Page 8
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
A
CEx™ ActiveArray™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™ EcoSPARK™
2
E
CMOS™ EnSigna™ FACT™ FACT Quiet Series™
Across the board. Around the w or ld. ™ The Power Franchise
®
Programmable Active Droop™
®
FAST FASTr™ FPS™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ I2C™ i-Lo™ ImpliedDisconnect™
ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC
®
OPTOPLANAR™ PACMAN™ POP™
Power247™ PowerEdge™ PowerSaver™ PowerTrench QFET
®
®
QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ SILENT SWITCHER SMART START™ SPM™
Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET
®
UniFET™ VCX™
®
®
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUM E ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FDH50N50 / FDA50N50 500V N-Channel MOSFET
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Forma tive or In
Design
Preliminary First Production This datasheet contains preliminary data, and
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Obsolete Not In Production This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
8
FDH50N50 / FDA50N50 Rev. A
Rev. I14
www.fairchildsemi.com
Loading...