Page 1
PD 9.1615
PRELIMINARY
l Fully Isolated Package
l Easy to Use and Parallel
l Low On-Resistance
l Dynamic dv/dt Rating
l Fully Avalanche Rated
l Simple Drive Requirements
l Low Drain to Case Capacitance
l Low Internal Inductance
G
Description
Third Generation HEXFETs from International Rectifier
provide the designer with the best combination of fast
switching, ruggedized device design, low on-resistance
and cost-effectiveness.
The SOT-227 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 500 watts. The low thermal
resistance of the SOT-227 contribute to its wide acceptance
throughout the industry.
FA38SA50
HEXFET® Power MOSFET
D
S
V
R
DS(on)
SOT-227
= 500V
DSS
= 0.13Ω
ID = 38A
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 38
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 24 A
I
DM
PD @TC = 25°C Power Dissipation 500 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt 16 V/ns
T
J
T
STG
V
ISO
Pulsed Drain Current 150
Linear Derating Factor 4.0 W/°C
Gate-to-Source Voltage ± 20 V
Single Pulse Avalanche Energy 580 mJ
Avalanche Current 38 A
Repetitive Avalanche Energy 50 mJ
Operating Junction and -55 to + 150 °C
Storage Temperature Range
Insulation Withstand Voltage (AC-RMS) 2.5 kV
Mounting torque, M4 srew 1.3 N•m
Thermal Resistance
Parameter Typ. Max. Units
R
θ JC
R
θ CS
Junction-to-Case ––– 0.25
Case-to-Sink, Flat, Greased Surface 0.05 ––– °C/W
4/25/97
Page 2
FA38SA50
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆ V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage 500 ––– ––– V VGS = 0V, ID = 1.0mA
/∆ T
Breakdown Voltage Temp. Coefficient ––– 0.66 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance –– – ––– 0.13 Ω VGS = 10V, ID = 38A
Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
Forward Transconductance 23 ––– ––– S VDS = 25V, ID = 38A
Drain-to-Source Leakage Current
––– ––– 50
––– ––– 500 VDS = 400V, VGS = 0V, TJ = 125°C
Gate-to-Source Forward Leakage ––– –– – 200 V
Gate-to-Source Reverse Leakage ––– ––– -200
VDS = 500V, VGS = 0V
µA
= 20V
GS
nA
VGS = -20V
Total Gate Charge ––– 280 420 ID = 38A
Gate-to-Source Charge –– – 37 5 5 nC VDS = 400V
Gate-to-Drain ("Miller") Charge ––– 150 220 VGS = 10V, See Fig. 6 and 13
Turn-On Delay Time ––– 42 ––– VDD = 250V
Rise Time ––– 340 ––– ID = 38A
Turn-Off Delay Time ––– 200 ––– RG = 10Ω (Internal)
ns
Fall Time ––– 330 ––– RD = 8Ω, See Fig. 10
Input Capacitance ––– 6900 ––– VGS = 0V
Output Capacitance ––– 1600 ––– pF VDS = 25V
Reverse Transfer Capacitance ––– 580 ––– ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting T
RG = 25Ω , I
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 38A, VGS = 0V
Reverse Recovery Time ––– 830 1300 ns TJ = 25°C, IF = 38A
Reverse RecoveryCharge ––– 15 22 µC di/dt = 100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
I
SD
TJ ≤ 150°C
= 25°C, L = 0.80mH
J
= 38A. (See Figure 12)
AS
Pulse width ≤ 300µs; duty cycle ≤ 2%.
38
A
150
≤ 38A, di/dt ≤ 410A/µs, V
showing the
p-n junction diode.
DD
≤ V
(BR)DSS
,
Page 3
FA38SA50
1000
VG S
TO P 1 5 V
10V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
BOTTOM 4.5V
100
10
, Drain-to-Source Current (A)
D
I
1
1 10 100
V , Dra in-to-Source Voltag e (V )
DS
4.5V
20µs PULSE WIDTH
T = 25°C
C
A
1000
100
D
I , Drain-to-Source Current (A)
10
VGS
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.5V
4.5V
20µs PULSE WIDTH
°
T = 150 C
J
1 10 100
V , Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics
1000
3.0
I =
D
38A
100
10
D
I , Drain-to-Source Current (A)
1
4 5 6 7 8
°
T = 150 C
J
°
T = 25 C
J
V = 50V
DS
20µs PULSE WIDTH
V , Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
2.5
2.0
1.5
(Normalized)
1.0
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
T , Junction Temperature ( C)
J
Fig 4. Normalized On-Resistance
Vs. Temperature
V =
GS
°
10V
Page 4
FA38SA50
16000
14000
12000
10000
8000
6000
C, Capacitance (pF)
4000
2000
0
1 10 100
V
=
0V,
C
C
C
iss
oss
rss
f = 1MHz
+ C
+ C
C SHORTED
GS
C
=
iss gs gd , ds
C
=
rss gd
C
=
oss ds gd
C
C
C
V , Drain-to-Source Voltage (V)
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
20
I =
38A
D
16
12
8
4
GS
V , Gate-to-Source Voltage (V)
0
0 80 160 240 320 400
Q , Total Gate Charge (nC)
G
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
OPERATION IN THIS AREA LIMITED
BY R
V = 400V
DS
V = 250V
DS
V = 100V
DS
FOR TEST CIRCUIT
SEE FIGURE
DS(on)
13
100
T = 150 C
10
1
SD
I , Reverse Drain Current (A)
0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
°
J
°
T = 25 C
J
V ,Source-to-Drain Voltage (V)
SD
V = 0 V
GS
Fig 7. Typical Source-Drain Diode
Forward Voltage
100
10us
100us
10
D
I , Drain Current (A) I , Drain Current (A)
1ms
°
= 25 C
C
T T= 150 C
Single Pulse
1
1 10 100 1000 10000
°
J
V , Drain-to-Source Voltage (V)
DS
10ms
Fig 8. Maximum Safe Operating Area
Page 5
10V
V
FA38SA50
R
D.U.T.
D
V
DD
V
Q
G
Q
GS
Q
GD
R
G
DS
V
GS
G
10V
Pulse Width ≤ 1 µs
Charge
Duty Factor ≤ 0.1 %
Fig 9a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µ F
12V
.3µ F
D.U.T.
+
V
DS
-
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
3mA
I
G
Current Sampling Resistors
I
D
Fig 9b. Gate Charge Test Circuit
1
thJC
0.50
0.1
0.20
0.10
0.05
0.02
0.01
0.01
Thermal Response (Z )
0.001
0.00001 0.0001 0.001 0.01 0.1 1
SINGLE PULSE
(THERMAL RESPONSE)
t , Rectangular Pulse Duration (sec)
1
V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
P
DM
t
1
t
2
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
1 2
J DM thJC C
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Page 6
FA38SA50
15V
DRIVER
+
-
R
V
G
20V
DS
L
D.U.T
I
AS
Ω
0.01
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
1200
TOP
1000
800
V
DD
A
600
400
200
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150
Starting T , Junction Temperature ( C)
J
BOTTOM
I
17A
24A
38A
°
D
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Page 7
FA38SA50
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
• dv/dt controlled by R
• Driver same type as D.U.T.
controlled by Duty Factor "D"
• I
SD
• D.U.T. - Device Under Test
Period
-
D =
G
P.W.
Period
+
V
DD
VGS=10V
*
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. ISDWaveform
Body Diode Forward
Current
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
* V
= 5V for Logic Level Devices
GS
Fig 13. For N-Channel HEXFETS
di/dt
Diode Recovery
dv/dt
V
DD
I
SD
Page 8
FA38SA50
SOT-227 Package Details
38.30 ( 1.508 )
4
1
37.80 ( 1.488 )
-A-
30.20 ( 1.189 )
29.80 ( 1.173 )
4X
Tube
8.10 ( .319 )
7.70 ( .303 )
4.40 (.173 )
4.20 (.165 )
12.50 ( .492 )
7.50 ( .295 )
2.10 ( .082 )
1.90 ( .075 )
3
6.25 ( .246 )
2
15.00 ( .590 )
CHA M F ER
2.00 ( .079 ) X 45 7
25.70 ( 1.012 )
25.20 ( .992 )
-B-
R FULL
0.25 ( .010 ) M C A M B M
2.10 ( .082 )
1.90 ( .075 )
-C -
0.12 ( .005 )
LEAD ASSIGMENTS
C
E
G
E
IG B T
A1 K2
4
1
K1 A 2
HE X F RE D
3
2
SD
4
1
HEXFET
12.30 ( .484 )
11.80 ( .464 )
3
2
G S
QUANTITY PER TUBE IS 10
M4 SR EW AN D W AS H ER INC LU D ED
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http://www.irf.com/ Data and specifications subject to change without notice. 4/97