Datasheet FA3621F Datasheet (CALLM)

0~7˚

9.0

±0.3

0.10

±0.06

0.5

±0.1

0.2

±0.06

0.127

±0.05

1.45 max

7.0

112

36 25

48 37

13 24

9.0

±0.3

0.5

±0.2

7.0

7.8

8.0

FA3621F

CMOS IC

For Switching Power Supply Control

FA3621F

■ Description

FA3621F is a control IC for 6-channel DC-DC converter.
This IC can directly drive a Nch/Pch-MOSFET.
This IC is suitable to reduce converter size because it has
many functions in a small package LQFP-48.

■ Features

• 6-channel PWM control with MOSFET direct driving :
5-channel for Pch-MOSFET, 1channel for Nch-MOSFET

• Low input voltage: 4.5V to 20V

• ±1.5% high accuracy bandgap reference

• Low power consumption by means of CDMOS
Standby mode: 10µA(max.)
Operating mode: 6mA(max.)

• Soft start function for each channel

• ON/OFF function for each channel

• Timer latch for short protection

• Overheat protection

• Undervoltage lockout

• Wide range of operation frequency: 50kHz to 1MHz

• Package: LQFP-48(Thin and small)

■ Application

• VTR-camera, digital-steel-camera and portable equipment

■ Dimensions, mm

Á LQFP-48

1

FA3621F

■ Block diagram

VREF

FB1

IN1–

FB2

IN2–

FB3

IN3–
IN3+

FB4

IN4–
IN4+

FB5

IN5–
IN5+

4

17

16

15

14

13

10
11

7

9

8

18

20

19

Buffer

Error Amp.

CREF

VREG

5

1V

Bias

12

2.67V
Bias

UVLO

OHP

Over- heat protection

Drive

bias

Pch

driver

Pch

driver

Pch

driver

Pch

driver

Pch

driver

Hi

46
29

37

41

40

48
47

43

44

45

38

VCC1
VCC2

VDRV

OUT1

(OPEN)
DT1

DT2

OUT2

OUT3

OUT4

OUT5

FB6

IN6–

CP

24

21

Hi

6

TIMER
LATCH

OHP

ON/OFF

35 34

33

CNT1

CNT2

28

27

CNT3/4

CNT5

UVLO

CNT6

Soft start

32 31 30

CS1

CS2

CS3/4

25 26

CS5

CS6

Pch

driver

Nch

driver

OSC

23

CTI

CT2

1

RT

23

OUT6b

39

OUT6a

22

GND1

42

GND2

36

SYN

2

FA3621F

Pin Pin Description
No. symbol

1 RT Oscillator timing resistor
2 CT2 (Not connect any component)
3 CT1 Oscillator timing capacitor
4 VREF Reference voltage output
5 CREF Capacitor for reference voltage output
6 CP Timing capacitor for timer latch delay
7 FB4 Ch. 4 output of error amplifier
8 IN4+ Ch. 4 non-inverting input to error amplifier
9 IN4– Ch. 4 inverting input to error amplifier
10 IN3– Ch. 3 inverting input to error amplifier
11 IN3+ Ch. 3 non-inverting input to error amplifier
12 VREG Regulated voltage output
13 FB3 Ch. 3 output of error amplifier
14 IN2– Ch. 2 inverting input to error amplifier
15 FB2 Ch. 2 output of error amplifier
16 IN1– Ch. 1 inverting input to error amplifier
17 FB1 Ch. 1 output of error amplifier
18 FB5 Ch. 5 output of error amplifier
19 IN5+ Ch. 5 non-inverting input to error amplifier
20 IN5– Ch. 5 inverting input to error amplifier
21 IN6– Ch. 6 inverting input to error amplifier
22 GND1 Ground
23 OUT6b ON/OFF switch for ch.6 power supply
24 FB6 Ch. 6 output of error amplifier

Pin Pin Description
No. symbol

25 CS5 Soft start for Ch. 5
26 CS6 Soft start for Ch. 6
27 CNT6 Ch. 6 ON/OFF function
28 CNT5 Ch. 5 ON/OFF function
29 VCC2 Power supply for output stage
30 CS3/4 Soft start for Ch. 3 & Ch. 4
31 CS2 Soft start for Ch. 2
32 CS1 Soft start for Ch. 1
33 CNT3/4 Ch. 3 & Ch. 4 ON/OFF function
34 CNT2 Ch. 2 ON/OFF function
35 CNT1 Ch. 1 ON/OFF function
36 SYN (Connect to GND1/ GND2 terminal)
37 VDRV Bias for logic circuit of outputs
38 OUT5 Ch. 5 output (for Pch-MOSFET)
39 OUT6a Ch. 6 output (for Nch-MOSFET)
40 (OPEN) (Not connect any component)
41 OUT1 Ch. 1 output (for Pch-MOSFET)
42 GND2 Ground
43 OUT2 Ch. 2 output (for Pch-MOSFET)
44 OUT3 Ch. 3 output (for Pch-MOSFET)
45 OUT4 Ch. 4 output (for Pch-MOSFET)
46 VCC1 Power supply for control circuit
47 DT2 (Connect to DT1)
48 DT1 (Connect to DT2)

■ Absolute maximum ratings

Item Symbol Rating Unit

Power supply voltage VCC 20.0 V
Source peak current IOUT –200 mA
Sink peak current IOUT 200 mA
Output peak current of OUT6b IOUT6b –500 mA
Input voltage for analog input VANA –0.3 to +2.8 V
Input voltage for logic input VLOG –0.3 to +5.5 V
Total power dissipation * Pd 550 mW
Junction temperature TJ 125 °C
Ambient temperature TOP –20 to +85 °C
Storage temperature Tstg –40 to +125 °C

* Ta < 25°C

■ Recommended operating conditions

Item Symbol Min. Max. Unit

Power supply voltage VCC 4.5 18.0 V
Input voltage for logic input VLOG 0.0 5.25 V
Oscillation frequency fOSC 50 1000 kHz
Oscillator timing resistor RT 6.8 100 kΩ
Oscillator timing capacitor CT 68 1000 pF
CREF terminal by-pass capacitor CREF 0.01 µF
VREF terminal output current IREF –60 0 µA

3

FA3621F

■ Electrical characteristics (Ta=25°C, Vcc1=Vcc2=6V, CT=100pF, RT=18kΩ)

Reference voltage section

Item Symbol Test condition Min. Typ. Max. Unit

Output voltage VREF 0.985 1.00 1.015 V
Line regulation VRLIN VCC=4.5 to 18V 3 10 mV
Output voltage variation due to temperature change VRTa Ta=–20 to +85°C ±0.5 %

Regulated voltage section

Item Symbol Test condition Min. Typ. Max. Unit

Output voltage VREG 2.40 2.67 2.95 V

Oscillator section

Item Symbol Test condition Min. Typ. Max. Unit

Oscillation frequency fOSC RT=18kΩ, CT=100pF 414 460 506 kHz
Frequency variation due to supply voltage change fdV VCC=4.5 to 18V ±1 ±3%
Frequency variation due to temperature change fdT Ta=–20 to +25°C ±1.5 %

Ta=+25 to +85°C ±1.5

Error amplifier section

Item Symbol Test condition Min. Typ. Max. Unit

Input offset voltage VIOF 10 mV
Input common mode voltage range VICOM 0.2 1.7 V
Open-loop gain AVOL 70 75 dB
Unity-gain bandwidth fT 1.2 MHz
Output sink current IFBL VFB=1.0V 1.5 2.8 mA
Output source current IFBH VFB=0V –0.25 –0.15 mA

PWM control section

Item Symbol Test condition Min. Typ. Max. Unit

Maximum duty cycle Dmax 100 %

Soft-start circuit section 1 (CS1, CS2, CS3/4)

Item Symbol Test condition Min. Typ. Max. Unit

Input threshold voltage VCSO Duty cycle=0% 0.78 V

VCS100 Duty cycle=100% 1.38 V

Charge current ICS –7.5 –5.1 –2.5 µA

Soft-start circuit section 2 (CS5, CS6)

Item Symbol Test condition Min. Typ. Max. Unit

Input threshold voltage VCSO Duty cycle=0% 0.79 V

VCS100 Duty cycle=100% 1.40 V

Charge current ICS 0 µA

4

FA3621F

Short-circuit protection section

Item Symbol Test condition Min. Typ. Max. Unit

Threshold voltage at CP VCPTH 1.90 2.16 2.42 V
Charge current at CP ICP –3.45 –2.30 –1.15 µA
Threshold voltage at error amplifier output VFBTL 2.16 V

Overheat protection section

Item Symbol Test condition Min. Typ. Max. Unit

Operating temperature TOH 125 135 145 °C
Hysteresis width ∆TOH 45 50 55 °C

ON/OFF logic input section

Item Symbol Test condition Min. Typ. Max. Unit

Input voltage for ON mode VDH 1.0 5.25 V
Input voltage for OFF mode VDL 0 0.4 V

Output section 1 (OUT1)

Item Symbol Test condition Min. Typ. Max. Unit

L-level ON resistance RONL IO=10mA 6 10 Ω
H-level ON resistance RONH IO=–10mA 6 10 Ω
Rise time tr CLOAD=1000pF 30 50 ns
Fall time tf CLOAD=1000pF 45 70 ns

Output section 2 (OUT2, OUT3, OUT4, OUT5, OUT6a )

Item Symbol Test condition Min. Typ. Max. Unit

L-level ON resistance RONL IO=10mA 10 15 Ω
H-level ON resistance RONH IO=–10mA 10 15 Ω
Rise time tr CLOAD=1000pF 40 60 ns
Fall time tf CLOAD=1000pF 55 80 ns

Output section 3 (OUT6b )

Item Symbol Test condition Min. Typ. Max. Unit

ON resistance RON6b IO=–10mA 1 2 Ω

Overall device

Item Symbol Test condition Min. Typ. Max. Unit

Standby current ICCO 310µA
Operating-state supply current ICC Duty cycle=0%, RL= ∞ 46mA

5

FA3621F

]

]

■ Characteristic curves (Ta = 25°C)

Oscillation frequency (fOSC) vs. Oscillation frequency (fOSC) vs.
timing resistor resistance (R

1000

T) ambient temperature (Ta)

520

100

fosc [kHz]

10

C

T

=68pF

100pF

470pF

680pF

10

50

100

RT [kΩ]

500

480

460

fosc [kHz]

440

420

400

20

20

40

60

0

80 100

Ta [°C

Output duty cycle vs. CS terminal voltage (VCS) Output duty cycle vs. FB terminal voltage (VFB)

100

90

80
70

60
50
40
30

Output duty cycle [%]

20
10

0

0.5

0.6

0.7

0.8

0.9 1 1.1 1.2 1.3 1.4 1.5

VCS [V]

100

90
80
70
60

50
40
30

Output duty cycle [%]

20

10

0

0.5

0.6

0.7

0.8

0.9 1 1.1 1.2 1.3 1.4 1.5

VFB [V]

Reference voltage (VREF) vs ambient temperatare (Ta) Supply current (Icc) vs Supply voltage (Vcc)

20
18

16
14
12

10

Icc [mA]

8
6
4

2
0

0

Duty cycle=30%

Duty cycle=0%
Duty cycle=100%

5

10 15

Vcc [V]

VREF [V]

1.06

1.04

1.02

0.98

0.96

1

40

20

20

0

60

80 100

Ta [°C

6

20

FA3621F

]

H-level output voltage (VCC-VOH) vs. L-level output voltage(VOL) vs. output sink current (ISINK)
output source current (I

SOURCE) for OUT1 for OUT1

VCC– VOH [V]

2.2

1.8

1.6

1.4

1.2

0.8

0.6

0.4

0.2

2

1

0

0

50

100

150

200

ISOURCE [mA]

VOL [V]

2.2

1.8

1.6

1.4

1.2

0.8

0.6

0.4

0.2

2

1

0

0

50

100

ISINK [mA]

H-level output voltage (VCC-VOH) vs. L-level output voltage(VOL) vs.
output source current (I

3.5

3

2.5

SOURCE) for OUT2, 3, 4, 5, 6a output sink current (ISINK) for OUT2, 3, 4, 5, 6a

3.5

3

2.5

150

200

2

1.5

VOL [V]

2

1.5

VCC– VOH [V]

0.5

1

0

0

50

100

150

200

ISOURCE [mA]

0.5

1

0

0

50

100

150

200

ISINK [mA]

H-level output voltage (VCC-VOH) vs. Error amplifier voltage gain(Av) / phase(θ) vs. frequency(f)
output source current (I

1.4

1.2

1

0.8

VCC– VOH [V]

0.6

0.4

0.2

0

0

100 200

SOURCE) for OUT6b Condition: open loop

300

400

500

ISOURCE [mA

[deg]

V [dB]

A

180
160

140
120

100

– 20
– 40

– 60

80
60

40
20

0

10

100

Av

1K 10K

100K

1M 10M

ƒ [HZ]

7

FA3621F

■ Application circuit

Parts tolerances characteristics are not defined in the circuit design
sample shown above. When designing an actual circuit for a product,
you must determine parts tolerances and characteristics for safe and
economical operation.

8