Datasheet EN27C51290T, EN27C51290PI, EN27C51290P, EN27C51290JI, EN27C51290J Datasheet (EON)

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EN27C512
4800 Great America Parkway Ste 202 Tel: 408-235-8680 Santa Clara, CA. 95054 Fax: 408-235-8685
1
FEATURES
•
Fast Read Access Time
:
-45, -55, -70, and -90ns
•
•
Programming Voltage +12.75V
•
QuikRite
TM
Programming Algorithm
•
Typical programming time 20µs
•
Low Power CMOS Operation
• 1µ
A Standby (Typical)
•
30mA Operation (Max.)
•
CMOS- and TTL-Compatible I/O
•
High-Reliability CMOS Technology
•
Latch-Up Immunity to 100mA from -1V to V
CC
+ 1V
•
Two-Line Control (
OE&CE)
•
Standard Product Identification Code
•
JEDEC Standard Pinout
•
28-pin PDIP
•
32-pin PLCC
•
28-pin TSOP (Type 1)
•
Commercial and Industrial Temperature Ranges
GENERAL DESCRIPTION
The EN27C512 is a low-power 512Kbit, 5V-only one-time-programmable (OTP) read-only memory (EPROM). Organized into 64K words with 8 bits per word, it features QuikRite
TM
single-
address location programm ing, typically at 20µs per byte. Any byte can be accessed in less than 45ns, eliminating the need for W AIT states in high-performance microprocessor systems. The EN27C512 has separate Output Enable (
OE ) and Chip Enable ( CE ) controls which eliminate
bus contention issues.
FIGURE 1. PDIP
Pin Name Function
A0-A15 Addresses DQ0-DQ7 Outputs
CE Chip Enable OE Output Enable
NC No Connect
EN27C512 512KBIT EPROM (64K x 8)
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EN27C512
4800 Great America Parkway Ste 202 Tel: 408-235-8680 Santa Clara, CA. 95054 Fax: 408-235-8685
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FIGURE 2. TSOP
FIGURE 3. PLCC
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EN27C512
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FIGURE 4. BLOCK DIAGRAM
FUNCTIONAL DESCRIPTION THE QUIKRITETM PROGRAMMING OF THE EN27C512
When the EN27C512 is delivered, the chip has all 512K bits in the “ONE”, or HIGH state. “ZEROs” are loaded into the EN27C512 through the procedure of programming.
The programming mode is entered when 12.75 ± 0.25V is applied to the
OE/V
PP
pin and
CEis at V
IL
. For programming, the data to be programmed is applied with 8 bits in parallel to
the data pins.
The QUIKRITE
TM
programming flowchart in Figure 5 shows Eon’s interactive programming algorithm. The interactive algorithm reduces programming time by using 20 µs to 100 µs programming pulses and giving each address only as many pulses as is necessary in order to
reliably program the data. After each pulse is applied to a given address, the data in that address is verified. If the data is not verified, additional pulses are given until it is verified or until the maximum number of pulses is reached. This process is repeated while sequencing through each address of the EN27C512. This part of the programming algorithm is done at V
CC
= 6.25V to assure that each EPROM bit is programmed to a sufficiently high threshold
voltage. This ensures that all bits have sufficient margin. After the final address is completed, the entire EPROM memory is read at V
CC
= 5.25 ± 0.25V to verify the entire memory.
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EN27C512
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PROGRAM INHIBIT MODE
Programming of multiple EN27C512 in parallel with different data is also easily accomplished by using the Program Inhibit Mode. Except for
CE, all like inputs of the parallel EN27C512
may be common. A TTL low-level program pulse applied to an EN27C512
CEinput with
OE/V
PP
= 12.75 ± 0.25V will program that EN27C512. A high-level CEinput inhibits the
other EN27C512 from being programmed.
PROGRAM VERIFY MODE
Verification should be performed on the programmed bits to determining that they were correctly programmed. The verification should be performed with
OE/V
PP
and CEat VIL. Data
should be verified at
t
DV
after the falling edge of CE.
AUTO PRODUCT IDENTIFICATION
The Auto Product Identification mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type. This mode is intended for use by programming equipment for the purpose of automatically matching the device to be programmed with its corresponding programming algorithm. This mode is functional in the 25°C ± 5°C ambient temperature range that is required when programming the EN27C512.
To activate this mode, the programming equipment must force 12.0 V ± 0.5V on address line A9 of the EN27C512. Two identifier bytes may then be sequenced from the device outputs by
toggling address line A0 from V
IL
to VIH, when A1 = VIH. All other address lines must be held at
V
IL
during Auto Product Identification mode.
Byte 0 (A0 = V
IL
) represents the manufacturer code, and byte 1 (A0 = VIH), the device code. For the EN27C512, these two identifiers bytes are given in the Mode Select Table. All identifiers for manufacturer and device codes will possess odd parity, with the MSB (DQ7) defined as the parity
bit.
When A1 = VIL, the EN27C512 will read out the binary code of 7F, continuation code, to
signify the unavailability of manufacturer ID codes.
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EN27C512
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READ MODE
The EN27C512 has two control functions, both of which must be logically satisfied in order to obtain data at the outputs. Chip Enable (
CE) is the power control and should be used for
device selection. Output Enable (
OE) is the output control and should be used to gate data to
the output pins, independent of device selection. Assuming that addresses are stable, address access time (t
ACC
) is equal to the delay from CE to output (tCE) . Data is available at
the outputs (t
OE
) after the falling edge of OE, assuming the CEhas been LOW and
addresses have been stable for at least t
ACC
- tOE.
STANDBY MODE
The EN27C512 has CMOS standby mode which reduces the maximum V
CC
current to 20µA.
It is placed in CMOS standby when
CEis at V
CC
± 0.3 V. The EN27C512 also has a TTL-
standby mode which reduces the maximum V
CC
current to 1.0 mA. It is placed in TTL-
standby when
CEis at V
IH
. When in standby mode, the outputs are in a high-impedance
state, independent of the
OEinput.
TWO-LINE OUTPUT CONTROL FUNCTION
To accommodate multiple memory connections, a two-line control function is provided to allow for:
1. Low memory power dissipation,
2. Assurance that output bus contention will not occur.
It is recommended that
CEbe decoded and used as the primary device-selection function, while
OEbe made a common connection to all devices in the array and connected to the READ line
from the system control bus. This assures that all deselected memory devices are in their low­power standby mode and that the output pins are only active when data is desired from a particular memory device.
SYSTEM CONSIDERATIONS
During the switch between active and standby conditions, transient current peaks are produced on the rising and falling edges of Chip Enable. The magnitude of these transient current peaks is dependent on the output capacitance loading of the device. At a minimum, a 0.1µF ceramic capacitor (high frequency, low inherent inductance) should be used on each device between V
CC
and VSS to minimize transient effects. In addition, to overcome the voltage drop caused by the inductive effects of the printed circuit board traces on EPROM arrays, a 4.7µF bulk electrolytic capacitor should be used between V
CC
and VSS for each eight devices. The location of the
capacitor should be close to where the power supply is connected to the array.
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EN27C512
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MODE SELECT TAB
Mode CE
OE
/
V
PP
A0 A9 Output
Read
V
IL
V
IL
XXD
OUT
Output Disable
V
IL
V
IH
X X High Z
Standby (TTL)
V
IH
X X X High Z
Standby (CMOS)
V
CC
± 0.3V
X X X High Z
Program
(4)
V
IL
V
PP
XXD
IN
Program Verify
V
IL
V
IL
XXD
OUT
Program Inhibit
V
IH
V
p p
X X High Z
Manufacturer Code
(3)
V
IL
V
IL
V
IL
VH(1) 1C
Device Code
(3)
V
IL
V
IL
V
IH
VH
(1)
83
NOTES:
1) VH = 12.0V ± 0.5V
2) X = Either V
IH
or V
IL
3) For Manufacturer Code and Device Code, A1 = V
IH
When A1 = VIL, both codes will read 7F
4) See DC Programming Characteristics for V
PP
voltage during programming
EON’S STANDARD PRODUCT IDENTIFICATION CODE
Pins
Hex
Data
Code
A0 A1 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
Manufacturer
01000111001C
Device Type
111000001183
Continuation
00011111117F 10011111117F
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EN27C512
4800 Great America Parkway Ste 202 Tel: 408-235-8680 Santa Clara, CA. 95054 Fax: 408-235-8685
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FIGURE 5. QUIKRITETM PROGRAMMING FLOW CHART
NOTE 1: Either 100µs or 20µs pulse.
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EN27C512
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8
ABSOLUTE MAXIMUM RATINGS
Storage Temperature
-65àC to +125àC
Ambient Temperature
with Power Applied -40àC to +85àC
Voltage with Respect to V
SS
All pins except A9, VPP, V
CC
-0.6V to VCC + 0.5V
A9, V
PP
-0.6V to +13.5V
V
CC
-0.6V to +7.0V
OPERATING RANGES
Commercial (C)
Case Temperature(Tc) 0àC to +70àC
Industrial (I)
Case Temperature(Tc) -40àC to +85àC
Supply READ Voltages
+4.50V to +5.5V
(Functionality is guaranteed between these limits)
Stresses above those shown above may cause permanent damage to the device. This is a stress rating only and operation above these specifications for extended periods may affect device reliability. Operation outside the
"OPERATING RANGES" shown above voids any and all warranty provisions.
DC CHARACTERISTICS FOR READ OPERATION
Symbol Parameter Min. Max. Unit Conditions
V
OH
Output High Voltage 2.4 V IOH = -0.4mA
V
OL
Output Low Voltage 0.45 V IOL = 2.1mA
V
IH
Input High Voltage 2.0
V
CC
+0.5
V
V
IL
Input Low Voltage -0.3 0.8 V
I
LI
Input Leakage Current -5 5 µAVIN = 0 to 5.5V
I
LO
Output Leakage Current -10 10 µAV
OUT
= 0 to 5.5V
I
CC3
VCC Power -Down Current 10 µA CE= VCC ± 0.3V
I
CC2
VCC Standby Current 1.0 mA CE= V
IH
I
CC1
VCC Active Current 30 mA CE= VIL, f=5MHz,
I
OUT
= 0mA
I
PP
VPP Supply Current Read 100 µA CE= OE = VIL,
VPP = 5.5V
CAPACITANCE
Symbol Parameter Typ. Max. Unit Conditions
C
IN
Input Capacitance 8 12 pF VIN = 0V
C
OUT
Output Capacitance 8 12 pF V
OUT
= 0V
C
VPP
VPP Capacitance 18 25 pF VPP = 0V
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EN27C512
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AC CHARACTERISTICS FOR READ OPERATION
EN27C512
-45 -55 -70 -90
Symbol Parameter Condition Min Max Min Max Min Max Min Max Unit
tACC (3) Address to
Output Delay
CE= OE = V
IL
45 55 70 90
ns
tCE (2) CEto Output
Delay
OE = V
IL
45 55 70 90
ns
tOE (2, 3) OE to Output
Delay
OE = V
IL
25 25 30 35
ns
tDF (4, 5) OE or CEHigh to Output Float,
whichever occurred first
20 20 25 25
ns
tOH Output Hold from Address,
CEor OE , whichever occurred
first
0000
ns
FIGURE 6. AC WAVEFORMS FOR READ OPERATION
CE
ADDRESS ADDRESS VALID
OE
OUTPUT
OUTPUT
VALID
tCE
tACC
HIGH Z
tOE
tDF
tOH
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EN27C512
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FIGURE 7. OUTPUT TEST WAVEFORMS AND MEASUREMENTS
AC
DRIVING
LEVELS
AC MEASUREMENT LEVEL
3.0V
1.5V
0.0V
tR, tF < 5 ns (10% to 90%)
AC
DRIVING
LEVELS
AC MEASUREMENT LEVEL
OUTPUT
PIN
Note: CL = 100pF including jig capacitance, except for the
-45 and -55 devices, where CL = 30pF.
1.3V
(1N914)
3.3K
CL
2.4V
0.8
2.0
0.45V
tR, tF < 20 ns (10% to 90%)
45 and 55 devices:
Output Test Load
70 and 90 devices:
DC PROGRAMMING CHARACTERISTICS
Test Limits
Symbol Parameter Conditions Min. Max Units
I
LI
Input Load Current V
IN = VIL
, V
IH
5.0
µA
V
IL
Input Low Level -0.5 0.8 V
V
IH
Input High Level 0.7 V
CC
V
CC
+ 0.5 V
V
OL
Output Low Voltage I
OL =
2.1 mA 0.45 V
V
OH
Output High Voltage
I
OH =
-400 µA
2.4 V
I
CC2
VCC Supply Current (Program and Verify)
40 mA
I
PP2
V
PP
Supply Current CE= PGM= V
IL,
10 mA
V
ID
A9 Product Identification Voltage 11.5 12.5 V
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EN27C512
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FIGURE 8. PROGRAMMING WAVEFORMS
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EN27C512
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SWITCHING PROGRAMMING CHARACTERISTICS (TA = + 25° C ± 5°C)
PARAMETER SYMBOL STANDARD PARAMETER DESCRIPTION
Min. Max Units
t
AS
Address Setup Time 2
µs
t
OES
OE
/V
PP
Setup Time 2 µs
t
OEH
OE /VPP Hold Time 2 µs
t
DS
Data Setup Time 2 µs
t
AH
Address Hold Time 0 µs
t
DH
Data Hold Time 2 µs
t
DFP
Output Enable to Output Float Delay 0 130 ns
t
PW
PGMProgram Pulse Width 20 105
µs
t
VCS
V
cc
Setup Time 2
µs
t
DV
Data Valid from
CE
150
ns
t
VR OE
/V
PP
Hold Time 2
µs
ORDERING INFORMATION
EN27C512 45 P I
TEMPERATURE RANGE
(Blank) = Commercial ( 0àC to +70àC) I = Industrial ( -40àC to +85àC)
PACKAGE
P = 28 Plastic DIP J = 32 Plastic PLCC T = 28 Plastic TSOP
SPEED
45 = 45ns 55 = 55ns 70 = 70ns 90 = 90ns
BASE PART NUMBER
EN = EON Silicon Devices 27 = EPROM C = CMOS 512 = 64K x 8
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