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®
IPAD
TM
MAIN PRODUCT CHARACTERISTICS
Where EMI filtering in ESD sensitive equipment is required:
Mobile phones and communication systems
■
Computers, printers and MCU Boards
■
DESCRIPTION
The EMIF06-10006F1 is a highly integrated devices
designed to suppress EMI/RFI noise in all systems
subjected to electromagnetic interferences. The
EMIF04 flip-chip packaging means the package size
is equal to the die size.
This filter includes an ESD protection circuitry which
preventsthe device fromdestruction when subjected
to ESD surges up 15kV. This device includes four
EMIF filters and 4 separated ESD diodes.
BENEFITS
■ EMI symmetrical (I/O) low-pass filter
■ High efficiency in EMI filtering
■ Verylow PCB space consuming:
2.92mm x 1.29mm
■ Very thin package: 0.65 mm
■ High efficiency in ESD suppression
(IEC61000-4-2 level 4)
■
High reliability offered by monolithic integration
■
High reducing of parasitic elements through
integration and wafer level packaging.
COMPLIES WITH THE FOLLOWING STANDARDS :
IEC 61000-4-2 level 4:
15kV (air discharge)
8 kV (contact discharge)
MIL STD 883E - Method 3015-6 Class 3
BASIC CELL CONFIGURATION
EMIF06-10006F1
6 LINES EMI FILTER
AND ESD PROTECTION
®
Flip-Chip package
PIN CONFIGURATION (ball side)
987 654 321
I6
I5
I4
Gnd Gnd Gnd
O6
O5
O4
I3
O3
I2
O2
I1
O1
A
B
C
Input 1
Input 2
Input 3
GND
TM :IPAD is a trademark of STMicroelectronics.
January 2003 - Ed: 1
Output 1
Output 2
Output 3
Filtering cells: Ri/o = 100
Input 4
Input 5
Input 6
Cline = 60pF
Output 4
Output 5
Output 6
GND
Ω
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EMIF06-10006F1
ABSOLUTE RATINGS (limiting values)
Symbol Parameter and test conditions Value Unit
P
R
P
T
T
j
T
op
T
stg
DC power per resistance
Total DC power per package
Maximum junction temperature
Operating temperature range
Storage temperature range
ELECTRICAL CHARACTERISTICS (T
Symbol Parameter
V
BR
I
RM
V
RM
V
CL
R
d
I
PP
R
I/O
Breakdown voltage
Leakage current @ V
RM
Stand-off voltage
Clamping voltage
Dynamic impedance
Peak pulse current
Series resistance between Input
and Output
amb
=25°C)
VCL
0.1 W
0.6 W
125 °C
-40 to + 85 °C
125 °C
I
I
F
VRMVBR
VF
IRM
IR
IPP
V
C
line
Input capacitance per line
Symbol Test conditions Min. Typ. Max. Unit
V
BR
I
RM
R
I/O
C
line
IR=1mA
VRM= 3.3 V per line
I=10mA
VR=2.5V,F=1MHz, 30 mV (on filter cells)
5.5 7 9 V
500 nA
80 100 120 Ω
50 60 70 pF
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Page 3
EMIF06-10006F1
Fig. 1: S21 (dB) attenuation measurements and
Aplac simulation.
Aplac 7.62 User: ST Microelectronics
00
00
-12.5
-12.5
-25
-25
-37.5
-37.5
-50
-50
1M 3M 10M 30M 100M 300M 1G 3G
1M 3M 10M 30M 100M 300M 1G 3G
Aplac 7.62 User: ST Microelectronics
dB
dB
i3-o3-load
Simulation
f/Hz
Fig. 3: Digital crosstalk measurements.
Fig. 2: Analog crosstalk measurements.
Aplac 7.62 User: ST Microelectronics
Aplac 7.62 User: ST Microelectronics
i3_o2.s2p
1M
10M 100M 1G
f/Hz
-25
-50
-75
-100
00
dBdB
100k
Fig. 4: ESD response to IEC61000-4-2 (+15kV air
discharge)onone input V(in) andone output V(out).
Fig. 5: ESD response to IEC61000-4-2 (-15kV air
discharge)onone input V(in) andone output V(out).
Fig. 6: Line capacitance versus applied voltage for
filter.
C(pF)
100
90
80
70
60
50
40
30
20
10
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
V (V)
R
V
osc
F=1MHz
=30mV
Tj=25°C
RMS
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Page 4
EMIF06-10006F1
Aplac model
Ii*
Cbump
Rsub
Oi* = Output of each cell
Ii* = Input of each cell
Aplac parameters
Rs=100LbumpRbump
Cz=41pF@0V
Cz=41pF@0V
EMIF06-10006F1 model Ground return for each GND bump
Lbump Rbump
Rsub
sub
sub
Oi*
Cbump
CgndCgndCgnd
sub
Rsub
Rbump
Lbump
Lgnd
Rgnd
aplacvar Rs
aplacvar Cz
aplacvar Lbump
aplacvar Rbump
aplacvar Cbump
aplacvar Rsub
aplacvar Rgnd
aplacvar Lgnd
aplacvar Cgnd
100
41 pF
50 pH
20 m
1.2 pF
100 m
100 m
100 pH
0.15 pF
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Page 5
ORDER CODE
EMI Filter
EMIF06-10006F1
EMIF yy xxx zz F 1-
Pitch = 500µm
Bump = 315µm
Number of lines
x: resistance value ( ) z:capacitance value / 10 (pF)
PACKAGE MECHANICAL DATA
500µm ± 50
250µm ± 50
501µm ± 50
FLIP CHIP
Ω
or
application (3 letters) and version (2 digits)
315µm ± 50
650µm ± 65
435µm ± 50
1.29mm ± 50µm
2.92mm ± 50µm
FOOT PRINT RECOMMENDATIONS
Copper pad Diameter :
250µm recommended , 300µm max
Solder stencil opening : 330µm
Solder mask opening recommendation :
340µm min for 300µm copper pad diameter
MARKING
Dot, ST logo
xxx = marking
yww = datecode
(y = year
ww = week)
All dimensions in µm
545
230
545
x
y
400
wxw
x
100
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Page 6
EMIF06-10006F1
FLIP-CHIP TAPE AND REEL SPECIFICATION
Dot identifying Pin A1 location
8 +/- 0.3
ST
yww
xxx
4 +/- 0.1
yww
xxx
ST
Ø 1.5 +/- 0.1
ST
yww
xxx
1.75 +/- 0.1 3.5 +/- 0.1
0.73 +/- 0.05
All dimensions in mm
User direction of unreeling
4 +/- 0.1
OTHER INFORMATION
Ordering code Marking Package Weight Base qty Delivery mode
EMIF06-10006F1 FTT Flip-Chip 5.4 mg 5000 Tape & reel
Note: More packing informations are available in the application note AN1235: ''Flip-Chip: Package description and
recommandations for use''
Informationfurnishedis believed tobeaccurate and reliable.However,STMicroelectronics assumes noresponsibilityfor the consequencesof
useofsuch information nor forany infringement of patentsorother rights ofthirdparties which mayresultfrom its use. Nolicense is granted by
implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied.
STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written
approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
© 2003 STMicroelectronics - Printed in Italy - All rights reserved.
STMicroelectronics GROUP OF COMPANIES
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