
Engineer-to-Engineer Note  EE-351 
Technical notes on using Analog Devices DSPs, processors and development tools 
For compatibility with the previous 
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Using the ADS P-BF592 Blackfin® Processor Tools Utility ROM 
Contributed by Andy Kettler  Rev 2 – March 16, 2011 
Introduction 
The AD SP-BF592 Blackfin® processor provides 
fast, low latency on-chip memory that includes 
64K bytes of L1 instruction ROM, 32K bytes of 
L1 instruction SRAM, and 32K bytes of L1 data 
SRAM. The processor has no L2 internal 
memory, and it does not provide an external 
memory interface (L3 memory). Therefore an 
application might be constrained by the 
ava ilabilit y o f L1 in st ruc t ion S RAM . O ne wa y to  
address this would be to take advantage of the 
on-chip Tools Utility R OM. 
This EE-Note describes the Too ls Utility ROM, it 
explains how to use it, and the implications 
involved. Also, this document assumes that 
applications are built using the VisualDSP++® 
5.0 development tools (Update 9 or later 
revisions). 
release of t he pro duct, t he VisualDSP++ 
development tools refer to the ADSPBF592 pro cessor as t he ADSP-BF592-A 
processor. 
Overview 
The Tools Utility ROM is available with the 
ADSP-BF592 processor (in all silicon revisions 
except revision 0.0) and uses its 64K bytes of L1 
instruct ion ROM to provide: 
 Compiler support functions, which are hidden 
routines that the compiler knows about and 
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re lies on to pro vide run-time services for the 
code that it generates (such as emulation of 
floating-po in t ar it hmet ic t hat is no t supported 
by the hardware ins truction set). 
 A set of C and DSP run-t ime lib r a ry func tio n s 
including, for example, functions from 
string.h and math.h, matrix manipulation 
functions, and filter and FFT functions. 
Appendix A has a detailed description of the 
content s of the ROM . 
 The core of the VisualDSP++ Kernel (VDK) 
referred to here as TMK. 
Benefits of Using the Tools Utility ROM 
The basic memory layout of the ADSP-BF592 
proc essor is: 
L1 instr uction SR AM  32K bytes 
L1 instr uction RO M  64K bytes 
L1 data SRAM  32K bytes 
L1 scratchpad SRAM  4K bytes 
There is no support for external memory, and so 
expl oit ing t he T o ols Ut ility R OM may o ver co me 
shortages in L1 instruction SRAM (refer to the 
following section which describes the ROM’s L1 
data SRAM requirements). For example, the 
linker know s tha t th e T ools U tility R O M c on ta ins  
a copy of the C library function strcmp. S o if an  
application calls that function then all the linker 
has to do is to r edirect all appropriate references 
to where the strcmp function is located in the 
ROM. Should an application decide not to link