Datasheet EDI8F321024C20MZC, EDI8F321024C20MNC, EDI8F321024C20MMC, EDI8F321024C15MZC, EDI8F321024C15MNC Datasheet (White Electronic Designs)

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EDI8F321024C

1024Kx32 Static RAM CMOS, High Speed Module

FEATURES

n 1024Kx32 bit CMOS Static RAM

 Access Times: 15, 20, and 25ns

 Individual Byte Selects

 Fully Static, No Clocks

 TTL Compatible I/O

n High Density Package

 72 Pin ZIP, No. 175

 72 lead SIMM, No. 176 (Angle)

 72 lead SIMM, No. 356 (Straight)

 Common Data Inputs and Outputs

n Single +5V (±10%) Supply Operation

FIG. 1

PIN CONFIGURATIONS AND BLOCK DIAGRAM

DESCRIPTION

The EDI8F321024C is a high speed 32 megabit Static RAM module organized as 1024K words by 32 bits. This module is constructed from eight 1024Kx4 Static RAMs in SOJ packages on an epoxy laminate (FR4) board.

Four chip enables (EØ-E3) are used to independently enable the four bytes. Reading or writing can be executed on individual bytes or any combination of multiple bytes through proper use of selects.

The EDI8F321024C is offered in 72 pin ZIP and 72 lead SIMM packages, which enable 32 megabits of memory to be placed in less than 1.3 square inches of board space.

All inputs and outputs are TTL compatible and operate from a single 5V supply. Fully asynchronous circuitry requires no clocks or refreshing for operation and provides equal access and cycle times for ease of use.

Pins PD1- PD4, are used to identify module memory density in applications where alternate modules can be interchanged.

PIN NAMES

AØ-A19 Address Inputs

EØ-E3 Chip Enables

W Write Enable

G Output Enable

DQØ-DQ31 Common Data

Input/Output

VCC Power (+5V±10%)

VSS Ground

NC No Connection

Aug. 2002 Rev. 8A ECO #15521

8F321024C Pin Config.

8F321024C Blk Dia.

White Electronic Designs Corporation  (508) 366-5151  www.whiteedc.com

Page 2

EDI8F321024C

ABSOLUTE MAXIMUM RATINGS*

Voltage on any pin relative to VSS -0.5V to 7.0V Operating Temperature TA (Ambient)

Commercial 0°C to +70°C

Industrial -40°C to +85°C Storage Temperature, Plastic -55°C to +125°C Power Dissipation 7.0 Watts Output Current 20 mA

*Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

DC ELECTRICAL CHARACTERISTICS

Parameter Sym Conditions Min Typ Max Units

Operating Power Supply Current ICC1 W, E = VIL, II/O = 0mA, Min Cycle 1280 mA Standby (TTL) Power Supply Current ICC2 E ³ VIH, VIN £ VIL or VIN ³ VIH 480 mA Full Standby Power Supply Current ICC3 E ³ VCC-0.2V 80 mA CMOS VIN ³ VCC-0.2V or VIN £ 0.2V Input Leakage Current ILI VIN = 0V to VCC -- -- ±80 µA Output Leakage Current ILO V I/O = 0V to VCC -- -- ±20 µA Output High Voltage VOH IOH = -4.0mA 2.4 -- -- V Output Low Voltage VOL IOL = 8.0mA -- -- 0.4 V

*Typical: TA = 25°C, VCC = 5.0V

RECOMMENDED DC OPERATING CONDITIONS

Parameter Sym Min Typ Max Units

Supply Voltage VCC 4.5 5.0 5.5 V Supply Voltage VSS 0 0 0 V Input High Voltage VIH 2.2 -- 6.0 V Input Low Voltage VIL -0.3 -- 0.8 V

AC TEST CONDITIONS

Input Pulse Levels VSS to 3.0V Input Rise and Fall Times 5ns Input and Output Timing Levels 1.5V Output Load 1TTL, CL = 30pF

(note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF)

TRUTH TABLE

E W G Mode Output Power

H X X Standby HIGH Z ICC2/ICC3 L H L Read DOUT ICC1 L L X Write DIN ICC1

Output

L H H Deselect HIGH Z ICC1

White Electronic Designs Corporation  (508) 366-5151  www.whiteedc.com

CAPACITANCE

(f=1.0MHz, VIN=VCC or VSS)

Parameter Sym Max Unit

Address Lines CI 60 pF Data Lines CD/Q 20 pF Chip Enable Line CC 20 pF Write Line CN 60 pF

These parameters are sampled, not 100% tested.

Aug. 2002 Rev. 8A

ECO #15521

Page 3

AC CHARACTERISTICS READ CYCLE

Parameter JEDEC Alt. Min Max Min Max Min Max Units

Read Cycle Time TAVAV TRC 15 20 25 ns Address Access Time TAVQV TAA 15 20 25 ns Chip Enable Access TELQV TACS 15 20 25 ns Chip Enable to Output in Low Z (1) TELQX TCLZ 3 3 3 ns Chip Disable to Output in High Z (1) TEHQZ TCHZ 7 10 12 ns Output Hold from Address Change TAVQX TOH 3 3 3 ns Output Enable to Output Valid TGLQV TOE 7 8 10 ns Output Enable to Output in Low Z (1) TGLQX TOLZ 0 0 0 ns Output Disable to Output in High Z(1) TGHQZ TOHZ 7 8 10 ns

Note 1: Parameter guaranteed, but not tested.

FIG. 2

READ CYCLE 1 - W HIGH, G, E LOW

EDI8F321024C

Symbol 15ns 20ns 25ns

8F321024C Rd Cyc1

FIG. 3

READ CYCLE 2 - W HIGH

TAVQV

TELQV

TELQX

TAVAV

ADDRESS 1

TAVQV

TGLQV

TGLQX

TAV AV

ADDRESS 2

TAVQX

DATA 1

DATA 2

TEHQZ

TGHQZ

Aug. 2002 Rev. 8A ECO #15521

8F321024C Rd Cyc2

White Electronic Designs Corporation  (508) 366-5151  www.whiteedc.com

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EDI8F321024C

AC CHARACTERISTICS WRITE CYCLE

Symbol 15ns 20ns 25ns

Parameter JEDEC Alt. Min Max Min Max Min Max Units

Write Cycle Time TAVAV TWC 15 20 25 ns Chip Enable to End of Write TELWH TCW 10 15 20 ns

TWLEH TCW 10 15 20 ns

Address Setup Time TAVWL TAS 0 0 0 ns

TAVEL TAS 0 0 0 ns

Address Valid to End of Write TAVWH TAW 10 15 20 ns

TAVEH TAW 10 15 20 ns

Write Pulse Width TWLWH TWP 12 15 20 ns

TELEH TWP 12 15 20 ns

Write Recovery Time TWHAX TWR 0 0 0 ns

TEHAX TWR 0 0 0 ns

Data Hold Time TWHDX TDH 3 3 0 ns

TEHDX TDH 3 3 0 ns Write to Output in High Z (1) TWLQZ TWHZ 0 7 0 8 0 12 ns Data to Write Time TDVWH TDW 7 12 15 ns

TDVEH TDW 7 12 15 ns Output Active from End of Write (1) TWHQX TWLZ 3 3 3 ns

Note 1: Parameter guaranteed, but not tested.

FIG. 4

WRITE CYCLE 1 - W CONTROLLED

8F321024C Write Cyc1

TAVWL

TAVWH

TAVAV

TELWH

TWLQZ

TWHAX

TWLWH

TDVWH TWHDX

DATA VALID

TWHQX

HIGH Z

White Electronic Designs Corporation  (508) 366-5151  www.whiteedc.com

Aug. 2002 Rev. 8A

ECO #15521

Page 5

FIG. 5

WRITE CYCLE 2 - E CONTROLLED

TAVEL

EDI8F321024C

TAVAV

TELEH

TAVEH TEHAX

TWLEH

TEHDXTDVEH

8F321024C Write Cyc2

DATA VALID

HIGH Z

Aug. 2002 Rev. 8A ECO #15521

White Electronic Designs Corporation  (508) 366-5151  www.whiteedc.com

Page 6

ORDERING INFORMATION

EDI8F321024C

Part Number Speed (ns) Package No.

EDI8F321024C15MNC 15 176 EDI8F321024C20MNC 20 176 EDI8F321024C25MNC 25 176

Note: To order gold SIMM option, change "EDIF" to "EDIG".

PACKAGE DESCRIPTIONS

PACKAGE NO.175: 72 PIN ZIP

.050

.020

.052 TYP.

NOT RECOMMENDED FOR NEW DESIGNS

PACKAGE NO. 176: 72 LEAD ANGLED SIMM

3.865 MAX.

.250 TYP.

Part Number Speed (ns) Package No.

EDI8F321024C15MZC 15 175 EDI8F321024C20MZC 20 175 EDI8F321024C25MZC 25 175 EDI8F321024C15MMC 15 356 EDI8F321024C20MMC 20 356 EDI8F321024C25MMC 25 356

.360 MAX.

.590 MAX.

.175

.100 TYP.

.125

175-8F321024C Pkg.

.100

TYP.

.400

PACKAGE NO. 356: 72 PIN SIMM

.125 DIA (2x)

.400

White Electronic Designs Corporation  (508) 366-5151  www.whiteedc.com

.250

.062 R. (2x)

DIMENSIONS ARE IN INCHES

.050 TYP.

2.045

4.255 MAX

3.984

3.750

.250

TYP.

176-8F321024C Pkg.

1.992

356-8F321024C Pkg.

.360

R.#

.600

164

MAX.

.125

MIN.

MAX.

Aug. 2002 Rev. 8A

ECO #15521