Datasheet dsPIC33EP256MU806, dsPIC33EP256MU810, dsPIC33EP256MU814, dsPIC33EP512GP806, dsPIC33EP512MC806 Datasheet
...
dsPIC33EPXXX(GP/MC/MU)806/810/814
and PIC24EPXXX(GP/GU)810/814
16-bit Microcontrollers and Digital Signal Controllers (up to 512 KB Flash
and 52 KB SRAM) with High-Speed PWM, USB, and Advanced Analog
Operating Conditions
• 3.0V to 3.6V, -40ºC to +125ºC, DC to 60 MIPS
• 3.0V to 3.6V, -40ºC to +85ºC, DC to 70 MIPS
Core: 16-bit dsPIC33E/PIC24E CPU
• Code-efficient (C and Assembly) architecture
• Two 40-bit wide accumulators
• Single-cycle (MAC/MPY) with dual data fetch
• Single-cycle mixed-sign MUL plus hardware divide
• 32-bit multiply support
Clock Management
• 2% internal oscillator
• Programmable PLLs and oscillator clock sources
• Fail-Safe Clock Monitor (FSCM)
• Independent Watchdog Timer
• Fast wake-up and start-up
Power Management
• Low-power management modes (Sleep, Idle, Doze)
• Integrated Power-on Reset and Brown-out Reset
• 1.0 mA/MHz dynamic current (typical)
•60 µA I
PD current (typical)
High-Speed PWM
• Up to seven PWM pairs with independent timing
• Dead Time for rising and falling edges
• 8.32 ns PWM resolution
• PWM support for:
- DC/DC, AC/DC, Inverters, PFC, Lighting
- BLDC, PMSM, ACIM, SRM
• Programmable Fault inputs
• Flexible trigger configurations for ADC conversions
Advanced Analog Features
• Two independent ADC modules:
- One ADC configurable as 10-bit, 1.1 Msps with four
S&H or 12-bit, 500 ksps with one S&H
- One 10-bit ADC, 1.1 Msps with four S&H
- Eight S&H using both ADC 10-bit modules
- 24 analog channels (64-pin devices) up to 32 analog
channels (100/121/144-pin devices)
• Flexible and independent ADC trigger sources
• Comparators:
- Up to three Analog Comparator modules
- Programmable references with 32 voltage points
Timers/Output Compare/Input Capture
• 27 General Purpose Timers:
- Nine 16-bit and up to four 32-bit Timers/Counters
- 16 OC modules configurable as Timers/Counters
- Two 32-bit Quadrature Encoder Interface (QEI)
modules configurable as Timers/Counters
• 16 IC modules
• Peripheral Pin Select (PPS) to allow function remap
• Real-Time Clock and Calendar (RTCC) module
Communication Interfaces
• USB 2.0 OTG-compliant full-speed interface
• Four UART modules (15 Mbps)
- Supports LIN 2.0 protocols and IrDA
• Four 4-wire SPI modules (15 Mbps)
• Two ECAN™ modules (1 Mbaud) CAN 2.0B support
2
•Two I
• Data Converter Interface (DCI) module with support for
• PPS to allow function remap
• Parallel Master Port (PMP)
• Programmable Cyclic Redundancy Check (CRC)
C modules (up to 1 Mbaud) with SMBus support
2
S and Audio codecs
I
®
Direct Memory Access (DMA)
• 15-channel DMA with user-selectable priority arbitration
• UART, USB, SPI, ADC, ECAN, IC, OC, Timers,
2
S, PMP
DCI/I
Input/Output
• Sink/Source 10 mA on all pins
• 5V-tolerant pins
• Selectable open drain, pull-ups, and pull-downs
• Up to 5 mA overvoltage clamp current
• External interrupts on all I/O pins
Qualification and Class B Support
• AEC-Q100 REVG (Grade 1 -40ºC to +125ºC) planned
• AEC-Q100 REVG (Grade 0 -40ºC to +150ºC) planned
• Class B Safety Library, IEC 60730
Debugger Development Support
• In-circuit and in-application programming
• Five program and three complex data breakpoints
• IEEE 1149.2-compatible (JTAG) boundary scan
• Trace and run-time watch
Packages
Type QFN TQFP TQFP TFBGA LQFP
Pin Count 64 64 144 100 121 144
I/O Pins (up to) 53 53 122 83 83 122
Contact/Lead Pitch 0.50 0.50 0.40 0.40 0.50 0.50 0.50
Dimensions 9x9x0.9 10x10x1 16x16x1 12x12x1 14x14x1 10x10x1.2 20x20x1.4
Note: All dimensions are in millimeters (mm) unless specified.
© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 1
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
dsPIC33EPXXX(GP/MC/MU)806/810/
814 and PIC24EPXXX(GP/GU)810/814
PRODUCT FAMILIES
The device names, pin counts, memory sizes and
peripheral availability of each device are listed in
Table 1. Their pinout diagrams appear on the following
pages.
TABLE 1: dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
CONTROLLER FAMILIES
Remappable Peripherals
(6)
SPI
ECAN™
External Interrupts
DMA Controller (Channels)
(2)
(3,4)
(1)
Device
dsPIC33EP256MU806 64
dsPIC33EP256MU810
dsPIC33EP256MU814 144
dsPIC33EP512GP806 64
dsPIC33EP512MC806 64
dsPIC33EP512MU810
dsPIC33EP512MU814 144
PIC24EP256GU810
PIC24EP256GU814 144
PIC24EP512GP806 64
PIC24EP512GU810
PIC24EP512GU814 144
Note 1: Flash size is inclusive of 24 Kbytes of auxiliary Flash. Auxiliary Flash supports simultaneous code execution and self-erase/programming.
Refer to Section 5. “Flash Programming” (DS70609) in the “dsPIC33E/PIC24E Family Reference Manual”.
2: RAM size is inclusive of 4 Kbytes of DMA RAM (DPSRAM) for all devices.
3: Up to eight of these timers can be combined into four 32-bit timers.
4: Eight out of nine timers are remappable.
5: PWM faults and Sync signals are remappable.
6: Four out of five interrupts are remappable.
7: Comparator output is remappable.
8: The ADC2 module supports 10-bit mode only.
Pins
Packages
QFN,
TQFP
100 TQFP
121 TFBGA
TQFP,
LQFP
QFN,
TQFP
QFN,
TQFP
100 TQFP
121 TFBGA
TQFP,
LQFP
100 TQFP
121 TFBGA
TQFP,
LQFP
QFN,
TQFP
100 TQFP
121 TFBGA
TQFP,L
QFP
(Kbyte)
RAM (Kbyte)
Input Capture
Program Flash Memory
16-bit Timer
280 28 9 16 16 8 2 4 4 2 5 15 1 3/4 1 2 1
280 28 9 16 16 12 2 4 4 2 5 15 1 3/4 1 2 1
280 28 9 16 16 14 2 4 4 2 5 15 1 3/4 1 2 1
536 52 9 16 16 — — 4 4 2 5 15 1 3/4 1 2 1
536 52 9 16 16 8 2 4 4 2 5 15 1 3/4 1 2 1
536 52 9 16 16 12 2 4 4 2 5 15 1 3/4 1 2 1
536 52 9 16 16 14 2 4 4 2 5 15 1 3/4 1 2 1
280 28 9 16 16 0 0 4 4 2 5 15 1 3/4 1 2 1
280 28 9 16 16 0 0 4 4 2 5 15 1 3/4 1 2 1
586 52 9 16 16 — — 4 4 2 5 15 1 3/4 1 2 1
536 52 9 16 16 0 0 4 4 2 5 15 1 3/4 1 2 1
536 52 9 16 16 0 0 4 4 2 5 15 1 3/4 1 2 1
Motor Control PWM
Output Compare (with PWM)
(5)
QEI
(Channels)
®
UART with IrDA
(7)
C™
2
I
DCI
RTCC
Analog Comparators/
Inputs Per Comparator
CRC Generator
(8)
10-bit/12-bit ADC
2 ADC,
24 ch
2 ADC,
32 ch
2 ADC,
32 ch
2 ADC,
24 ch
2 ADC,
24 ch
2 ADC,
32 ch
2 ADC,
32 ch
2 ADC,
32 ch
2 ADC,
32 ch
2 ADC,
24 ch
2 ADC,
32 ch
2 ADC,
32 ch
USB
Parallel Master Port
1Y51
1Y83
1Y122
—Y53
—Y53
1Y83
1Y122
1Y83
1Y122
—Y53
1Y83
1Y122
I/O Pins
DS70616F-page 2 Preliminary © 2009-2012 Microchip Technology Inc.
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
64-Pin QFN
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See
Section 11.4 “Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
3: The availability of I2C interfaces varies by device. Selection (SDAx/ SCLx or ASDAx/ASCLx) is made
using the device Configuration bits, ALTI2C1 and ALTI2C2 (FPOR<5:4>). See Section 29.0
“Special Features” for more information.
= Pins are up to 5V tolerant
48
49
1
dsPIC33EP256MU806
32
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
AN29/PWM3H/PMD5/RP85/RE5
AN31/PWM4H/PMD7/RP87/RE7
C1IN3-/SCK2/PMA5/RP118/RG6
C1IN1-/SDI2/PMA4/RPI119/RG7
C2IN3-/SDO2/PMA3/RP120/RG8
MCLR
C2IN1-/PMA2/RPI121/RG9
V
DD
PGEC3/AN1/V
REF
-/RPI33/RB1
PGED3/AN0/V
REF
+/RPI32/RB0
V
SS
AN30/PWM4L/PMD6/RPI86/RE6
PGEC2/SOSCO/C3IN1-/T1CK/RPI62/RC14
PGED2/SOSCI/C3IN3-/RPI61/RC13
INT0/DMH/RP64/RD0
PMCS1/RPI75/RD11
ASCL1/PMCS2/RPI74/RD10
ASDA1/DPLN/RPI73/RD9
RTCC/DMLN/RPI72/RD8
V
SS
OSC2/CLKO/RC15
OSC1/RPI60/RC12
V
DD
USBID/RP99/RF3
AN28/PWM3L/PMD4/RP84/RE4
AN27/PWM2H/PMD3/RPI83/RE3
AN26/PWM2L/PMD2/RP82/RE2
AN25/PWM1H/PMD1/RPI81/RE1
AN24/PWM1L/PMD0/RP80/RE0
VCMPST2/
RP97/RF1
V
CMPST
1/RP96/RF0
V
DD
VCAP
C3IN1+/V
CMPST
3/RP71/RD7
C3IN2-/RP70/RD6
PMRD/RP69/RD5
PMWR/RP68/RD4
PMBE/RP67/RD3
DPH/RP66/RD2
V
CPCON/RP65/RD1
PGEC1/AN6/RPI38/RB6
PGED1/AN7/RCV/RPI39/RB7
AV
DD
AV
SS
AN8/PMA6/RPI40/RB8
AN9/PMA7//RPI41/RB9
TMS/AN10/CV
REF
/PMA13/RPI42/RB10
TDO/AN11/PMA12/RPI43/RB11
V
SS
VDD
TCK/AN12/PMA11/RPI44/RB12
TDI/AN13/PMA10/RPI45/RB13
AN14/PMA1/RPI46/RB14
AN15/PMA0/RPI47/RB15
SDA2/PMA9/RP100/RF4
SCL2/PMA8/RP101/RF5
D+/RG2
D-/RG3
V
USB3V
3
V
BUS
AN4/C1IN2-/USBOEN/RPI36/RB4
AN3/C2IN1+/VPIO/RPI35/RB3
AN2/C2IN2-/VMIO/RPI34/RB2
AN5/C1IN1+/VBUSON/VBUSST/RPI37/RB5
Pin Diagrams
© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 3
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
64-Pin QFN
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See
Section 11.4 “Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
3: The availability of I
2
C interfaces varies by device. Selection (SDAx/ SCLx or ASDAx/ASCLx) is made
using the device Configuration bits, ALTI2C1 and ALTI2C2 (FPOR<5:4>). See Section 29.0
“Special Features” for more information.
= Pins are up to 5V tolerant
48
49
1
dsPIC33EP512MC806
32
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
AN29/PWM3H/PMD5/RP85/RE5
AN31/PWM4H/PMD7/RP87/RE7
C1IN3-/SCK2/PMA5/RP118/RG6
C1IN1-/SDI2/PMA4/RPI119/RG7
C2IN3-/SDO2/PMA3/RP120/RG8
MCLR
C2IN1-/PMA2/RPI121/RG9
V
DD
PGEC3/AN1/V
REF
-/RPI33/RB1
PGED3/AN0/V
REF
+/RPI32/RB0
V
SS
AN30/PWM4L/PMD6/RPI86/RE6
PGEC2/SOSCO/C3IN1-/T1CK/RPI62/RC14
PGED2/SOSCI/C3IN3-/RPI61/RC13
INT0/RP64/RD0
PMCS1/RPI75/RD11
ASCL1/PMCS2/RPI74/RD10
ASDA1/RPI73/RD9
RTCC/RPI72/RD8
V
SS
OSC2/CLKO/RC15
OSC1/RPI60/RC12
V
DD
RP99/RF3
AN28/PWM3L/PMD4/RP84/RE4
AN27/PWM2H/PMD3/RPI83/RE3
AN26/PWM2L/PMD2/RP82/RE2
AN25/PWM1H/PMD1/RPI81/RE1
AN24/PWM1L/PMD0/RP80/RE0
RP97/RF1
RP96/RF0
VDDVCAP
C3IN1+/RP71/RD7
C3IN2-/RP70/RD6
PMRD/RP69/RD5
PMWR/RP68/RD4
PMBE/RP67/RD3
RP66/RD2
RP65/RD1
PGEC1/AN6/RPI38/RB6
PGED1/AN7/RPI39/RB7
AV
DD
AV
SS
AN8/PMA6/RPI40/RB8
AN9/PMA7//RPI41/RB9
TMS/AN10/CV
REF
/PMA13/RPI42/RB10
TDO/AN11/PMA12/RPI43/RB11
V
SS
VDD
TCK/AN12/PMA11/RPI44/RB12
TDI/AN13/PMA10/RPI45/RB13
AN14/PMA1/RPI46/RB14
AN15/PMA0/RPI47/RB15
SDA2/PMA9/RP100/RF4
SCL2/PMA8/RP101/RF5
SCLI/RG2
SDA1/RG3
RP102/RF6
RP98/RF2
AN5/C1IN1+/RPI37/RB5
AN4/C1IN2-/RPI36/RB4
AN3/C2IN1+/RPI35/RB3
AN2/C2IN2-/RPI34/RB2
Pin Diagrams
DS70616F-page 4 Preliminary © 2009-2012 Microchip Technology Inc.
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
64-Pin QFN
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See
Section 11.4 “Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
3: The availability of I
2
C interfaces varies by device. Selection (SDAx/ SCLx or ASDAx/ASCLx) is made
using the device Configuration bits, ALTI2C1 and ALTI2C2 (FPOR<5:4>). See Section 29.0
“Special Features” for more information.
= Pins are up to 5V tolerant
48
49
1
dsPIC33EP512GP806
32
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
AN29/PMD5/RP85/RE5
AN31/PMD7/RP87/RE7
C1IN3-/SCK2/PMA5/RP118/RG6
C1IN1-/SDI2/PMA4/RPI119/RG7
C2IN3-/SDO2/PMA3/RP120/RG8
MCLR
C2IN1-/PMA2/RPI121/RG9
V
DD
PGEC3/AN1/V
REF
-/RPI33/RB1
PGED3/AN0/V
REF
+/RPI32/RB0
V
SS
AN30/PMD6/RPI86/RE6
PGEC2/SOSCO/C3IN1-/T1CK/RPI62/RC14
PGED2/SOSCI/C3IN3-/RPI61/RC13
INT0/RP64/RD0
PMCS1/RPI75/RD11
ASCL1/PMCS2/RPI74/RD10
ASDA1/RPI73/RD9
RTCC/RPI72/RD8
V
SS
OSC2/CLKO/RC15
OSC1/RPI60/RC12
V
DD
RP99/RF3
AN28/PMD4/RP84/RE4
AN27/PMD3/RPI83/RE3
AN26/PMD2/RP82/RE2
AN25/PMD1/RPI81/RE1
AN24/PMD0/RP80/RE0
RP97/RF1
RP96/RF0
VDDVCAP
C3IN1+/RP71/RD7
C3IN2-/RP70/RD6
PMRD/RP69/RD5
PMWR/RP68/RD4
PMBE/RP67/RD3
RP66/RD2
RP65/RD1
PGEC1/AN6/RPI38/RB6
PGED1/AN7/RPI39/RB7
AV
DD
AV
SS
AN8/PMA6/RPI40/RB8
AN9/PMA7//RPI41/RB9
TMS/AN10/CV
REF
/PMA13/RPI42/RB10
TDO/AN11/PMA12/RPI43/RB11
V
SS
VDD
TCK/AN12/PMA11/RPI44/RB12
TDI/AN13/PMA10/RPI45/RB13
AN14/PMA1/RPI46/RB14
AN15/PMA0/RPI47/RB15
SDA2/PMA9/RP100/RF4
SCL2/PMA8/RP101/RF5
SCLI/RG2
SDA1/RG3
RP102/RF6
RP98/RF2
AN5/C1IN1+/RPI37/RB5
AN4/C1IN2-/RPI36/RB4
AN3/C2IN1+/RPI35/RB3
AN2/C2IN2-/RPI34/RB2
PIC24EP512GP806
Pin Diagrams
© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 5
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
64-Pin TQFP
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See
Section 11.4 “Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
3: The availability of I
2
C interfaces varies by device. Selection (SDAx/ SCLx or ASDAx/ASCLx) is
made using the device Configuration bits, ALTI2C1 and ALTI2C2 (FPOR<5:4>). See Section 29.0
“Special Features” for more information.
= Pins are up to 5V tolerant
48
47
46
45
44
43
42
41
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
40
39
38
37
36
35
34
33
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
dsPIC33EP256MU806
32
AN29/PWM3H/PMD5/RP85/RE5
AN31/PWM4H/PMD7/RP87/RE7
C1IN3-/SCK2/PMA5/RP118/RG6
C1IN1-/SDI2/PMA4/RPI119/RG7
C2IN3-/SDO2/PMA3/RP120/RG8
MCLR
C2IN1-/PMA2/RPI121/RG9
V
DD
AN5/C1IN1+/V
BUSON/VBUSST
/RPI37/RB5
AN4/C1IN2-/USBOEN/RPI36/RB4
AN3/C2IN1+/VPIO/RPI35/RB3
AN2/C2IN2-/VMIO/RPI34/RB2
PGEC3/AN1/V
REF
-/RPI33/RB1
PGED3/AN0/V
REF
+/RPI32/RB0
V
SS
AN30/PWM4L/PMD6/RPI86/RE6
PGEC2/SOSCO/C3IN1-/T1CK/RPI62/RC14
PGED2/SOSCI/C3IN3-/RPI61/RC13
INT0/DMH/RP64/RD0
PMCS1/RPI75/RD11
ASCL1/PMCS2/RPI74/RD10
ASDA1/DPLN/RPI73/RD9
RTCC/DMLN/RPI72/RD8
V
SS
OSC2/CLKO/RC15
OSC1/RPI60/RC12
V
DD
USBID/RP99/RF3
AN28/PWM3L/PMD4/RP84/RE4
AN27/PWM2H/PMD3/RPI83/RE3
AN26/PWM2L/PMD2/RP82/RE2
AN25/PWM1H/PMD1/RPI81/RE1
AN24/PWM1L/PMD0/RP80/RE0
V
CMPST
2/RP97/RF1
V
CMPST
1/RP96/RF0
V
DDVCAP
C3IN1+/V
CMPST
3/RP71/RD7
C3IN2-/RP70/RD6
PMRD/RP69/RD5
PMWR/RP68/RD4
PMBE/RP67/RD3
DPH/RP66/RD2
V
CPCON
/RP65/RD1
PGEC1/AN6/RPI38/RB6
PGED1/AN7/RCV/RPI39/RB7
AV
DD
AV
SS
AN8/PMA6/RPI40/RB8
AN9/PMA7//RPI41/RB9
TMS/AN10/CV
REF
/PMA13/RPI42/RB10
TDO/AN11/PMA12/RPI43/RB11
V
SS
V
DD
TCK/AN12/PMA11/RPI44/RB12
TDI/AN13/PMA10/RPI45/RB13
AN14/PMA1/RPI46/RB14
AN15/PMA0/RPI47/RB15
SDA2/PMA9/RP100/RF4
SCL2/PMA8/RP101/RF5
D+/RG2
D-/RG3
V
USB3V
3
V
BUS
Pin Diagrams (Continued)
DS70616F-page 6 Preliminary © 2009-2012 Microchip Technology Inc.
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
64-Pin TQFP
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See
Section 11.4 “Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
3: The availability of I
2
C interfaces varies by device. Selection (SDAx/ SCLx or ASDAx/ASCLx) is
made using the device Configuration bits, ALTI2C1 and ALTI2C2 (FPOR<5:4>). See Section 29.0
“Special Features” for more information.
= Pins are up to 5V tolerant
48
47
46
45
44
43
42
41
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
40
39
38
37
36
35
34
33
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
dsPIC33EP512GP806
32
AN29/PMD5/RP85/RE5
AN31/PMD7/RP87/RE7
C1IN3-/SCK2/PMA5/RP118/RG6
C1IN1-/SDI2/PMA4/RPI119/RG7
C2IN3-/SDO2/PMA3/RP120/RG8
MCLR
C2IN1-/PMA2/RPI121/RG9
V
DD
AN5/C1IN1+/RPI37/RB5
AN4/C1IN2-/RPI36/RB4
AN3/C2IN1+/RPI35/RB3
AN2/C2IN2-/RPI34/RB2
PGEC3/AN1/V
REF
-/RPI33/RB1
PGED3/AN0/V
REF
+/RPI32/RB0
V
SS
AN30/PMD6/RPI86/RE6
PGEC2/SOSCO/C3IN1-/T1CK/RPI62/RC14
PGED2/SOSCI/C3IN3-/RPI61/RC13
INT0/RP64/RD0
PMCS1/RPI75/RD11
ASCL1/PMCS2/RPI74/RD10
ASDA1/RPI73/RD9
RTCC/RPI72/RD8
V
SS
OSC2/CLKO/RC15
OSC1/RPI60/RC12
V
DD
RP99/RF3
AN28/PMD4/RP84/RE4
AN27/PMD3/RPI83/RE3
AN26/PMD2/RP82/RE2
AN25/PMD1/RPI81/RE1
AN24/PMD0/RP80/RE0
RP97/RF1
RP96/RF0
VDDV
CAP
C3IN1+/RP71/RD7
C3IN2-/RP70/RD6
PMRD/RP69/RD5
PMWR/RP68/RD4
PMBE/RP67/RD3
RP66/RD2
RP65/RD1
PGEC1/AN6/RPI38/RB6
PGED1/AN7/RPI39/RB7
AV
DD
AV
SS
AN8/PMA6/RPI40/RB8
AN9/PMA7//RPI41/RB9
TMS/AN10/CV
REF
/PMA13/RPI42/RB10
TDO/AN11/PMA12/RPI43/RB11
V
SS
V
DD
TCK/AN12/PMA11/RPI44/RB12
TDI/AN13/PMA10/RPI45/RB13
AN14/PMA1/RPI46/RB14
AN15/PMA0/RPI47/RB15
SDA2/PMA9/RP100/RF4
SCL2/PMA8/RP101/RF5
SCL1/RG2
SDA1/RG3
RP102/RF6
RP98/RF2
PIC24EP512GP806
Pin Diagrams (Continued)
© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 7
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
64-Pin TQFP
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See
Section 11.4 “Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
3: The availability of I
2
C interfaces varies by device. Selection (SDAx/ SCLx or ASDAx/ASCLx) is made
using the device Configuration bits, ALTI2C1 and ALTI2C2 (FPOR<5:4>). See Section 29.0
“Special Features” for more information.
= Pins are up to 5V tolerant
48
47
46
45
44
43
42
41
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
40
39
38
37
36
35
34
33
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
dsPIC33EP512MC806
32
AN29/PWM3H/PMD5/RP85/RE5
AN31/PWM4H/PMD7/RP87/RE7
C1IN3-/SCK2/PMA5/RP118/RG6
C1IN1-/SDI2/PMA4/RPI119/RG7
C2IN3-/SDO2/PMA3/RP120/RG8
MCLR
C2IN1-/PMA2/RPI121/RG9
V
DD
AN5/C1IN1+/RPI37/RB5
AN4/C1IN2-/RPI36/RB4
AN3/C2IN1+/RPI35/RB3
AN2/C2IN2-/RPI34/RB2
PGEC3/AN1/V
REF
-/RPI33/RB1
PGED3/AN0/V
REF
+/RPI32/RB0
V
SS
AN30/PWM4L/PMD6/RPI86/RE6
PGEC2/SOSCO/C3IN1-/T1CK/RPI62/RC14
PGED2/SOSCI/C3IN3-/RPI61/RC13
INT0/RP64/RD0
PMCS1/RPI75/RD11
ASCL1/PMCS2/RPI74/RD10
ASDA1/RPI73/RD9
RTCC/RPI72/RD8
V
SS
OSC2/CLKO/RC15
OSC1/RPI60/RC12
V
DD
RP99/RF3
AN28/PWM3L/PMD4/RP84/RE4
AN27/PWM2H/PMD3/RPI83/RE3
AN26/PWM2L/PMD2/RP82/RE2
AN25/PWM1H/PMD1/RPI81/RE1
AN24/PWM1L/PMD0/RP80/RE0
RP97/RF1
RP96/RF0
VDDV
CAP
C3IN1+/RP71/RD7
C3IN2-/RP70/RD6
PMRD/RP69/RD5
PMWR/RP68/RD4
PMBE/RP67/RD3
RP66/RD2
RP65/RD1
PGEC1/AN6/RPI38/RB6
PGED1/AN7/RPI39/RB7
AV
DD
AV
SS
AN8/PMA6/RPI40/RB8
AN9/PMA7//RPI41/RB9
TMS/AN10/CV
REF
/PMA13/RPI42/RB10
TDO/AN11/PMA12/RPI43/RB11
V
SS
V
DD
TCK/AN12/PMA11/RPI44/RB12
TDI/AN13/PMA10/RPI45/RB13
AN14/PMA1/RPI46/RB14
AN15/PMA0/RPI47/RB15
SDA2/PMA9/RP100/RF4
SCL2/PMA8/RP101/RF5
SCL1/RG2
SDA1/RG3
RP102/RF6
RP98/RF2
Pin Diagrams (Continued)
DS70616F-page 8 Preliminary © 2009-2012 Microchip Technology Inc.
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
100-Pin TQFP
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See
Section 11.4 “Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
3: The availability of I
2
C interfaces varies by device. Selection (SDAx/ SCLx or ASDAx/ASCLx) is
made using the device Configuration bits, ALTI2C1 and ALTI2C2 (FPOR<5:4>). See Section 29.0
“Special Features” for more information.
= Pins are up to 5V tolerant
75
100
26
dsPIC33EP512MU810
2728293031323334353637383940414243444546474849
50
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
9998979695949392919089888786858483828180797877
76
PGEC1/AN6/RPI38/RB6
PGED1/AN7/RCV/RPI39/RB7
V
REF
-/RA9
V
REF
+/RA10
AV
DD
AV
SS
AN8/PMA6/RPI40/RB8
AN9/PMA7//RPI41/RB9
AN10/CV
REF
/PMA13/RPI42/RB10
AN11/PMA12/RPI43/RB11
V
SS
V
DD
TCK/RPI17/RA1
RP109/RF13
RP108/RF12
AN12/PMA11/RPI44/RB12
AN13/PMA10/RPI45/RB13
AN14/PMA1/RPI46/RB14
AN15/PMA0/RPI47/RB15
V
SS
V
DD
RPI78/RD14
RP79/RD15
SDA2/PMA9/RP100/RF4
SCL2/PMA8/RP101/RF5
PGEC2/SOSCO/C3IN1-/T1CK/RPI62/RC14
PGED2/SOSCI/C3IN3-/RPI61/RC13
INT0/DMH/RP64/RD0
PMCS1/RPI75/RD11
ASCL1/PMCS2/RPI74/RD10
ASDA1/DPLN/RPI73/RD9
RTCC/DMLN/RPI72/RD8
RPI31/RA15
RPI30/RA14
V
SS
OSC2/CLKO/RC15
OSC1/RPI60/RC12
V
DD
TDO/RPI21/RA5
TDI/RPI20/RA4
ASDA2/RPI19/RA3
ASCL2/RPI18/RA2
RP98/RF2
USBID/RP99/RF3
AN28/PWM3L/PMD4/RP84/RE4
AN27/PWM2H/PMD3/RPI83/RE3
AN26/PWM2L/PMD2/RP82/RE2
RP125/RG13
RPI124/RG12
RP126/RG14
AN25/PWM1H/PMD1/RPI81/RE1
AN24/PWM1L/PMD0/RP80/RE0
AN23/RPI23/RA7
AN22/RPI22/RA6
RP112/RG0
RP113/RG1
V
CMPST
2/RP97/RF1
V
CMPST
1/RP96/RF0
V
DDVCAP
C3IN1+/V
CMPST
3/RP71/RD7
C3IN2-/RP70/RD6
PMRD/RP69/RD5
PMWR/RP68/RD4
RPI77/RD13
RPI76/RD12
PMBE/RP67/RD3
DPH/RP66/RD2
V
CPCON
/RP65/RD1
D+/RG2
D-/RG3
V
USB3V
3
V
BUS
dsPIC33EP256MU810
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
AN29/PWM3H/PMD5/RP85/RE5
AN31/PWM4H/PMD7/RP87/RE7
C1IN3-/SCK2/PMA5/RP118/RG6
C1IN1-/SDI2/PMA4/RPI119/RG7
C2IN3-/SDO2/PMA3/RP120/RG8
MCLR
C2IN1-/PMA2/RPI121/RG9
V
DD
AN2/C2IN2-/VMIO/RPI34/RB2
PGEC3/AN1/RPI33/RB1
PGED3/AN0/RPI32/RB0
V
SS
AN30/PWM4L/PMD6/RPI86/RE6
V
DD
TMS/RPI16/RA0
AN20/RPI88/RE8
AN21/RPI89/RE9
RP127/RG15
AN16/PWM5L/RPI49/RC1
AN17/PWM5H/RPI50/RC2
AN18/PWM6L/RPI51/RC3
AN19/PWM6H/RPI52/RC4
RP104/RF8
AN5/C1IN1+/VBUSON//VBUSST/RPI37/RB5
AN4/C1IN2-/USBOEN/RPI36/RB4
AN3/C2IN1+/VPIO/RPI35/RB3
Pin Diagrams (Continued)
© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 9
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
100-Pin TQFP
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See
Section 11.4 “Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0
“I/O Ports” for more information.
3: The availability of I
2
C interfaces varies by device. Selection (SDAx/ SCLx or ASDAx/ASCLx) is made
using the device Configuration bits, ALTI2C1 and ALTI2C2 (FPOR<5:4>). See Section 29.0
“Special Features” for more information.
= Pins are up to 5V tolerant
75
100
26272829303132333435363738394041424344454647484950
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
9998979695949392919089888786858483828180797877
76
PGEC1/AN6/RPI38/RB6
PGED1/AN7/RCV/RPI39/RB7
V
REF
-/RA9
V
REF
+/RA10
AV
DD
AV
SS
AN8/PMA6/RPI40/RB8
AN9/PMA7//RPI41/RB9
AN10/CV
REF
/PMA13/RPI42/RB10
AN11/PMA12/RPI43/RB11
V
SS
V
DD
TCK/RPI17/RA1
RP109/RF13
RP108/RF12
AN12/PMA11/RPI44/RB12
AN13/PMA10/RPI45/RB13
AN14/PMA1/RPI46/RB14
AN15/PMA0/RPI47/RB15
V
SS
V
DD
RPI78/RD14
RP79/RD15
SDA2/PMA9/RP100/RF4
SCL2/PMA8/RP101/RF5
PGEC2/SOSCO/C3IN1-/T1CK/RPI62/RC14
PGED2/SOSCI/C3IN3-/RPI61/RC13
INT0/DMH/RP64/RD0
PMCS1/RPI75/RD11
ASCL1/PMCS2/RPI74/RD10
ASDA1/DPLN/RPI73/RD9
RTCC/DMLN/RPI72/RD8
RPI31/RA15
RPI30/RA14
V
SS
OSC2/CLKO/RC15
OSC1/RPI60/RC12
V
DD
TDO/RPI21/RA5
TDI/RPI20/RA4
ASDA2/RPI19/RA3
ASCL2/RPI18/RA2
RP98/RF2
USBID/RP99/RF3
AN28/PMD4/RP84/RE4
AN27/PMD3/RPI83/RE3
AN26/PMD2/RP82/RE2
RP125/RG13
RPI124/RG12
RP126/RG14
AN25/PMD1/RPI81/RE1
AN24/PMD0/RP80/RE0
AN23/RPI23/RA7
AN22/RPI22/RA6
RP112/RG0
RP113/RG1
V
CMPST
2/RP97/RF1
V
CMPST
1/RP96/RF0
V
DDVCAP
C3IN1+/V
CMPST
3/RP71/RD7
C3IN2-/RP70/RD6
PMRD/RP69/RD5
PMWR/RP68/RD4
RPI77/RD13
RPI76/RD12
PMBE/RP67/RD3
DPH/RP66/RD2
V
CPCON
/RP65/RD1
D+/RG2
D-/RG3
V
USB3V
3
V
BUS
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
AN29/PMD5/RP85/RE5
AN31/PMD7/RP87/RE7
C1IN3-/SCK2/PMA5/RP118/RG6
C1IN1-/SDI2/PMA4/RPI119/RG7
C2IN3-/SDO2/PMA3/RP120/RG8
MCLR
C2IN1-/PMA2/RPI121/RG9
V
DD
AN5/C1IN1+/
V
BUSON
/V
BUSST
/RPI37/RB5
AN4/C1IN2-/USBOEN/RPI36/RB4
AN3/C2IN1+/VPIO/RPI35/RB3
AN2/C2IN2-/VMIO/RPI34/RB2
PGEC3/AN1/RPI33/RB1
PGED3/AN0/RPI32/RB0
V
SS
AN30/PMD6/RPI86/RE6
V
DD
TMS/RPI16/RA0
AN20/RPI88/RE8
AN21/RPI89/RE9
RP127/RG15
AN16/RPI49/RC1
AN17/RPI50/RC2
AN18/RPI51/RC3
AN19/RPI52/RC4
PIC24EP512GU810
PIC24EP256GU810
RP104/RF8
Pin Diagrams (Continued)
DS70616F-page 10 Preliminary © 2009-2012 Microchip Technology Inc.
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
121-Pin TFBGA
(1)
1234567891011
A
RE4 RE3 RG13 RE0 RG0 RF1 VDD NC RD12 RD2 RD1
B
NC RG15 RE2 RE1 RA7 RF0 VCAP RD5 RD3 VSS RC14
C
RE6 VDD RG12 RG14 RA6 NC RD7 RD4 NC RC13 RD11
D
RC1 RE7 RE5 NC NC NC RD6 RD13 RD0 NC RD10
E
RC4 RC3 RG6 RC2 NC RG1 NC RA15 RD8 RD9 RA14
F
MCLR RG8 RG9 RG7 VSS NC NC VDD RC12 VSS RC15
G
RE8 RE9 RA0 NC VDD VSS VSS NC RA5 RA3 RA4
H
RB5 RB4 NC NC NC VDD NC VBUS VUSB3V3 RG2 RA2
J
RB3 RB2 RB7 AVDD RB11 RA1 RB12 NC NC RF8 RG3
K
RB1 RB0 RA10 RB8 NC RF12 RB14 VDD RD15 RF3 RF2
L
RB6 RA9 AVSS RB9 RB10
RF13
RB13 RB15 RD14 RF4 RF5
dsPIC33EP256MU810
Note 1: Refer to Table 2 for full pin names.
= Pins are up to 5V tolerant
dsPIC33EP512MU810
Pin Diagrams (Continued)
© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 11
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
TABLE 2: PIN NAMES: dsPIC33EP256MU810 AND dsPIC33EP512MU810
DEVICES
Pin
Number
A1 AN28/PWM3L/PMD4/RP84/RE4 E8 RPI31/RA15
A2 AN27/PWM2H/PMD3/RPI83/RE3 E9 RTCC/DMLN/RPI72/RD8
A3 RP125/RG13 E10 ASDA1/DPLN/RPI73/RD9
A4 AN24/PWM1L/PMD0/RP80/RE0 E11 RPI30/RA14
A5 RP112/RG0 F1 MCLR
A6 VCMPST2/RP97/RF1 F2 C2IN3-/SDO2/PMA3/RP120/RG8
A7 V
A8 No Connect F4 C1IN1-/SDI2/PMA4/RPI119/RG7
A9 RPI76/RD12 F5 V
A10 DPH/RP66/RD2 F6 No Connect
A11 V
B1 No Connect F8 V
B2 RP127/RG15 F9 OSC1/RPI60/RC12
B3 AN26/PWM2L/PMD2/RP82/RE2 F10 V
B4 AN25/PWM1H/PMD1/RPI81/RE1 F11 OSC2/CLKO/RC15
B5 AN23/RPI23/RA7 G1 AN20/RPI88/RE8
B6 V
B7 V
B8 PMRD/RP69/RD5 G4 No Connect
B9 PMBE/RP67/RD3 G5 V
B10 VSS G6 VSS
B11 PGEC2/SOSCO/C3IN1-/T1CK/RPI62/RC14 G7 VSS
C1 AN30/PWM4L/PMD6/RPI86/RE6 G8 No Connect
C2 V
C3 RPI124/RG12 G10 ASDA2/RPI19/RA3
C4 RP126/RG14 G11 TDI/RPI20/RA4
C5 AN22/RPI22/RA6 H1 AN5/C1IN1+/V
C6 No Connect H2 AN4/C1IN2-/USBOEN/RPI36/RB4
C7 C3IN1+/V
C8 PMWR/RP68/RD4 H4 No Connect
C9 No Connect H5 No Connect
C10 PGED2/SOSCI/C3IN3-/RPI61/RC13 H6 V
C11 PMCS1/RPI75/RD11 H7 No Connect
D1 AN16/PWM5L/RPI49/RC1 H8 V
D2 AN31/PWM4H/PMD7/RP87/RE7 H9 VUSB3V3
D3 AN29/PWM3H/PMD5/RP85/RE5 H10 D+/RG2
D4 No Connect H11 ASCL2/RPI18/RA2
D5 No Connect J1 AN3/C2IN1+/VPIO/RPI35/RB3
D6 No Connect J2 AN2/C2IN2-/VMIO/RPI34/RB2
D7 C3IN2-/RP70/RD6 J3 PGED1/AN7/RCV/RPI39/RB7
D8 RPI77/RD13 J4 AV
D9 INT0/DMH/RP64/RD0 J5 AN11/PMA12/RPI43/RB11
D10 No Connect J6 TCK/RPI17/RA1
D11 ASCL1/PMCS2/RPI74/RD10 J7 AN12/PMA11/RPI44/RB12
E1 AN19/PWM6H/RPI52/RC4 J8 No Connect
E2 AN18/PWM6L/RPI51/RC3 J9 No Connect
E3 C1IN3-/SCK2/PMA5/RP118/RG6 J10 RP104/RF8
E4 AN17/PWM5H/RPI50/RC2 J11 D-/RG3
E5 No Connect K1 PGEC3/AN1/RPI33/RB1
E6 RP113/RG1 K2 PGED3/AN0/RPI32/RB0
E7 No Connect K3 V
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 “Peripheral Pin Select” for
DD F3 C2IN1-/PMA2/RPI121/RG9
CPCON/RP65/RD1 F7 No Connect
CMPST1/RP96/RF0 G2 AN21/RPI89/RE9
CAP G3 TMS/RPI16/RA0
DD G9 TDO/RPI21/RA5
CMPST3/RP71/RD7 H3 No Connect
available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 “I/O Ports” for more information.
3: The availability of I
bits, ALTI2C1 and ALTI2C2 (FPOR<5:4>). See Section 29.0 “Special Features” for more information.
(1,2)
Full Pin Name
2
C interfaces varies by device. Selection (SDAx/ SCLx or ASDAx/ASCLx) is made using the device Configuration
Pin
Number
Full Pin Name
SS
DD
SS
DD
BUSON/VBUSST/RPI37/RB5
DD
BUS
DD
REF+/RA10
DS70616F-page 12 Preliminary © 2009-2012 Microchip Technology Inc.
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
TABLE 2: PIN NAMES: dsPIC33EP256MU810 AND dsPIC33EP512MU810
DEVICES
Pin
Number
K4 AN8/PMA6/RPI40/RB8 L3 AVSS
K5 No Connect L4 AN9/PMA7//RPI41/RB9
K6 RP108/RF12 L5 AN10/CV
K7 AN14/PMA1/RPI46/RB14 L6 RP109/RF13
K8 V
K9 RP79/RD15 L8 AN15/PMA0/RPI47/RB15
K10 USBID/RP99/RF3 L9 RPI78/RD14
K11 RP98/RF2 L10 SDA2/PMA9/RP100/RF4
L1 PGEC1/AN6/RPI38/RB6 L11 SCL2/PMA8/RP101/RF5
L2 V
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 “Peripheral Pin Select” for
DD L7 AN13/PMA10/RPI45/RB13
REF-/RA9
available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 “I/O Ports” for more information.
3: The availability of I
bits, ALTI2C1 and ALTI2C2 (FPOR<5:4>). See Section 29.0 “Special Features” for more information.
(1,2)
(CONTINUED)
Full Pin Name
2
C interfaces varies by device. Selection (SDAx/ SCLx or ASDAx/ASCLx) is made using the device Configuration
Pin
Number
Full Pin Name
REF/PMA13/RPI42/RB10
© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 13
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
121-Pin TFBGA
(1)
1234567891011
A
RE4 RE3 RG13 RE0 RG0 RF1 VDD NC RD12 RD2 RD1
B
NC RG15 RE2 RE1 RA7 RF0 VCAP RD5 RD3 VSS RC14
C
RE6 VDD RG12 RG14 RA6 NC RD7 RD4 NC RC13 RD11
D
RC1 RE7 RE5 NC NC NC RD6 RD13 RD0 NC RD10
E
RC4 RC3 RG6 RC2 NC RG1 NC RA15 RD8 RD9 RA14
F
MCLR RG8 RG9 RG7 VSS NC NC VDD RC12 VSS RC15
G
RE8 RE9 RA0 NC VDD VSS VSS NC RA5 RA3 RA4
H
RB5 RB4 NC NC NC VDD NC VBUS VUSB3V3 RG2 RA2
J
RB3 RB2 RB7 AVDD RB11 RA1 RB12 NC NC RF8 RG3
K
RB1 RB0 RA10 RB8 NC RF12 RB14 VDD RD15 RF3 RF2
L
RB6 RA9 AVSS RB9 RB10
RF13
RB13 RB15 RD14 RF4 RF5
Note 1: Refer to Table 3 for full pin names.
= Pins are up to 5V tolerant
PIC24EP512GU810
PIC24EP256GU810
Pin Diagrams (Continued)
DS70616F-page 14 Preliminary © 2009-2012 Microchip Technology Inc.
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
TABLE 3: PIN NAMES: PIC24EP256GU810 AND PIC24EP512GU810
DEVICES
Pin
Number
A1 AN28/PMD4/RP84/RE4 E8 RPI31/RA15
A2 AN27/PMD3/RPI83/RE3 E9 RTCC/DMLN/RPI72/RD8
A3 RP125/RG13 E10 ASDA1/DPLN/RPI73/RD9
A4 AN24/PMD0/RP80/RE0 E11 RPI30/RA14
A5 RP112/RG0 F1 MCLR
A6 VCMPST2/RP97/RF1 F2 C2IN3-/SDO2/PMA3/RP120/RG8
A7 V
A8 No Connect F4 C1IN1-/SDI2/PMA4/RPI119/RG7
A9 RPI76/RD12 F5 V
A10 DPH/RP66/RD2 F6 No Connect
A11 V
B1 No Connect F8 V
B2 RP127/RG15 F9 OSC1/RPI60/RC12
B3 AN26/PMD2/RP82/RE2 F10 V
B4 AN25/PMD1/RPI81/RE1 F11 OSC2/CLKO/RC15
B5 AN23/RPI23/RA7 G1 AN20/RPI88/RE8
B6 V
B7 V
B8 PMRD/RP69/RD5 G4 No Connect
B9 PMBE/RP67/RD3 G5 V
B10 VSS G6 VSS
B11 PGEC2/SOSCO/C3IN1-/T1CK/RPI62/RC14 G7 VSS
C1 AN30/PMD6/RPI86/RE6 G8 No Connect
C2 V
C3 RPI124/RG12 G10 ASDA2/RPI19/RA3
C4 RP126/RG14 G11 TDI/RPI20/RA4
C5 AN22/RPI22/RA6 H1 AN5/C1IN1+/V
C6 No Connect H2 AN4/C1IN2-/USBOEN/RPI36/RB4
C7 C3IN1+/V
C8 PMWR/RP68/RD4 H4 No Connect
C9 No Connect H5 No Connect
C10 PGED2/SOSCI/C3IN3-/RPI61/RC13 H6 V
C11 PMCS1/RPI75/RD11 H7 No Connect
D1 AN16/RPI49/RC1 H8 V
D2 AN31/PMD7/RP87/RE7 H9 VUSB3V3
D3 AN29/PMD5/RP85/RE5 H10 D+/RG2
D4 No Connect H11 ASCL2/RPI18/RA2
D5 No Connect J1 AN3/C2IN1+/VPIO/RPI35/RB3
D6 No Connect J2 AN2/C2IN2-/VMIO/RPI34/RB2
D7 C3IN2-/RP70/RD6 J3 PGED1/AN7/RCV/RPI39/RB7
D8 RPI77/RD13 J4 AV
D9 INT0/DMH/RP64/RD0 J5 AN11/PMA12/RPI43/RB11
D10 No Connect J6 TCK/RPI17/RA1
D11 ASCL1/PMCS2/RPI74/RD10 J7 AN12/PMA11/RPI44/RB12
E1 AN19/RPI52/RC4 J8 No Connect
E2 AN18/RPI51/RC3 J9 No Connect
E3 C1IN3-/SCK2/PMA5/RP118/RG6 J10 RP104/RF8
E4 AN17/RPI50/RC2 J11 D-/RG3
E5 No Connect K1 PGEC3/AN1/RPI33/RB1
E6 RP113/RG1 K2 PGED3/AN0/RPI32/RB0
E7 No Connect K3 V
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 “Peripheral Pin Select” for
DD F3 C2IN1-/PMA2/RPI121/RG9
CPCON/RP65/RD1 F7 No Connect
CMPST1/RP96/RF0 G2 AN21/RPI89/RE9
CAP G3 TMS/RPI16/RA0
DD G9 TDO/RPI21/RA5
CMPST3/RP71/RD7 H3 No Connect
available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 “I/O Ports” for more information.
3: The availability of I
bits, ALTI2C1 and ALTI2C2 (FPOR<5:4>). See Section 29.0 “Special Features” for more information.
(1,2)
Full Pin Name
2
C interfaces varies by device. Selection (SDAx/ SCLx or ASDAx/ASCLx) is made using the device Configuration
Pin
Number
Full Pin Name
SS
DD
SS
DD
BUSON/VBUSST/RPI37/RB5
DD
BUS
DD
REF+/RA10
© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 15
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
TABLE 3: PIN NAMES: PIC24EP256GU810 AND PIC24EP512GU810
DEVICES
Pin
Number
K4 AN8/PMA6/RPI40/RB8 L3 AVSS
K5 No Connect L4 AN9/PMA7/RPI41/RB9
K6 RP108/RF12 L5 AN10/CV
K7 AN14/PMA1/RPI46/RB14 L6 RP109/RF13
K8 V
K9 RP79/RD15 L8 AN15/PMA0/RPI47/RB15
K10 USBID/RP99/RF3 L9 RPI78/RD14
K11 RP98/RF2 L10 SDA2/PMA9/RP100/RF4
L1 PGEC1/AN6/RPI38/RB6 L11 SCL2/PMA8/RP101/RF5
L2 V
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 “Peripheral Pin Select” for
DD L7 AN13/PMA10/RPI45/RB13
REF-/RA9
available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 “I/O Ports” for more information.
3: The availability of I
bits, ALTI2C1 and ALTI2C2 (FPOR<5:4>). See Section 29.0 “Special Features” for more information.
(1,2)
(CONTINUED)
Full Pin Name
2
C interfaces varies by device. Selection (SDAx/ SCLx or ASDAx/ASCLx) is made using the device Configuration
Pin
Number
Full Pin Name
REF/PMA13/RPI42/RB10
DS70616F-page 16 Preliminary © 2009-2012 Microchip Technology Inc.
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
144-Pin TQFP, 144-pin LQFP
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See
Section 11.4 “Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RKx) can be used as change notification (CNAx-CNKx). See Section 11.0
“I/O Ports” for more information.
3: The availability of I
2
C interfaces varies by device. Selection (SDAx/ SCLx or ASDAx/ASCLx) is made
using the device Configuration bits, ALTI2C1 and ALTI2C2 (FPOR<5:4>). See Section 29.0
“Special Features” for more information.
= Pins are up to 5V tolerant
108
139
1
37
dsPIC33EP512MU814
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
3839404142434445464748495051525354555657585960
61
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
144
143
142
141
140
26
27
28
29
30
31
32
33
34
35
36
114
113
112
111
110
109
83
82
81
80
79
78
77
76
75
74
73
6263646566676869707172
AN29/PWM3H/RP85/RE5
AN31/PWM4H/RP87/RE7
C1IN3-/SCK2/RP118/RG6
C1IN1-/SDI2/RPI119/RG7
C2IN3-/SDO2/RP120/RG8
MCLR
C2IN1-/RPI121/RG9
V
DD
AN5/C1IN1+/V
BUSON/VBUSST
/RPI37/RB5
AN4/C1IN2-/USBOEN/RPI36/RB4
AN3/C2IN1+/VPIO/RPI35/RB3
AN2/C2IN2-/VMIO/RPI34/RB2
PGEC3/AN1/RPI33/RB1
PGED3/AN0/RPI32/RB0
V
SS
AN30/PWM4L/RPI86/RE6
V
DD
V
SS
TMS/RPI16/RA0
AN20/RPI88/RE8
AN21/RPI89/RE9
RK0
RK1
RJ14
RJ15
RP127/RG15
PWM7L/PMA8/RJ8
PWM7H/PMA9/RJ9
PMA10/RJ10
PMA11/RJ11
AN16/PWM5L/RPI49/RC1
AN17/PWM5H/RPI50/ RC2
AN18/PWM6L/RPI51/RC3
AN19/PWM6H/RPI52/ RC4
PMA12/RJ12
PMA13/RJ13
AN28/PWM3L/RP84/RE4
AN27/PWM2H/RPI83/RE3
AN26/PWM2L/RP82/RE2
VSSRP125/RG13
RPI124/RG12
RP126/RG14
AN25/PWM1H/RPI81/RE1
AN24/PWM1L/RP80/RE0
PMA7/RJ7
PMA6/RJ6
PMA5/RJ5
PMA4/RJ4
AN23/RPI23/RA7
AN22/RPI22/RA6
RP112/RG0
RP113/RG1
V
CMPST
2/RP97/RF1
V
CMPST
1/RP96/RF0
V
SSVDDVCAP
C3IN1+/V
CMPST
3/RP71/RD7
C3IN2-/RP70/RD6
RP69/RD5
RP68/RD4
PMA3/RJ3
PMA2/RJ2
PMA1/RJ1
PMA0/RJ0
RPI77/RD13
RPI76/RD12
V
DD
RP67/RD3
DPH/RP66/RD2
V
CPCON
/RP65/RD1
V
SS
PGEC2/SOSCO/C3IN1-/T1CK/RPI62/RC14
PGED2/SOSCI/C3IN3-/RPI61/RC13
INT0/DMH/RP64/RD0
RH15
RH14
RH13
RH12
RPI75/RD11
ASCL1/RPI74/RD10
ASDA1/DPLN/RPI73/RD9
RTCC/DMLN/RPI72/RD8
RPI31/RA15
RPI30/RA14
PMCS1/RK11
PMCS2/RK12
V
SS
OSC2/CLKO/RC15
OSC1/RPI60/RC12
V
DD
TDO/RPI21/RA5
TDI/RPI20/RA4
ASDA2/RPI19/RA3
ASCL2/RPI18/RA2
RH11
RH10
RH9
RH8
RP104/RF8
RP98/RF2
USBID/RP99/RF3
V
SS
PGEC1/AN6/RPI38/RB6
PGED1/AN7/RCV/RPI39/RB7
V
REF
-/RA9
V
REF
+/RA10
AV
DD
AV
SS
PMD0/RH0
PMD1/RH1
PMD2/RH2
PMD3/RH3
AN8/RPI40/RB8
AN9/RPI41/RB9
AN10/CV
REF
/RPI42/RB10
AN11/RPI43/RB11
V
SS
V
DD
PMRD/RK15
PMWR/RK14
PMBE/RK13
TCK/RPI17/RA1
RP109/RF13
RP108/RF12
AN12/RPI44/RB12
AN13/RPI45/RB13
AN14/RPI46/RB14
AN15/RPI47/RB15
V
SS
V
DD
PMD4/RH4
PMD5/RH5
PMD6/RH6
PMD7/RH7
RPI78/RD14
RP79/RD15
SDA2/RP100/RF4
SCL2/RP101/RF5
D+/RG2
D-/RG3
V
USB3V
3
V
BUS
dsPIC33EP256MU814
Pin Diagrams (Continued)
© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 17
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
144-Pin TQFP, 144-pin LQFP
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RKx) can be used as change notification (CNAx-CNKx). See Section 11.0 “I/O
Ports” for more information.
3: The availability of I
2
C interfaces varies by device. Selection (SDAx/ SCLx or ASDAx/ASCLx) is made
using the device Configuration bits, ALTI2C1 and ALTI2C2 (FPOR<5:4>). See Section 29.0 “Special
Features” for more information.
= Pins are up to 5V tolerant
108
139
1
37
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
3839404142434445464748495051525354555657585960
61
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
144
143
142
141
140
26
27
28
29
30
31
32
33
34
35
36
114
113
112
111
110
109
83
82
81
80
79
78
77
76
75
74
73
6263646566676869707172
AN29/RP85/RE5
AN31/RP87/RE7
C1IN3-/SCK2/RP118/RG6
C1IN1-/SDI2/RPI119/RG7
C2IN3-/SDO2/RP120/RG8
MCLR
C2IN1-/RPI121/RG9
V
DD
AN5/C1IN1+/V
BUSON/VBUSST
/RPI37/RB5
AN4/C1IN2-/USBOEN/RPI36/RB4
AN3/C2IN1+/VPIO/RPI35/RB3
AN2/C2IN2-/VMIO/RPI34/RB2
PGEC3/AN1/RPI33/RB1
PGED3/AN0/RPI32/RB0
V
SS
AN30/RPI86/RE6
V
DD
V
SS
TMS/RPI16/RA0
AN20/RPI88/RE8
AN21/RPI89/RE9
RK0
RK1
RJ14
RJ15
RP127/RG15
PMA8/RJ8
PMA9/RJ9
PMA10/RJ10
PMA11/RJ11
AN16/RPI49/RC1
AN17/RPI50/RC2
AN18/RPI51/RC3
AN19/RPI52/RC4
PMA12/RJ12
PMA13/RJ13
AN28/RP84/RE4
AN27/RPI83/RE3
AN26/RP82/RE2
VSSRP125/RG13
RPI124/RG12
RP126/RG14
AN25/RPI81/RE1
AN24/RP80/RE0
PMA7/RJ7
PMA6/RJ6
PMA5/RJ5
PMA4/RJ4
AN23/RPI23/RA7
AN22/RPI22/RA6
RP112/RG0
RP113/RG1
V
CMPST
2/RP97/RF1
V
CMPST
1/RP96/RF0
V
SSVDDVCAP
C3IN1+/V
CMPST
3/RP71/RD7
C3IN2-/RP70/RD6
RP69/RD5
RP68/RD4
PMA3/RJ3
PMA2/RJ2
PMA1/RJ1
PMA0/RJ0
RPI77/RD13
RPI76/RD12
V
DD
RP67/RD3
DPH/RP66/RD2
V
CPCON
/RP65/RD1
V
SS
PGEC2/SOSCO/C3IN1-/T1CK/RPI62/RC14
PGED2/SOSCI/C3IN3-/RPI61/RC13
INT0/DMH/RP64/RD0
RH15
RH14
RH13
RH12
RPI75/RD11
ASCL1/RPI74/RD10
ASDA1/DPLN/RPI73/RD9
RTCC/DMLN/RPI72/RD8
RPI31/RA15
RPI30/RA14
PMCS1/RK11
PMCS2/RK12
V
SS
OSC2/CLKO/RC15
OSC1/RPI60/RC12
V
DD
TDO/RPI21/RA5
TDI/RPI20/RA4
ASDA2/RPI19/RA3
ASCL2/RPI18/RA2
RH11
RH10
RH9
RH8
RP104/RF8
RP98/RF2
USBID/RP99/RF3
V
SS
PGEC1/AN6/RPI38/RB6
PGED1/AN7/RCV/RPI39/RB7
V
REF
-/RA9
V
REF
+/RA10
AV
DD
AV
SS
PMD0/RH0
PMD1/RH1
PMD2/RH2
PMD3/RH3
AN8/RPI40/RB8
AN9/RPI41/RB9
AN10/CV
REF
/RPI42/RB10
AN 11/R PI 43/ RB11
V
SS
V
DD
PMRD/RK15
PMWR/RK14
PMBE/RK13
TCK/RPI17/RA1
RP109/RF13
RP108/RF12
AN12/RPI44/RB12
AN13/RPI45/RB13
AN14/RPI46/RB14
AN15/RPI47/RB15
V
SS
V
DD
PMD4/RH4
PMD5/RH5
PMD6/RH6
PMD7/RH7
RPI78/RD14
RP79/RD15
SDA2/RP100/RF4
SCL2/RP101/ RF5
D+/RG2
D-/RG3
V
USB3V
3
V
BUS
PIC24EP512GU814
PIC24EP256GU814
Pin Diagrams (Continued)
DS70616F-page 18 Preliminary © 2009-2012 Microchip Technology Inc.
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
Table of Contents
1.0 Device Overview ........................................................................................................................................................................ 23
2.0 Guidelines for Getting Started with 16-bit Digital Signal Controllers and Microcontrollers ......................................................... 31
3.0 CPU............................................................................................................................................................................................ 37
4.0 Memory Organization ................................................................................................................................................................. 47
5.0 Flash Program Memory............................................................................................................................................................ 135
6.0 Resets ..................................................................................................................................................................................... 141
7.0 Interrupt Controller ................................................................................................................................................................... 145
8.0 Direct Memory Access (DMA) .................................................................................................................................................. 159
9.0 Oscillator Configuration ............................................................................................................................................................ 177
10.0 Power-Saving Features............................................................................................................................................................ 191
11.0 I/O Ports ................................................................................................................................................................................... 205
12.0 Timer1 ...................................................................................................................................................................................... 269
13.0 Timer2/3, Timer4/5, Timer6/7 and Timer8/9 ............................................................................................................................ 273
14.0 Input Capture............................................................................................................................................................................ 279
15.0 Output Compare....................................................................................................................................................................... 285
16.0 High-Speed PWM Module (dsPIC33EPXXX(MC/MU)8XX Devices Only) ............................................................................... 291
17.0 Quadrature Encoder Interface (QEI) Module (dsPIC33EPXXX(MC/MU)8XX Devices Only)................................................... 319
18.0 Serial Peripheral Interface (SPI)............................................................................................................................................... 335
19.0 Inter-Integrated Circuit™ (I
20.0 Universal Asynchronous Receiver Transmitter (UART) ........................................................................................................... 351
21.0 Enhanced CAN (ECAN™) Module........................................................................................................................................... 357
22.0 USB On-The-Go (OTG) Module (dsPIC33EPXXXMU8XX and PIC24EPGU8XX Devices Only) ............................................ 383
23.0 10-bit/12-bit Analog-to-Digital Converter (ADC) ....................................................................................................................... 411
24.0 Data Converter Interface (DCI) Module.................................................................................................................................... 427
25.0 Comparator Module.................................................................................................................................................................. 435
26.0 Real-Time Clock and Calendar (RTCC) .................................................................................................................................. 447
27.0 Programmable Cyclic Redundancy Check (CRC) Generator .................................................................................................. 457
28.0 Parallel Master Port (PMP)....................................................................................................................................................... 463
29.0 Special Features ...................................................................................................................................................................... 473
30.0 Instruction Set Summary .......................................................................................................................................................... 481
31.0 Development Support............................................................................................................................................................... 491
32.0 Electrical Characteristics .......................................................................................................................................................... 495
33.0 DC and AC Device Characteristics Graphs.............................................................................................................................. 569
34.0 Packaging Information.............................................................................................................................................................. 573
Appendix A: Revision History............................................................................................................................................................. 593
2
C™).............................................................................................................................................. 343
© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 19
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
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enhanced as new volumes and updates are introduced.
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via
E-mail at docerrors@microchip.com or fax the Reader Response Form in the back of this data sheet to (480) 792-4150. We
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You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
The last character of the literature number is the version number, (e.g., DS30000A is version A of document DS30000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current
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DS70616F-page 20 Preliminary © 2009-2012 Microchip Technology Inc.
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
Referenced Sources
This device data sheet is based on the following
individual chapters of the “dsPIC33E/PIC24E Family
Reference Manual”. These documents should be
considered as the general reference for the operation
of a particular module or device feature.
Note: To access the documents listed below,
browse to the documentation section of
the dsPIC33EP512MU814 product page
on the Microchip web site
(www.microchip.com).
In the event you are not able to access
the product page using the link above,
enter this URL in your browser:
http://www.microchip.com/wwwproducts/
Devices.aspx?dDocName=en554310#1
• Section 1. “Introduction” (DS70573)
• Section 2. “CPU” (DS70359)
• Section 3. “Data Memory” (DS70595)
• Section 4. “Program Memory” (DS70613)
• Section 5. “Flash Programming” (DS70609)
• Section 6. “Interrupts” (DS70600)
• Section 7. “Oscillator” (DS70580)
• Section 8. “Reset” (DS70602)
• Section 9. “Watchdog Timer and Power-Saving Modes” (DS70615)
• Section 10. “I/O Ports” (DS70598)
• Section 11. “Timers” (DS70362)
• Section 12. “Input Capture” (DS70352)
• Section 13. “Output Compare” (DS70358)
• Section 14. “High-Speed PWM” (DS70645)
• Section 15. “Quadrature Encoder Interface (QEI)” (DS70601)
• Section 16. “Analog-to-Digital Converter (ADC)” (DS70621)
• Section 17. “UART” (DS70582)
• Section 18. “Serial Peripheral Interface (SPI)” (DS70569)
• Section 19. “Inter-Integrated Circuit™ (I
• Section 20. “Data Converter Interface (DCI)” (DS70356)
• Section 21. “Enhanced Controller Area Network (ECAN™)” (DS70353)
• Section 22. “Direct Memory Access (DMA)” (DS70348)
• Section 23. “CodeGuard™ Security” (DS70634)
• Section 24. “Programming and Diagnostics” (DS70608)
• Section 25. “USB On-The-Go (OTG)” (DS70571)
• Section 26. “Op amp/Comparator” (DS70357)
• Section 27. “Programmable Cyclic Redundancy Check (CRC)” (DS70346)
• Section 28. “Parallel Master Port (PMP)” (DS70576)
• Section 29. “Real-Time Clock and Calendar (RTCC)” (DS70584)
• Section 30. “Device Configuration” (DS70618)
2
C™)” (DS70330)
© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 21
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
NOTES:
DS70616F-page 22 Preliminary © 2009-2012 Microchip Technology Inc.
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
1.0 DEVICE OVERVIEW
Note 1: This data sheet summarizes the features
of the dsPIC33EPXXX(GP/MC/MU)806/
810/814 and PIC24EPXXX(GP/GU)810/
814 families of devices. It is not intended
to be a comprehensive resource. To complement the information in this data
sheet, refer to the related section of the
“dsPIC33E/PIC24E Family Reference
Manual”, which is available from the
Microchip web site (www.microchip.com)
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
This document contains device-specific information for
the dsPIC33EPXXX(GP/MC/MU)806/810/814 and
PIC24EPXXX(GP/GU)810/814 Digital Signal Controller (DSC) and Microcontroller (MCU) devices. The
dsPIC33EPXXX(GP/MC/MU)806/810/814 devices
contain extensive Digital Signal Processor (DSP) functionality with a high-performance 16-bit MCU
architecture.
Figure 1-1 illustrates a general block diagram of the
core and peripheral modules in the
dsPIC33EPXXX(GP/MC/MU)806/810/814 and
PIC24EPXXX(GP/GU)810/814 families of devices.
Table 1-1 lists the functions of the various pins shown
in the pinout diagrams.
© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 23
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
PORTA
PORTB
PORTD
PORTC
Power-up
Timer
Oscillator
Start-up Timer
Instruction
Decode and
Control
OSC1/CLKI
MCLR
VDD, VSS
UART1-
Timing
Generation
ECAN1,
16
PCH PCL
16
Program Counter
16-bit ALU
24
24
24
24
X Data Bus
IR
I2C1,
DCI
PCU
ADC1,
Timers
Input
Capture
Output
Compare
16
16
16
16 x 16
W Reg Array
Divide
Support
Engine
(1)
DSP
ROM Latch
16
Y Data Bus
(1)
EA MUX
X RAGU
X WAGU
Y AGU
(1)
AVDD, AVSS
UART4
SPI4
16
24
16
16
16
16
16
16
16
8
Interrupt
Controller
PSV and Table
Data Access
Control Block
Stac k
Control
Logic
Loop
Control
Logic
Data LatchData Latch
Y Data
RAM
(1)
X Data
RAM
Address
Latch
Address
Latch
Control Signals
to Various Blocks
16
SPI1-
Data Latch
16
16
16
X Address Bus
Y Address Bus
24
Literal Data
ADC2
Program Memory
Watchdog
Timer
POR/BOR
Address Latch
PMP
Comparator
CRC
RTCC
USB
I2C2
ECAN2
QEI1
(1)
,
PWM
(1)
QEI2
(1)
(3 Channel)
PORTE
PORTF
PORTG
PORTH
PORTJ
PORTK
Remappable
Pins
Note 1: This feature or peripheral is only available on dsPIC33EPXXX(MC/MU)806/810/814 devices.
2: This feature or peripheral is only available on dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU806/810/814 devices.
OTG
(2)
FIGURE 1-1: dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
BLOCK DIAGRAM
DS70616F-page 24 Preliminary © 2009-2012 Microchip Technology Inc.
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
TABLE 1-1: PINOUT I/O DESCRIPTIONS
Pin
Pin Name
AN0-AN31 I Analog No Analog input channels.
CLKI
CLKO
OSC1
OSC2
SOSCI
SOSCO
IC1-IC16 I ST Yes Capture inputs 1 through 16.
OCFA
OCFB
OCFC
OC1-OC16
INT0
INT1
INT2
INT3
INT4
RA0-RA7, RA9,
RA10, RA14, RA15
RB0-RB15 I/O ST No PORTB is a bidirectional I/O port.
RC1-RC4,
RC12-RC15
RD0-RD15 I/O ST No PORTD is a bidirectional I/O port.
RE0-RE9 I/O ST No PORTE is a bidirectional I/O port.
RF0-RF6, RF8
RF12, RF13
RG0, RG1
RG2, RG3
(3)
RG6-RG9,
RG12-RG15
RH0-RH15 I/O ST No PORTH is a bidirectional I/O port.
RJ0-RJ15 I/O ST No PORTJ is a bidirectional I/O port.
Legend: CMOS = CMOS compatible input or output Analog = Analog input P = Power
ST = Schmitt Trigger input with CMOS levels O = Output I = Input
PPS = Peripheral Pin Select TTL = TTL input buffer
Note 1: This pin is available on dsPIC33EPXXX(MC/MU)806/810/814 devices only.
DD must be connected at all times.
2: AV
3: These pins are input only on dsPIC33EPXXXMU8XX and PIC24EPXXXGU8XX devices.
4: These pins are only available on dsPIC33EPXXXMU8XX and PIC24EPXXXGU8XX devices.
5: The availability of I
Selection (SDAx/ SCLx or ASDAx/ASCLx) is made using the device Configuration bits ALTI2C1 and
ALTI2C2 (FPOR<5:4>). See Section 29.0 “Special Features” for more information.
6: Analog functionality is activated by enabling the USB module and is not controlled by the ANSEL register.
Typ e
I
Buffer
Type
CMOS
PPS Description
ST/
NoNoExternal clock source input. Always associated with OSC1 pin function.
Oscillator crystal output. Connects to crystal or resonator in Crystal
Oscillator mode. Optionally functions as CLKO in RC and EC modes.
O
I/O
—
I
ST/
CMOS
—
Always associated with OSC2 pin function.
NoNoOscillator crystal input. ST buffer when configured in RC mode; CMOS
otherwise.
Oscillator crystal output. Connects to crystal or resonator in Crystal
Oscillator mode. Optionally functions as CLKO in RC and EC modes.
I
ST/
NoNo32.768 kHz low-power oscillator crystal input; CMOS otherwise.
CMOS
O
O
—
I
ST
I
ST
I
ST
—
I
ST
I
ST
I
ST
I
ST
I
ST
32.768 kHz low-power oscillator crystal output.
Yes
Compare Fault A input (for Compare channels).
Yes
Compare Fault B input (for Compare channels).
Yes
Compare Fault C input (for Compare channels).
Yes
Compare outputs 1 through 16.
No
External interrupt 0.
Yes
External interrupt 1.
Yes
External interrupt 2.
Yes
External interrupt 3.
Yes
External interrupt 4.
I/O ST No PORTA is a bidirectional I/O port.
I/O ST No PORTC is a bidirectional I/O port.
I/O ST No PORTF is a bidirectional I/O port.
I/O
I/O
I/O
ST
ST
ST
2
C interfaces varies by device. Refer to the “Pin Diagrams” section for availability.
No
PORTG is a bidirectional I/O port.
No
PORTG is a bidirectional I/O port.
No
PORTG is a bidirectional I/O port.
© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 25
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin
Pin Name
RK0-RK1,
RK11-RK15
T1CK
T2CK
T3CK
T4CK
T5CK
T6CK
T7CK
T8CK
T9CK
U1CTS
U1RTS
U1RX
U1TX
U2CTS
U2RTS
U2RX
U2TX
U3CTS
U3RTS
U3RX
U3TX
U4CTS
U4RTS
U4RX
U4TX
SCK1
SDI1
SDO1
SS1
SCK2
SDI2
SDO2
SS2
SCK3
SDI3
SDO3
SS3
Legend: CMOS = CMOS compatible input or output Analog = Analog input P = Power
ST = Schmitt Trigger input with CMOS levels O = Output I = Input
PPS = Peripheral Pin Select TTL = TTL input buffer
Note 1: This pin is available on dsPIC33EPXXX(MC/MU)806/810/814 devices only.
DD must be connected at all times.
2: AV
3: These pins are input only on dsPIC33EPXXXMU8XX and PIC24EPXXXGU8XX devices.
4: These pins are only available on dsPIC33EPXXXMU8XX and PIC24EPXXXGU8XX devices.
5: The availability of I
Selection (SDAx/ SCLx or ASDAx/ASCLx) is made using the device Configuration bits ALTI2C1 and
ALTI2C2 (FPOR<5:4>). See Section 29.0 “Special Features” for more information.
6: Analog functionality is activated by enabling the USB module and is not controlled by the ANSEL register.
Typ e
Buffer
Type
PPS Description
I/O ST No PORTK is a bidirectional I/O port.
I
ST
I
ST
I
ST
I
ST
I
ST
I
ST
I
ST
I
ST
I
ST
I
ST
O
I
ST
O
I
ST
O
I
ST
O
I
ST
O
I
ST
O
I
ST
O
I
ST
O
I/O
ST
I
ST
O
I/O
I/O
ST
ST
I
ST
O
I/O
I/O
ST
ST
I
ST
O
I/O
ST
2
C interfaces varies by device. Refer to the “Pin Diagrams” section for availability.
—
—
—
—
—
—
—
—
—
—
—
No
Timer1 external clock input.
Yes
Timer2 external clock input.
Yes
Timer3 external clock input.
Yes
Timer4 external clock input.
Yes
Timer5 external clock input.
Yes
Timer6 external clock input.
Yes
Timer7 external clock input.
Yes
Timer8 external clock input.
Yes
Timer9 external clock input.
Yes
UART1 clear to send.
Yes
UART1 ready to send.
Yes
UART1 receive.
Yes
UART1 transmit.
Yes
UART2 clear to send.
Yes
UART2 ready to send.
Yes
UART2 receive.
Yes
UART2 transmit.
Yes
UART3 clear to send.
Yes
UART3 ready to send.
Yes
UART3 receive.
Yes
UART3 transmit.
Yes
UART4 clear to send.
Yes
UART4 ready to send.
Yes
UART4 receive.
Yes
UART4 transmit.
Yes
Synchronous serial clock input/output for SPI1.
Yes
SPI1 data in.
Yes
SPI1 data out.
Yes
SPI1 slave synchronization or frame pulse I/O.
No
Synchronous serial clock input/output for SPI2.
No
SPI2 data in.
No
SPI2 data out.
Yes
SPI2 slave synchronization or frame pulse I/O.
Yes
Synchronous serial clock input/output for SPI3.
Yes
SPI3 data in.
Yes
SPI3 data out.
Yes
SPI3 slave synchronization or frame pulse I/O.
DS70616F-page 26 Preliminary © 2009-2012 Microchip Technology Inc.
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin
Pin Name
SCK4
SDI4
SDO4
SS4
(5)
SCL1
(5)
SDA1
(5)
ASCL1
(5)
ASDA1
(5)
SCL2
(5)
SDA2
(5)
ASCL2
(5)
ASDA2
TMS
TCK
TDI
TDO
(1)
INDX1
HOME1
QEA1
QEB1
CNTCMP1
INDX2
HOME2
QEA2
QEB2
CNTCMP2
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
COFS
CSCK
CSDI
CSDO
C1RX
C1TX
C2RX
C2TX
RTCC O — No Real-Time Clock Alarm Output.
REF O Analog No Comparator Voltage Reference Output.
CV
Legend: CMOS = CMOS compatible input or output Analog = Analog input P = Power
ST = Schmitt Trigger input with CMOS levels O = Output I = Input
PPS = Peripheral Pin Select TTL = TTL input buffer
Note 1: This pin is available on dsPIC33EPXXX(MC/MU)806/810/814 devices only.
DD must be connected at all times.
2: AV
3: These pins are input only on dsPIC33EPXXXMU8XX and PIC24EPXXXGU8XX devices.
4: These pins are only available on dsPIC33EPXXXMU8XX and PIC24EPXXXGU8XX devices.
5: The availability of I
Selection (SDAx/ SCLx or ASDAx/ASCLx) is made using the device Configuration bits ALTI2C1 and
ALTI2C2 (FPOR<5:4>). See Section 29.0 “Special Features” for more information.
6: Analog functionality is activated by enabling the USB module and is not controlled by the ANSEL register.
Typ e
I/O
I
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
O
I
I
I
Buffer
Type
PPS Description
ST
Yes
Synchronous serial clock input/output for SPI4.
ST
Yes
SPI4 data in.
—
Yes
SPI4 data out.
ST
Yes
SPI4 slave synchronization or frame pulse I/O.
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
No
Synchronous serial clock input/output for I2C1.
No
Synchronous serial data input/output for I2C1.
No
Alternate synchronous serial clock input/output for I2C1.
No
Alternate synchronous serial data input/output for I2C1.
No
Synchronous serial clock input/output for I2C2.
No
Synchronous serial data input/output for I2C2.
No
Alternate synchronous serial clock input/output for I2C2.
No
Alternate synchronous serial data input/output for I2C2.
No
JTAG Test mode select pin.
No
JTAG test clock input pin.
No
JTAG test data input pin.
No
JTAG test data output pin.
Yes
Quadrature Encoder Index1 Pulse input.
Yes
Quadrature Encoder Home1 Pulse input.
Yes
Quadrature Encoder Phase A input in QEI1 mode. Auxiliary Timer
External Clock input in Timer mode.
I
ST
Yes
Quadrature Encoder Phase A input in QEI1 mode. Auxiliary Timer
External Gate input in Timer mode.
O
—
Yes
Quadrature Encoder Compare Output 1.
I
ST
Yes
Quadrature Encoder Index2 Pulse input.
I
ST
Yes
Quadrature Encoder Home2 Pulse input.
I
ST
Yes
Quadrature Encoder Phase A input in QEI2 mode. Auxiliary Timer
External Clock input in Timer mode.
I
ST
Yes
Quadrature Encoder Phase B input in QEI2 mode. Auxiliary Timer
External Gate input in Timer mode.
O
I/O
I/O
O
O
O
—
Yes
Quadrature Encoder Compare Output 2.
ST
Yes
Data Converter Interface frame synchronization pin.
ST
Yes
Data Converter Interface serial clock input/output pin.
I
ST
Yes
Data Converter Interface serial data input pin.
—
Yes
Data Converter Interface serial data output pin.
I
ST—Yes
I
ST—Yes
2
C interfaces varies by device. Refer to the “Pin Diagrams” section for availability.
ECAN1 bus receive pin.
Yes
ECAN1 bus transmit pin.
ECAN2 bus receive pin.
Yes
ECAN2 bus transmit pin.
© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 27
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin
Pin Name
C1IN1+, C1IN2-,
C1IN1-, C1IN3-
C1OUT
C2IN1+, C2IN2-,
C2IN1-, C2IN3C2OUT
C3IN1+, C3IN2-,
C2IN1-, C3IN3C3OUT
PMA0
PMA1
PMA2 -PMA13
PMBE
PMCS1, PMCS2
PMD0-PMD7
PMRD
PMWR
FLT1
DTCMP1-DTCMP7
PWM1L-PWM7L
PWM1H-PWM7H
SYNCI1, SYNCI2
SYNCO1, SYNCO2
(1)
(1)
(1)
(1)
(1)
(1)
-FLT7
Legend: CMOS = CMOS compatible input or output Analog = Analog input P = Power
ST = Schmitt Trigger input with CMOS levels O = Output I = Input
PPS = Peripheral Pin Select TTL = TTL input buffer
Note 1: This pin is available on dsPIC33EPXXX(MC/MU)806/810/814 devices only.
DD must be connected at all times.
2: AV
3: These pins are input only on dsPIC33EPXXXMU8XX and PIC24EPXXXGU8XX devices.
4: These pins are only available on dsPIC33EPXXXMU8XX and PIC24EPXXXGU8XX devices.
5: The availability of I
Selection (SDAx/ SCLx or ASDAx/ASCLx) is made using the device Configuration bits ALTI2C1 and
ALTI2C2 (FPOR<5:4>). See Section 29.0 “Special Features” for more information.
6: Analog functionality is activated by enabling the USB module and is not controlled by the ANSEL register.
Buffer
Typ e
Type
IOAnalog—No
IOAnalog—No
IOAnalog—No
I/O
TTL/ST
PPS Description
Comparator 1 Inputs
Yes
Comparator 1 Output.
Comparator 2 Inputs.
Yes
Comparator 2 Output.
Comparator 3 Inputs.
Yes
Comparator 3 Output.
No
Parallel Master Port Address Bit 0 Input (Buffered Slave modes) and
Output (Master modes).
I/O
TTL/ST
No
Parallel Master Port Address Bit 1 Input (Buffered Slave modes) and
Output (Master modes).
O
O
O
I/O
—
—
—
TTL/ST
No
Parallel Master Port Address Bits 2 - 13 (Demultiplexed Master Modes).
No
Parallel Master Port Byte Enable Strobe.
No
Parallel Master Port Chip Select 1 and 2 Strobe.
No
Parallel Master Port Data (Demultiplexed Master mode) or Address/
Data (Multiplexed Master modes).
O
O
O
O
O
—
No
Parallel Master Port Read Strobe.
—
No
Parallel Master Port Write Strobe.
I
ST
Yes
PWM Fault input 1 through 7.
I
ST
Yes
PWM Dead Time Compensation Input.
—
No
PWM Low output 1 through 7.
—
No
PWM High output 1 through 7.
I
ST
Yes
PWM Synchronization Inputs 1 and 2.
—
Yes
PWM Synchronization Output 1 and 2.
2
C interfaces varies by device. Refer to the “Pin Diagrams” section for availability.
DS70616F-page 28 Preliminary © 2009-2012 Microchip Technology Inc.
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin
Pin Name
(4,6)
VBUS
VUSB
VBUSON
D+
DUSBID
USBOEN
VBUSST
VCPCON
VCMPST1
VCMPST2
VCMPST3
VMIO
VPIO
DMH
DPH
DMLN
DPLN
RCV
(4,6)
(4,6)
3V3
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
PGED1
PGEC1
PGED2
PGEC2
PGED3
PGEC3
MCLR
Legend: CMOS = CMOS compatible input or output Analog = Analog input P = Power
ST = Schmitt Trigger input with CMOS levels O = Output I = Input
PPS = Peripheral Pin Select TTL = TTL input buffer
Note 1: This pin is available on dsPIC33EPXXX(MC/MU)806/810/814 devices only.
DD must be connected at all times.
2: AV
3: These pins are input only on dsPIC33EPXXXMU8XX and PIC24EPXXXGU8XX devices.
4: These pins are only available on dsPIC33EPXXXMU8XX and PIC24EPXXXGU8XX devices.
5: The availability of I
Selection (SDAx/ SCLx or ASDAx/ASCLx) is made using the device Configuration bits ALTI2C1 and
ALTI2C2 (FPOR<5:4>). See Section 29.0 “Special Features” for more information.
6: Analog functionality is activated by enabling the USB module and is not controlled by the ANSEL register.
Buffer
Typ e
I
Type
Analog
P
O
I/O
Analog
I/O
Analog
I
O
I
O
I
I
I
I/O
I/O
O
O
O
O
I
I/O
I
I/O
I
I/O
I
I/P ST No
PPS Description
No
USB Bus Power Monitor.
—
No
USB Internal Transceiver Supply. If the USB module is not being used,
this pin must be connected to V
—
ST
—
ST
—
ST
ST
ST
ST
ST
—
—
—
—
ST
ST
ST
ST
ST
ST
ST
USB Host and On-The-Go (OTG) Bus Power Control Output.
No
D+ pin of internal USB Transceiver.
No
D- pin of internal USB Transceiver.
No
USB OTG ID Detect.
No
USB Output Enabled Control (for external transceiver).
No
USB Boost Controller Overcurrent Detection.
No
USB Boost Controller PWM Signal.
No
USB External Comparator 1 Input.
No
USB External Comparator 2 Input.
No
USB External Comparator 3 Input.
No
USB Differential Minus Input/Output (external transceiver).
No
USB Differential Plus Input/Output (external transceiver).
No
D- External Pull-up Control Output.
No
D+ External Pull-up Control Output.
No
D- External Pull-down Control Output.
No
D+ External Pull-down Control Output.
No
USB Receive Input (from external transceiver).
No
No
Data I/O pin for programming/debugging communication channel 1.
No
Clock input pin for programming/debugging communication channel 1.
No
Data I/O pin for programming/debugging communication channel 2.
No
Clock input pin for programming/debugging communication channel 2.
No
Data I/O pin for programming/debugging communication channel 3.
No
Clock input pin for programming/debugging communication channel 3.
Master Clear (Reset) input. This pin is an active-low Reset to the
DD.
device.
2
C interfaces varies by device. Refer to the “Pin Diagrams” section for availability.
© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 29
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin
Pin Name
(2)
AVDD
AVSS P P No Ground reference for analog modules.
VDD P — No Positive supply for peripheral logic and I/O pins.
V
CAP P — No CPU logic filter capacitor connection.
V
SS P — No Ground reference for logic and I/O pins.
VREF+ I Analog No Analog voltage reference (high) input.
V
REF- I Analog No Analog voltage reference (low) input.
Legend: CMOS = CMOS compatible input or output Analog = Analog input P = Power
ST = Schmitt Trigger input with CMOS levels O = Output I = Input
PPS = Peripheral Pin Select TTL = TTL input buffer
Note 1: This pin is available on dsPIC33EPXXX(MC/MU)806/810/814 devices only.
DD must be connected at all times.
2: AV
3: These pins are input only on dsPIC33EPXXXMU8XX and PIC24EPXXXGU8XX devices.
4: These pins are only available on dsPIC33EPXXXMU8XX and PIC24EPXXXGU8XX devices.
5: The availability of I
Selection (SDAx/ SCLx or ASDAx/ASCLx) is made using the device Configuration bits ALTI2C1 and
ALTI2C2 (FPOR<5:4>). See Section 29.0 “Special Features” for more information.
6: Analog functionality is activated by enabling the USB module and is not controlled by the ANSEL register.
Typ e
Buffer
Type
PPS Description
P P No Positive supply for analog modules. This pin must be connected at all
times.
2
C interfaces varies by device. Refer to the “Pin Diagrams” section for availability.
DS70616F-page 30 Preliminary © 2009-2012 Microchip Technology Inc.
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