Page 1
AOD4184
T
T
N-Channel Enhancement Mode Field Effect Transistor
General Description
The AOD4184 uses advanced trench technology and
design to provide excellent R
charge. With the excellent thermal resistance of the
DPAK package, this device is well suited for high
current load applications.
-RoHS Compliant
-Halogen Free*
O-252
G
D-PAK
S
op View
D
Absolute Maximum Ratings T
Drain-Source Voltage
T
Continuous Drain
Current
B,H
Pulsed Drain Current
Avalanche Current
=25°C
C
T
=100°C
C
C
C
Repetitive avalanche energy L=0.1mH
TC=25°C
Power Dissipation
Power Dissipation
B
A
TC=100°C
T
=25°C
A
=70°C
T
A
Junction and Storage Temperature Range
with low gate
DS(ON)
Bottom View
S
=25°C unless otherwise noted
A
G
Symbol
V
DS
V
GS
I
D
I
DM
I
C
AR
E
AR
P
D
P
DSM
TJ, T
STG
Features
VDS (V) = 40V
= 50A (VGS = 10V)
I
D
R
R
100% UIS Tested!
100% Rg Tested!
< 8mΩ (VGS = 10V)
DS(ON)
< 11mΩ (VGS = 4.5V)
DS(ON)
G
Maximum UnitsParameter
40
50
40
120
35
61
50
25
2.3
1.5
-55 to 175
D
S
V
V±20Gate-Source Voltage
A
mJ
W
°C
Thermal Characteristics
Parameter Units
Maximum Junction-to-Ambient
Maximum Junction-to-Ambient
Maximum Junction-to-Case
D,F
A,G
A,G
t ≤ 10s
Steady-State
Steady-State
Symbol Typ Max
R
θJA
R
θJC
18 22
44 55
2.4 3
°C/W
°C/W
°C/W
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AOD4184
Electrical Characteristics (T
Symbol Min Typ Max Units
=25°C unless otherwise noted)
J
Parameter Conditions
STATIC PARAMETERS
BV
I
DSS
I
GSS
V
GS(th)
I
D(ON)
R
DS(ON)
g
FS
V
SD
I
S
DSS
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Body leakage current
I
V
V
Gate Threshold Voltage V
On state drain current
V
VGS=10V, ID=20A
Static Drain-Source On-Resistance
V
Forward Transconductance
Diode Forward Voltage
V
I
Maximum Body-Diode Continuous Current
=250µA, VGS=0V
D
=40V, VGS=0V
DS
=0V, VGS= ±20V
DS
DS=VGS ID
=10V, VDS=5V
GS
=4.5V, ID=15A
GS
=5V, ID=5A
DS
=1A,VGS=0V
S
=250µA
T
=55°C
J
T
=125°C
J
40 V
1
5
±100
µA
nA
1.7 2.2 2.6 V
120 A
6.7 8
11 13
mΩ
8.5 11
37 S
0.72 1 V
20 A
DYNAMIC PARAMETERS
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate resistance V
=0V, VDS=20V, f=1MHz
V
GS
=0V, VDS=0V, f=1MHz
GS
1500 pF
215 pF
135 pF
2 3.5 5 Ω
SWITCHING PARAMETERS
Q
(10V)
g
(4.5V)
Q
g
Q
gs
Q
gd
t
D(on)
t
r
t
D(off)
t
f
t
rr
Q
rr
A: The value of R
are based on T
B. The power dissipation P
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature T
D. The R
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink,
assuming a maximum junction temperature of T
G. These tests are performed with the device mounted on 1 in
H. The maximum current rating is limited by bond-wires.
*This device is guaranteed green after data code 8X11 (Sep 1
Rev3: Nov 2008
Total Gate Charge
Total Gate Charge
Gate Source Charge
V
I
D
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
V
R
Turn-Off Fall Time
I
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
is measured with the device in a still air environment with T A =25°C. The power dissipation P
θJA
=150°C, using steady state junction-to-ambient thermal resistance.
J(MAX)
is the sum of the thermal impedence from junction to case R
θJA
is based on T
D
=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
J(MAX)
=175°C. The SOA curve provides a single pulse rating.
J(MAX)
F
I
F
2
FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
ST
2008).
=10V, VDS=20V,
GS
=20A
=10V, VDS=20V, RL=1Ω,
GS
=3Ω
GEN
=20A, dI/dt=100A/µs
=20A, dI/dt=100A/µs
=175°C.
J(MAX)
and case to ambient.
θJC
TBD
TBD
27.2 35.4 nC
13.6 nC
4.5 nC
6.4 nC
6.4 ns
17.2 ns
29.6 ns
16.8 ns
29 38
26 nC
and current rating I
DSM
ns
DSM
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Alpha & Omega Semiconductor, Ltd. www.aosmd.com
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AOD4184
S
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTIC
120
10V
(A)
D
I
100
80
60
40
4.5V
6.0V
4.0V
VGS=3.5V
`
20
0
012345
VDS (Volts)
Figure 1: On-Region Characteristics
10
9
)
Ω
8
VGS=4.5V
(m
7
DS(ON)
R
VGS=10V
6
5
0 5 10 15 20 25 30
I
(A)
D
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage
100
VDS=5V
80
25°C
60
(A)
D
I
40
20
0
2 2.5 3 3.5 4 4.5
V
(Volts)
GS
Figure 2: Transfer Characteristics
2.2
2
1.8
1.6
VGS=10V
I
=20A
D
1.4
Normalized On-Resistance
1.2
1
0.8
VGS=4.5V
I
D
0.6
-50 -25 0 25 50 75 100 125 150 175 200
Temperature (°C)
Figure 4: On-Resistance vs. Junction
Temperature
125°C
=15A
25
I
=20A
20
)
Ω
(m
15
DS(ON)
R
125°C
10
25°C
5
246810
V
(Volts)
GS
Figure 5: On-Resistance vs. Gate-Source Voltage
100
10
0.1
(A)
S
I
0.01
0.001
0.0001
0.00001
1
125°C
25°C
0 0.2 0.4 0.6 0.8 1 1.2
(Volts)
V
SD
Figure 6: Body-Diode Characteristics
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Page 4
AOD4184
S
o
g
ss
V
0us
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTIC
10
VDS=20V
=20A
I
D
8
6
(Volts)
GS
4
V
2
0
0 5 10 15 20 25 30
Qg (nC)
Figure 7: Gate-Charge Characteristics
1000
R
DS(ON)
limited
100
10
(Amps)
D
I
1
T
=175°C
J(Max)
=25°C
T
C
1
1ms
10ms
2500
2000
C
1500
i
1000
Capacitance (pF)
500
C
rss
0
C
oss
0 10203040
V
(Volts)
DS
Figure 8: Capacitance Characteristics
1500
T
=175°C
J(Max)
=25°C
T
1200
C
900
600
Power (W)
300
0.1
0.1 1 10 100
DS (Volts)
Figure 9:Maximum Forward Biased
Safe Operating Area(NoteF)
10
D=Ton/T
T
J,PK=Tc+PDM.ZθJC.RθJC
R
=3°C/W
θJC
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, sin
0
0.00001 0.0001 0.001 0.01 0.1 1
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Case (Note F)
150
le pulse
1
P
0.1
Normalized Transient
Thermal Resistance
Jc
θ
Z
Single Pulse
D
T
n
T
0.01
0.00001 0.0001 0.001 0.01 0.1 1
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
mJ
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Page 5
AOD4184
A
,
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
60
50
(A)
D
40
TA=25°C
30
20
Current rating I
10
0
0 25 50 75 100 125 150 175
T
(°C)
CASE
Figure 12: Current De-rating (Note B)
10000
1000
100
Power (W)
60
50
40
30
20
Power Dissipation (W)
10
0
0 25 50 75 100 125 150 175
T
(°C)
CASE
Figure 13: Power De-rating (Note B)
T
=150°C
J(Max)
=25°C
T
10
1
0.0001 0.001 0.01 0.1 1 10 100 1000
Pulse Width (s)
Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note H)
10
D=Ton/T
T
J,PK=TA+PDM.ZθJA.RθJA
R
1
=55°C/W
θJA
In descending order
0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=0.5
0.1
P
Normalized Transient
Thermal Resistance
0.01
JA
θ
Z
Single Pulse
D
T
T
0.001
0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Pulse Width (s)
Figure 15: Normalized Maximum Transient Thermal Impedance (Note H)
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Page 6
AOD4184
80
60
40
20
(A) Peak Avalanche Current
AR
I
0
0.000001 0.00001 0.0001 0.001
Time in avalanche, t
Figure 16: Single Pulse Avalanche capability (Note
C)
A
(s)
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Page 7
AOD4184
VDC
Gate Charge Test Circuit & Waveform
Vgs
Qg
+
+
Vds
DUT
VDC
-
-
10V
Qgs Qgd
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
Vgs
Vgs
Vds +
Rg
Rg
Vgs
Vgs
Vds
Id
DUT
DUT
VDC
+
Vdd
-
Vgs
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
Vgs
VDC
+
Vdd
-
DUT
Diode Recovery Test Circuit & Waveforms
Vds
Id
Vgs
Vgs
tt
r
d(on)
t
on
E = 1/2 LI
AR
2
AR
Q = - Idt
rr
t
d(off)
t
f
t
off
90%
10%
BV
I
AR
DSS
t
Vds -
Ig
Vgs
Isd
L
+
Vdd
VDC
-
Isd
Vds
I
F
dI/dt
rr
I
RM
Vdd
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