Datasheet DS90C401MX, DS90C401MDC, DS90C401M Datasheet (NSC)

DS90C401
Dual Low Voltage Differential Signaling (LVDS) Driver

General Description

The DS90C401 is a dual driver device optimized for high
data rate and low power applications. This device along with
the DS90C402 provides a pair chip solution for a dual high
speed point-to-point interface. The DS90C401 is a current
mode driverallowingpower dissipation to remain low even at
high frequency. In addition, the short circuit fault current is
also minimized. The device is in a 8 lead small outline pack­age. The differential driver outputs provides low EMI with its
low output swings typically 340 mV.

Features

n Ultra low power dissipation
n Operates above 155.5 Mbps
n Standard TIA/EIA-644
n 8 Lead SOIC Package saves space
n Low Differential Output Swing typical 340 mV

Connection Diagram

Functional Diagram

DS100013-1

Order Number DS90C401M

See NS Package Number M08A

DS100013-2

June 1998

DS90C401 Dual Low Voltage Differential Signaling (LVDS) Driver

© 1998 National Semiconductor Corporation DS100013 www.national.com

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

Supply Voltage (V

CC

) −0.3V to +6V

Input Voltage (D

IN

) −0.3V to (VCC+ 0.3V)

Output Voltage (D

OUT+,DOUT−

) −0.3V to (VCC+ 0.3V)

Short Circuit Duration

(D

OUT+,DOUT−

) Continuous

Maximum Package Power Dissipation

@

+25˚C

M Package 1068 mW
Derate M Package 8.5 mW/˚C above +25˚C
Storage Temperature Range −65˚C to +150˚C
Lead Temperature Range

Soldering (4 sec.) +260˚C

Maximum Junction Temperature +150˚C

ESD Rating

(HBM, 1.5 kΩ, 100 pF) ≥ 3,500V
(EIAJ, 0 Ω, 200 pF) ≥ 250V

Recommended Operating
Conditions

Min Typ Max Units

Supply Voltage (V

CC

) +4.5 +5.0 +5.5 V

Operating Free Air

Temperature (T

A

) −40 +25 +85 ˚C

Electrical Characteristics

Over supply voltage and operating temperature ranges, unless otherwise specified. (Notes 2, 3)

Symbol Parameter Conditions Pin Min Typ Max Units

V

OD1

Differential Output Voltage RL= 100Ω (

Figure 1

)D

OUT−

,

D

OUT+

250 340 450 mV

∆V

OD1

Change in Magnitude of V

OD1

for Complementary Output
States

4 35 |mV|

V

OS

Offset Voltage 1.125 1.25 1.375 V

∆V

OS

Change in Magnitude of VOSfor
Complementary Output States

5 25 |mV|

V

OH

Output Voltage High RL= 100Ω 1.41 1.60 V

V

OL

Output Voltage Low 0.90 1.07 V

I

OS

Output Short Circuit Current V

OUT

= 0V (Note 8) −3.5 −5.0 mA

V

IH

Input Voltage High D

IN

2.0 V

CC

V

V

IL

Input Voltage Low GND 0.8 V

I

I

Input Current VIN=VCC, GND, 2.5V or 0.4V −10

±

1 +10 µA

V

CL

Input Clamp Voltage ICL= −18 mA −1.5 −0.8 V

I

CC

No Load Supply Current DIN=VCCor GND V

CC

1.7 3.0 mA

D

IN

= 2.5V or 0.4V 3.5 5.5 mA

I

CCL

Loaded Supply Current RL= 100Ω All Channels

V

IN=VCC

or GND (all inputs)

8 14.0 mA

Switching Characteristics

VCC= +5.0V±10%,TA= −40˚C to +85˚C (Notes 3, 4, 5, 6, 9)

Symbol Parameter Conditions Min Typ Max Units

t

PHLD

Differential Propagation Delay High to Low RL= 100Ω,CL=5pF

(

Figure 2

and

Figure 3

)

0.5 2.0 3.5 ns

t

PLHD

Differential Propagation Delay Low to High 0.5 2.1 3.5 ns

t

SKD

Differential Skew |t

PHLD–tPLHD

| 0 80 900 ps

t

SK1

Channel-to-Channel Skew (Note 4) 0 0.3 1.0 ns

t

SK2

Chip to Chip Skew (Note 5) 3.0 ns

t

TLH

Rise Time 0.35 2.0 ns

t

THL

Fall Time 0.35 2.0 ns

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Parameter Measurement Information

Typical Application

Applications Information

LVDSdrivers and receivers are intended to be primarily used
in an uncomplicated point-to-point configuration as is shown
in

Figure 4

. This configuration provides a clean signaling en­vironment for the quick edge rates of the drivers. The re­ceiver is connected to the driver through a balanced media
which may be a standard twisted pair cable, a parallel pair
cable, or simply PCB traces. Typically, the characteristic im-

pedance of the media is in the range of 100Ω. A termination
resistor of 100Ω should be selected to match the media, and
is located as close to the receiver input pins as possible. The
termination resistor converts the current sourced by the
driver into a voltage that is detected by the receiver. Other
configurations are possible such as a multi-receiver configu­ration, but the effects of a mid-stream connector(s), cable

DS100013-4

FIGURE 1. Driver VODand VOSTest Circuit

DS100013-5

FIGURE 2. Driver Propagation Delay and Transition Time Test Circuit

DS100013-6

FIGURE 3. Driver Propagation Delay and Transition Time Waveforms

DS100013-9

FIGURE 4. Point-to-Point Application

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Applications Information (Continued)

stub(s), and other impedance discontinuities as well as
ground shifting, noise margin limits, and total termination
loading must be taken into account.

The DS90C401 differential line driver is a balanced current
source design. A current mode driver, generally speaking
has a high output impedance and supplies a constant cur­rent for a range of loads (a voltage mode driver on the other
hand supplies a constant voltage for a range of loads). Cur­rent is switched through the load in one direction to produce
a logic state and in the other direction to produce the other
logic state. The typical output current is mere 3.4 mA, a mini­mum of 2.5 mA, and a maximum of 4.5 mA. The current
mode requires (as discussed above) that a resistive termi­nation be employed to terminate the signal and to complete
the loop as shown in

Figure 4

. AC or unterminated configu­rations are not allowed. The 3.4 mA loop current will develop
a differential voltage of 340 mV across the 100Ω termination
resistor which the receiver detects with a 240 mV minimum
differential noise margin neglecting resistive line losses

(driven signal minus receiver threshold (340 mV – 100 mV =
240 mV)). The signal is centered around +1.2V (Driver Off­set, V

OS

) with respect to ground as shown in

Figure 5

. Note

that the steady-state voltage (V

SS

) peak-to-peak swing is

twice the differential voltage (V

OD

) and is typically 680 mV.

The current mode driver provides substantial benefits over
voltage mode drivers, such as an RS-422 driver. Its quies­cent current remains relatively flat versus switching fre­quency.Whereas the RS-422 voltage mode driver increases
exponentially in most case between 20 MHz–50 MHz. This
is due to the overlap current that flows between the rails of
the device when the internal gates switch. Whereas the cur­rent mode driver switches a fixed current between its output
without any substantial overlap current. This is similar to
some ECL and PECL devices, but without the heavy static
I

CC

requirements of the ECL/PECL designs. LVDS requires
80%less current than similar PECL devices. AC specifica­tions for the driver are a tenfold improvement over other ex­isting RS-422 drivers.

Pin Descriptions

TABLE 1. Device Pin Descriptions

Pin No. Name Description

4, 8 D

IN

TTL/CMOS driver input pins

3, 7 D

OUT+

Non-inverting driver output pin

2, 6 D

OUT−

Inverting driver output pin

5 GND Ground pin

Pin No. Name Description

1V

CC

Positive power supply pin,
+5.0V

±

10

%

Ordering Information

Operating Package Type/ Order Number

Temperature Number

−40˚C to +85˚C SOP/M08A DS90C401M

Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.

Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except: V

OD1

and

∆V

OD1

.

Note 3: All typicals are given for: V

CC

= +5.0V,TA= +25˚C.

Note 4: Channel-to-Channel Skew is defined as the difference between the propagation delay of the channel and the other channels in the same chip with an event
on the inputs.

Note 5: Chip to Chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays.
Note 6: Generator waveform for all tests unless otherwise specified:f=1MHz, Z

O

=50Ω,tr≤6 ns, and tf≤ 6 ns.

Note 7: ESD Ratings:

HBM (1.5 kΩ, 100 pF) ≥ 3,500V
EIAJ (0Ω, 200 pF) ≥ 250V

Note 8: Output short circuit current (I

OS

) is specified as magnitude only, minus sign indicates direction only.

DS100013-10

FIGURE 5. Driver Output Levels

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Ordering Information (Continued)

Note 9: CLincludes probe and jig capacitance.

Truth Table
INPUT/OUTPUT

D

IN

D

OUT+

D

OUT−

LLH
HHL

D

IN

>

0.8V and D

IN

<

2.0V X X

H = Logic high level
L = Logic low level
X = Indeterminant state

Typical Performance Characteristics

Power Supply Current
vs Power Supply Voltage

DS100013-11

Power Supply Current
vs Temperature

DS100013-12

Power Supply Current
vs Power Supply Voltage

DS100013-13

Power Supply Current
vs Temperature

DS100013-14

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Typical Performance Characteristics (Continued)

Output Short Circuit Current
vs Power Supply Voltage

DS100013-16

Differential Output Voltage
vs Power Supply Voltage

DS100013-17

Differential Output Voltage
vs Ambient Temperature

DS100013-18

Output Voltage High vs
Power Supply Voltage

DS100013-19

Output Voltage High vs
Ambient Temperature

DS100013-20

Output Voltage Low vs
Power Supply Voltage

DS100013-21

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Typical Performance Characteristics (Continued)

Output Voltage Low vs
Ambient Temperature

DS100013-22

Offset Voltage vs
Power Supply Voltage

DS100013-23

Offset Voltage vs
Ambient Temperature

DS100013-24

Power Supply Current
vs Frequency

DS100013-25

Differential Output Voltage
vs Load Resistor

DS100013-27

Differential Propagation Delay
vs Power Supply Voltage

DS100013-28

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Typical Performance Characteristics (Continued)

Differential Propagation Delay
vs Ambient Temperature

DS100013-29

Differential Skew vs
Power Supply Voltage

DS100013-30

Differential Skew vs
Ambient Temperature

DS100013-31

Differential Transition Time
vs Power Supply Voltage

DS100013-32

Differential Transition Time
vs Ambient Temperature

DS100013-33

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9

Physical Dimensions inches (millimeters) unless otherwise noted

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device or system whose failure to perform can be rea­sonably expected to cause the failure of the life support
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8-Lead (0.150" Wide) Molded Small Outline Package, JEDEC

Order Number DS90C401M
NS Package Number M08A

DS90C401 Dual Low Voltage Differential Signaling (LVDS) Driver

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.