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DS90C031E-MIL
Datasheet (NSC)
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Datasheet DS90C031TMX, DS90C031TM, DS90C031E-MIL, 5962-9583301Q2A Datasheet (NSC)

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Page 1
DS90C031 LVDS Quad CMOS Differential Line Driver
General Description
The DS90C031 is a quad CMOS differential line driver de­signed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 155.5 Mbps (77.7 MHz) utilizing Low Volt­age Differential Signaling (LVDS) technology.
®
function that may be used to disable the output stage, disabling the load current, andthusdroppingthedeviceto an ultra low idle power state of 11 mW typical.
The DS90C031 and companion line receiver (DS90C032) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.
Features
n
>
155.5 Mbps (77.7 MHz) switching rates
n
±
350 mV differential signaling
n Ultra low power dissipation n 400 ps maximum differential skew (5V, 25˚C) n 3.5 ns maximum propagation delay n Industrial operating temperature range n Military operating temperature range option n Available in surface mount packaging (SOIC) and (LCC) n Pin compatible with DS26C31, MB571 (PECL) and
41LG (PECL)
n Compatible with IEEE 1596.3 SCI LVDS standard n Conforms to ANSI/TIA/EIA-644 LVDS standard n Available to Standard Microcircuit Drawing (SMD)
5962-95833
Connection Diagrams
TRI-STATE®is a registered trademark of National Semiconductor Corporation.
Dual-In-Line
DS011946-1
Order Number DS90C031TM
See NS Package Number M16A
LCC Package
DS011946-33
Order Number DS90C031E-QML
See NS Package Number E20A
For Complete Military Specifications,
refer to appropriate SMD or MDS.
June 1998
DS90C031 LVDS Quad CMOS Differential Line Driver
© 1998 National Semiconductor Corporation DS011946 www.national.com
Page 2
Functional Diagram
Truth Table DRIVER
Enables Input Outputs
EN EN* D
IN
D
OUT+
D
OUT−
LHXZZ All other combinations L L H of ENABLE inputs H H L
DS011946-2
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Page 3
Absolute Maximum Ratings (Note 1)
Supply Voltage (V
CC
) −0.3V to +6V
Input Voltage (D
IN
) −0.3V to (VCC+ 0.3V)
Enable Input Voltage (EN, EN*) −0.3V to (V
CC
+ 0.3V)
Output Voltage (D
OUT+,DOUT−
) −0.3V to (VCC+ 0.3V)
Short Circuit Duration
(D
OUT+,DOUT−
) Continuous
Maximum Package Power Dissipation
@
+25˚C M Package 1068 mW E Package 1900 mW
Derate M Package 8.5 mW/˚C above +25˚C Derate E Package 12.8 mW/˚C above +25˚C Storage Temperature Range −65˚C to +150˚C Lead Temperature Range
Soldering (4 sec.) +260˚C
Maximum Junction Temperature
(DS90C031T) +150˚C
Maximum Junction Temperature
(DS90C031E) +175˚C
ESD Rating (Note 7)
(HBM, 1.5 kΩ, 100 pF) ≥ 3,500V (EIAJ, 0 Ω, 200 pF) ≥ 250V
Recommended Operating Conditions
Min Typ Max Units
Supply Voltage (V
CC
) +4.5 +5.0 +5.5 V
Operating Free Air Temperature (T
A
) DS90C031T −40 +25 +85 ˚C DS90C031E −55 +25 +125 ˚C
Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified. (Notes 2, 3)
Symbol Parameter Conditions Pin Min Typ Max Units
V
OD1
Differential Output Voltage RL= 100Ω (
Figure 1
)D
OUT−
,
D
OUT+
250 345 450 mV
∆V
OD1
Change in Magnitude of V
OD1
for Complementary Output States
4 35 |mV|
V
OS
Offset Voltage 1.125 1.25 1.375 V
∆V
OS
Change in Magnitude of VOSfor Complementary Output States
5 25 |mV|
V
OH
Output Voltage High RL= 100Ω 1.41 1.60 V
V
OL
Output Voltage Low 0.90 1.07 V
V
IH
Input Voltage High DIN,
EN, EN*
2.0 V
CC
V
V
IL
Input Voltage Low GND 0.8 V
I
I
Input Current VIN=VCC, GND, 2.5V or 0.4V −10
±
1 +10 µA
V
CL
Input Clamp Voltage ICL= −18 mA −1.5 −0.8 V
I
OS
Output Short Circuit Current V
OUT
= 0V (Note 8) D
OUT−
,
D
OUT+
−3.5 −5.0 mA
I
OZ
Output TRI-STATE Current EN = 0.8V and EN* = 2.0V,
V
OUT
=0VorV
CC
−10
±
1 +10 µA
I
CC
No Load Supply Current Drivers Enabled
DIN=VCCor GND DS90C031T V
CC
1.7 3.0 mA
D
IN
= 2.5V or 0.4V 4.0 6.5 mA
I
CCL
Loaded Supply Current Drivers Enabled
RL= 100Ω All Channels V
IN=VCC
or GND
(all inputs)
DS90C031T 15.4 21.0 mA DS90C031E 15.4 25.0 mA
I
CCZ
No Load Supply Current Drivers Disabled
DIN=VCCor GND EN = GND, EN* = V
CC
DS90C031T 2.2 4.0 mA DS90C031E 2.2 10.0 mA
Switching Characteristics
VCC= +5.0V, TA= +25˚C DS90C031T. (Notes 3, 4, 6, 9)
Symbol Parameter Conditions Min Typ Max Units
t
PHLD
Differential Propagation Delay High to Low RL= 100Ω,CL=5pF
(
Figure 2
and
Figure 3
)
1.0 2.0 3.0 ns
t
PLHD
Differential Propagation Delay Low to High 1.0 2.1 3.0 ns
t
SKD
Differential Skew |t
PHLD–tPLHD
| 0 80 400 ps
t
SK1
Channel-to-Channel Skew (Note 4) 0 300 600 ps
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Switching Characteristics (Continued)
VCC= +5.0V, TA= +25˚C DS90C031T. (Notes 3, 4, 6, 9)
Symbol Parameter Conditions Min Typ Max Units
t
TLH
Rise Time 0.35 1.5 ns
t
THL
Fall Time 0.35 1.5 ns
t
PHZ
Disable Time High to Z RL= 100Ω,
C
L
=5pF
(
Figure 4
and
Figure 5
)
2.5 10 ns
t
PLZ
Disable Time Low to Z 2.5 10 ns
t
PZH
Enable Time Z to High 2.5 10 ns
t
PZL
Enable Time Z to Low 2.5 10 ns
Switching Characteristics
VCC= +5.0V±10%,TA= −40˚C to +85˚C DS90C031T. (Notes 3, 4, 5, 6, 9)
Symbol Parameter Conditions Min Typ Max Units
t
PHLD
Differential Propagation Delay High to Low RL= 100Ω,CL=5pF
(
Figure 2
and
Figure 3
)
0.5 2.0 3.5 ns
t
PLHD
Differential Propagation Delay Low to High 0.5 2.1 3.5 ns
t
SKD
Differential Skew |t
PHLD–tPLHD
| 0 80 900 ps
t
SK1
Channel-to-Channel Skew (Note 4) 0 0.3 1.0 ns
t
SK2
Chip to Chip Skew (Note 5) 3.0 ns
t
TLH
Rise Time 0.35 2.0 ns
t
THL
Fall Time 0.35 2.0 ns
t
PHZ
Disable Time High to Z RL= 100Ω,
C
L
=5pF
(
Figure 4
and
Figure 5
)
2.5 15 ns
t
PLZ
Disable Time Low to Z 2.5 15 ns
t
PZH
Enable Time Z to High 2.5 15 ns
t
PZL
Enable Time Z to Low 2.5 15 ns
Switching Characteristics
VCC= +5.0V±10%,TA= −55˚C to +125˚C DS90C031E. (Notes 3, 4, 5, 6, 9, 10)
Symbol Parameter Conditions Min Typ Max Units
t
PHLD
Differential Propagation Delay High to Low RL= 100Ω,CL=20pF
(
Figure 3
)
C
L
Connected between
each Output and GND
0.5 2.0 5.0 ns
t
PLHD
Differential Propagation Delay Low to High 0.5 2.1 5.0 ns
t
SKD
Differential Skew |t
PHLD–tPLHD
| 0 0.08 3.0 ns
t
SK1
Channel-to-Channel Skew (Note 4) 0 0.3 3.0 ns
t
SK2
Chip to Chip Skew (Note 5) 4.5 ns
t
PHZ
Disable Time High to Z RL= 100Ω,
C
L
=5pF
(
Figure 4
and
Figure 5
)
2.5 20 ns
t
PLZ
Disable Time Low to Z 2.5 20 ns
t
PZH
Enable Time Z to High 2.5 20 ns
t
PZL
Enable Time Z to Low 2.5 20 ns
Parameter Measurement Information
DS011946-3
FIGURE 1. Driver VODand VOSTest Circuit
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Parameter Measurement Information (Continued)
DS011946-4
FIGURE 2. Driver Propagation Delay and Transition Time Test Circuit
DS011946-5
FIGURE 3. Driver Propagation Delay and Transition Time Waveforms
DS011946-6
FIGURE 4. Driver TRI-STATE Delay Test Circuit
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Parameter Measurement Information (Continued)
Typical Application
Applications Information
LVDSdrivers and receivers are intended to be primarily used in an uncomplicated point-to-point configuration as is shown in
Figure 6
. This configuration provides a clean signaling en­vironment for the quick edge rates of the drivers. The re­ceiver is connected to the driver through a balanced media which may be a standard twisted pair cable, a parallel pair cable, or simply PCB traces. Typically, the characteristic im­pedance of the media is in the range of 100Ω. A termination resistor of 100Ω should be selected to match the media, and is located as close to the receiver input pins as possible. The termination resistor converts the current sourced by the driver into a voltage that is detected by the receiver. Other configurations are possible such as a multi-receiver configu­ration, but the effects of a mid-stream connector(s), cable stub(s), and other impedance discontinuities as well as ground shifting, noise margin limits, and total termination loading must be taken into account.
The DS90C031 differential line driver is a balanced current source design. A current mode driver, generally speaking has a high output impedance and supplies a constant cur­rent for a range of loads (a voltage mode driver on the other hand supplies a constant voltage for a range of loads). Cur­rent is switched through the load in one direction to produce a logic state and in the other direction to produce the other logic state. The typical output current is mere 3.4 mA, a mini­mum of 2.5 mA, and a maximum of 4.5 mA. The current mode requires (as discussed above) that a resistive termi-
nation be employed to terminate the signal and to complete the loop as shown in
Figure 6
. AC or unterminated configu­rations are not allowed. The 3.4 mA loop current will develop a differential voltage of 340 mV across the 100Ω termination resistor which the receiver detects with a 240 mV minimum differential noise margin neglecting resistive line losses (driven signal minus receiver threshold (340 mV – 100 mV = 240 mV)). The signal is centered around +1.2V (Driver Off­set, V
OS
) with respect to ground as shown in
Figure 7
. Note
that the steady-state voltage (V
SS
) peak-to-peak swing is
twice the differential voltage (V
OD
) and is typically 680 mV.
The current mode driver provides substantial benefits over voltage mode drivers, such as an RS-422 driver. Its quies­cent current remains relatively flat versus switching fre­quency.Whereas the RS-422 voltage mode driver increases exponentially in most case between 20 MHz–50 MHz. This is due to the overlap current that flows between the rails of the device when the internal gates switch. Whereas the cur­rent mode driver switches a fixed current between its output without any substantial overlap current. This is similar to some ECL and PECL devices, but without the heavy static I
CC
requirements of the ECL/PECL designs. LVDS requires 80%less current than similar PECL devices. AC specifica­tions for the driver are a tenfold improvement over other ex­isting RS-422 drivers.
The TRI-STATE function allows the driver outputs to be dis­abled, thus obtaining an even lower power state when the transmission of data is not required.
DS011946-7
FIGURE 5. Driver TRI-STATE Delay Waveform
DS011946-8
FIGURE 6. Point-to-Point Application
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Applications Information (Continued)
The footprint of the DS90C031 is the same as the industry standard 26LS31 Quad Differential (RS-422) Driver.
Pin Descriptions
Pin No. Name Description
(SOIC)
1, 7,
9, 15
D
IN
Driver input pin, TTL/CMOS compatible
2, 6,
10, 14
D
OUT+
Non-inverting driver output pin, LVDS levels
3, 5,
11, 13
D
OUT−
Inverting driver output pin, LVDS levels
4 EN Active high enable pin, OR-ed
with EN*
12 EN* Active low enable pin, OR-ed
with EN
Pin No. Name Description
(SOIC)
16 V
CC
Power supply pin, +5V±10
%
8 GND Ground pin
Ordering Information
Operating Package Type/ Order Number
Temperature Number
−40˚C to +85˚C SOP/M16A DS90C031TM
−55˚C to +125˚C LCC/E20A DS90C031E-QML DS90C031E-QML (NSID) 5962-95833 (SMD)
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except: V
OD1
and
∆V
OD1
.
Note 3: All typicals are given for: V
CC
= +5.0V, TA= +25˚C.
Note 4: Channel-to-Channel Skew is defined as the difference between the propagation delay of the channel and the other channels in the same chip with an event on the inputs.
Note 5: Chip to Chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays. Note 6: Generator waveform for all tests unless otherwise specified:f=1MHz, Z
O
=50Ω,tr≤6 ns, and tf≤ 6 ns.
Note 7: ESD Ratings:
HBM (1.5 kΩ, 100 pF) ≥ 3,500V EIAJ (0Ω, 200 pF) ≥ 250V
Note 8: Output short circuit current (I
OS
) is specified as magnitude only, minus sign indicates direction only.
Note 9: C
L
includes probe and jig capacitance.
Note 10: Guaranteed by characterization data (DS90C031E).
DS011946-9
FIGURE 7. Driver Output Levels
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Typical Performance Characteristics
Power Supply Current vs Power Supply Voltage
DS011946-10
Power Supply Current vs Temperature
DS011946-11
Power Supply Current vs Power Supply Voltage
DS011946-12
Power Supply Current vs Temperature
DS011946-13
Output TRI-STATE Current vs Power Supply Voltage
DS011946-14
Output Short Circuit Current vs Power Supply Voltage
DS011946-15
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Page 9
Typical Performance Characteristics (Continued)
Differential Output Voltage vs Power Supply Voltage
DS011946-16
Differential Output Voltage vs Ambient Temperature
DS011946-17
Output Voltage High vs Power Supply Voltage
DS011946-18
Output Voltage High vs Ambient Temperature
DS011946-19
Output Voltage Low vs Power Supply Voltage
DS011946-20
Output Voltage Low vs Ambient Temperature
DS011946-21
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Typical Performance Characteristics (Continued)
Offset Voltage vs Power Supply Voltage
DS011946-22
Offset Voltage vs Ambient Temperature
DS011946-23
Power Supply Current vs Frequency
DS011946-24
Power Supply Current vs Frequency
DS011946-25
Differential Output Voltage vs Load Resistor
DS011946-26
Differential Propagation Delay vs Power Supply Voltage
DS011946-27
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Page 11
Typical Performance Characteristics (Continued)
Differential Propagation Delay vs Ambient Temperature
DS011946-28
Differential Skew vs Power Supply Voltage
DS011946-29
Differential Skew vs Ambient Temperature
DS011946-30
Differential Transition Time vs Power Supply Voltage
DS011946-31
Differential Transition Time vs Ambient Temperature
DS011946-32
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12
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Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Ceramic Leadless Chip Carrier, Type C
Order Number DS90C031E-QML
NS Package Number E20A
16-Lead (0.150" Wide) Molded Small Outline Package, JEDEC
Order Number DS90C031TM
NS Package Number M16A
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE­VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI­CONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or sys­tems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose fail­ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user.
2. A critical component in any component of a life support device or system whose failure to perform can be rea­sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
National Semiconductor Corporation
Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com
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DS90C031 LVDS Quad CMOS Differential Line Driver
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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