The DS7545X series of dual peripheral drivers is a family of
versatile devices designed for use in systems that use TTL
logic. Typical applications include high speed logic buffers,
power drivers, relay drivers, lamp drivers, MOS drivers, bus
drivers and memory drivers.
The DS75451, DS75452 and DS75453 are dual peripheral
AND, NAND and NOR drivers, respectively, (positive logic)
with the output of the logic gates internally connected to the
bases of the NPN output transistors.
Features
n 300 mA output current capability
n High voltage outputs
n No output latch-up at 20V
n High speed switching
n Choice of logic function
n TTL compatible diode-clamped inputs
n Standard supply voltages
n Replaces TI “A” and “B” series
Connection Diagrams (Dual-In-Line and Metal Can Packages)
DS005824-2
*
See (Note 5) and Appendix E regarding S.O. package power dissipation
constraints.
Top View
Order Number DS75451M or DS75451N
See NS Package Numbers M08A
*
See (Note 5) and Appendix E regarding S.O. package power dissipation constraints.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
DS75451/2/3
Supply Voltage, (V
Input Voltage5.5V
Inter-Emitter Voltage (Note 3)5.5V
Output Voltage (Note 4)30V
Output Current (Note 5)300 mA
Maximum Power (Note 5)
Dissipation
) (Note 2)7.0V
CC
†
at 25˚C
Molded DIP Package957 mW
SO Package632 mW
Storage Temperature Range−65˚C to +150˚C
Lead Temperature (Soldering, 4 sec.)260˚C
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Temperature Range”
they are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device
operation.
Note 2: Voltage values are with respect to network ground terminal unless otherwise specified.
Note 3: The voltage between two emitters of a multiple-emitter transistor.
Note 4: The maximum voltage which should be applied to any output when it is in the “OFF” state.
Note 5: Both halves of these dual circuitsmayconduct rated current simultaneously; however, power dissipation averaged over a short time interval must fall within
the continuous dissipation rating.
Note 6: Unless otherwise specified min/max limits apply across 0˚C to +70˚C range. All typicals are given for V
Note 7: All currents into device pins shown as positive, out of device pins as negative, all voltages referenced to ground unless otherwise noted. All values shown
as max or min on absolute value basis.
= +5V and TA= 25˚C.
CC
Truth Tables (H = high level, L = low level)
DS75451
ABY
LLL (ON State)
LHL (ON State)
HLL (ON State)
HHH (OFF State)
DS75452
ABY
LLH (OFF State)
LHH (OFF State)
HLH (OFF State)
HHL (ON State)
DS75451/2/3
DS75453
ABY
LLL (ON State)
LHH (OFF State)
HLH (OFF State)
HHH (OFF State)
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Page 4
Schematic Diagrams
DS75451/2/3
Resistor values shown are nominal.
DS75451
DS005824-11
DS75452
Resistor values shown are nominal.
Resistor values shown are nominal.
DS005824-12
DS75453
DS005824-13
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Page 5
DC Test Circuits
Both inputs is tested simultaneously.
Each input is tested separately.
FIGURE 2. VIL,V
DS005824-15
DS005824-16
OH
FIGURE 1. VIH,V
Each input is tested separately.
DS75451/2/3
OL
DS005824-18
FIGURE 4. II,I
IH
Each input is tested separately.
FIGURE 3. VI,I
IL
DS005824-17
Each input is tested separately.
FIGURE 5. I
Both gates are tested simultaneously.
FIGURE 6. I
DS005824-19
OS
DS005824-20
CCH,ICCL
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Page 6
DC Test Circuits (Continued)
DS75451/2/3
DS005824-21
Circuit
DS75451V
DS75452V
DS75453V
FIGURE 7. VIH,VIL,IOH,V
DS005824-22
Note A: Each input is tested separately.
Note B: When testing DS75453 input not under test is grounded.
For all other circuits it is at 4.5V.
FIGURE 8. VI,V
IL
Input
Under
Test
IH
V
IL
IH
V
IL
IH
V
IL
Other
Input
V
IH
V
CC
V
IH
V
CC
GndV
V
IL
Both gates are tested simultaneously.
Output
ApplyMeasure
V
OH
I
OL
I
OL
V
OH
OH
I
OL
OL
FIGURE 10. I
I
OL
V
OL
V
OL
I
OH
I
OH
V
OH
CCH,ICCL
DS005824-24
for AND, NAND Circuits
DS005824-23
Each input is tested separately.
FIGURE 9. II,I
IH
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Both gates are tested simultaneously.
FIGURE 11. I
CCH,ICCL
DS005824-25
for OR, NOR Circuits
Page 7
AC Test Circuits and Switching Time Waveforms
Note 1: The pulse generator has the following characteristics: PRR = 1 MHz, Z
Note 2: C
includes probe and jig capacitance.
L
FIGURE 12. Propagation Delay Times, Each Gate
OUT
≈ 50Ω.
DS75451/2/3
DS005824-26
DS005824-27
Note 1: The pulse generator has the following characteristics: duty cycle ≤ 1%, Z
Note 2: C
includes probe and jig capacitance.
L
FIGURE 13. Switching Times, Each Transistor
OUT
DS005824-28
DS005824-29
≈ 50Ω.
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Page 8
AC Test Circuits and Switching Time Waveforms (Continued)
DS75451/2/3
DS005824-30
Note 1: The The pulse generator has the following characteristics: PRR = 1.0 MHz, Z
Note 2: C
includes probe and jig capacitance.
L
FIGURE 14. Switching Times of Complete Drivers
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OUT
DS005824-31
≈ 50Ω.
Page 9
AC Test Circuits and Switching Time Waveforms (Continued)
DS005824-32
DS75451/2/3
Note 1: The pulse generator has the following characteristics: PRR = 12.5 kHz, Z
Note 2: C
includes probe and jig capacitance.
L
FIGURE 15. Latch-UP Test of Complete Drivers
Typical Performance Characteristics
FIGURE 16. Transistor Collector-Emitter Saturation Voltage vs Collector Current
OUT
DS005824-33
≈ 50Ω.
DS005824-37
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Page 10
Typical Applications
DS75451/2/3
*
Optional keep-alive resistors maintain off-state lamp current at ≈ 10% to reduce surge current.
FIGURE 17. Dual Lamp or Relay Driver
DS005824-46
FIGURE 18. Complementary Driver
FIGURE 19. TTL or DTL Positive Logic-Level Detector
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DS005824-47
DS005824-48
Page 11
Typical Applications (Continued)
*
The two input resistors must be adjusted for the level of MOS input.
FIGURE 20. MOS Negative Logic-Level Detector
DS75451/2/3
DS005824-49
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Page 12
Typical Applications (Continued)
DS75451/2/3
DS005824-50
FIGURE 21. Logic Signal Comparator
*
If inputs are unused, they should be connected to +5V through a 1k resistor.
Low output occurs only when inputs are low simultaneously.
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COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
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whose failure to perform when properly used in
accordance with instructions for use provided in the
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support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
labeling, can be reasonably expected to result in a
significant injury to the user.
National Semiconductor
Corporation
Americas
Email: support@nsc.com
www.national.com
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.