This family of high-speed-Schottky 8-channel bi-directional
transceivers is designed to interface TTL/MOS logic to the
IEEE Standard 488-1978 General Purpose Interface Bus
(GPIB). PNP inputs are usedatalldriver inputs for minimum
loading, and hysteresis is provided at all receiver inputs for
added noise margin. The IEEE-488 required bus termination
is provided internally with an active turn-off feature which disconnects the termination from the bus when V
The General Purpose Interface Bus is comprised of 16 signal lines — 8 for data and 8 for interface management. The
data lines are always implemented with DS75160A, and the
management lines are either implemented with DS75161A in
a single-controller system.
is removed.
CC
Connection Diagrams
Dual-In-Line Package
Features
n 8-channel bi-directional non-inverting transceivers
n Bi-directional control implemented with TRI-STATE
output design
n Meets IEEE Standard 488-1978
n High-speed Schottky design
n Low power consumption
n High impedance PNP inputs (drivers)
n 500 mV (typ) input hysteresis (receivers)
n On-chip bus terminators
n No bus loading when V
n Pin selectable open collector mode on DS75160A driver
outputs
n Accommodates multi-controller systems
Dual-In-Line Package
Order Number DS75161AN or DS75161AWM
See NS Package Number M20B or N20B
is removed
CC
®
DS005804-16
DS005804-1
Order Number DS75160AN or DS75160AWM
See NS Package Number M20B or N20A
TRI-STATE®is a registered trademark of National Semiconductor Corporation.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage, V
CC
Input Voltage5.5V
Storage Temperature Range−65˚C to +150˚C
Lead Temperature (Soldering, 4 sec.)260˚C
Note 2: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device
should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation.
Note 3: Unless otherwise specified, min/max limits apply across the 0˚C to +70˚C temperature range and the 4.75V to 5.25V power supply range. All typical values
are for T
Note 4: All currents into device pins are shown as positive; all currents out of device pins are shown as negative; all voltages are referenced to ground, unless otherwise specified. All values shown as max or min are so classified on absolute value basis.
Note 5: Only one output at a time should be shorted.
Note 6: This characteristic does not apply to outputs on DS75161A that are open collector.
Voltage at Bus PortDisabled
TerminatorV
Bus LoadingV
CurrentBusDriverV
=
−1.5V to 0.4V−1.3
I(bus)
=
0.4V to 2.5V0−3.2
I(bus)
=
2.5V to 3.7V2.5mA
I(bus)
Disabled−3.2
=
V
3.7V to 5V02.5
I(bus)
=
V
5V to 5.5V0.72.5
I(bus)
0V, V
=
0V to 2.5V40µA
I(bus)
=
0V (Note 5)−15−35−75mA
O
Short-CircuitTerminalV
=
V
CC
=
2V, V
I
Output CurrentBus (Note 6)−35−75 −150
Supply CurrentDS75160ATransmit, TE=2V, PE=2V, V
Receive, TE=0.8V, PE=2V, V
DS75161ATE=0.8V, DC=0.8V, V
Bus-PortBusV
=
CC
5V or 0V, V
=
0V to 2V,2030pF
I
=
0.8V85125
I
=
0.8V70100mA
I
=
0.8V84125
I
Capacitancef=1 MHz
=
A
25˚C and V
=
5.0V.
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www.national.com2
Page 3
Switching Characteristics (Note 7)
=
V
5.0V
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SymbolParameterFromToConditionsDS75160ADS75161ADS75162A Units
Propagation Delay Time,V
t
PLH
Low to High Level OutputTerminal BusR
t
Propagation Delay Time,C
PHL
High to Low Level Output
t
Propagation Delay Time,V
PLH
Low to High Level OutputBusTerminal R
t
Propagation Delay Time,C
PHL
High to Low Level Output
t
Output Enable TimeV
PZH
to High LevelV
t
Output Disable TimeTE, DC,R
PHZ
From High Levelor SCC
t
Output Enable Time(Note 8)BusV
PZL
to Low Level(Note 9)V
t
Output Disable TimeR
PLZ
From Low LevelC
t
Output Enable TimeV
PZH
to High LevelV
t
Output Disable TimeTE, DC,R
PHZ
From High Levelor SCTerminal C
t
Output Enable Time(Note 8)V
PZL
to Low Level(Note 9)V
t
Output Disable TimeR
PLZ
From Low LevelC
t
Output Pull-Up EnableV
PZH
Time (DS75160A Only)PEBusV
t
Output Pull-Up Disable(Note 8)R
PHZ
Time (DS75160A Only)C
Note 7: Typical values are for V
Note 8: Refer to Functional Truth Tables for control input definition.
Note 9: Test configuration should be connected to only one transceiver at a time due to the high current stress caused by the V
This device is an 8-channel bi-directional transceiver with
one common direction control input, denoted TE. When used
to implement the IEEE-488 bus, this device is connected to
the eight data bus lines, designated DIO
connections to the bus lines have internal terminators, in accordance with the IEEE-488 Standard, that are deactivated
when the device is powered down. This feature guarantees
no bus loading when V
have a control mode that either enables or disables the ac-
=
0V. The bus port outputs also
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tive upper stage of the totem-pole configuration. When this
control input, denoted PE, is in the high state, the bus outputs operate in the high-speed totem-pole mode. When PE
is in the low state, the bus outputs operate as open collector
outputs which are necessary for parallel polling.
DS75161A
www.national.com4
–DIO8. The port
1
DS005804-2
This device is also an 8-channel bi-directional transceiver
which is specifically configured to implement the eight management signal lines of the IEEE-488 bus. This device,
paired with the DS75160A, forms the complete 16-line interface between the IEEE-488 bus and a single controller instrumentation system. In compliance with the system organization of the management signal lines, the SRQ, NDAC, and
NRFD bus port outputs are open collector. In contrast to the
DS75160A, these open collector outputs are a fixed configuration. The direction control is divided into three groups. The
DAV, NDAC, and NRFD transceiver directions are controlled
by the TE input. The ATN, SRQ, REN, and IFC transceiver
directions are controlled by the DC input. The EOI transceiver direction is a function of both the TE and DC inputs, as
well as the logic level present on the ATN channel. The port
connections to the bus lines have internal terminators identical to the DS75160A.
Page 5
Functional Description (Continued)
Table of Signal Line Abbreviations
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
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systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
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support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
labeling, can be reasonably expected to result in a
significant injury to the user.
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.