Datasheet DRV102T, DRV102F-500, DRV102F Datasheet (Burr Brown Corporation)

®

For most current data sheet and other product

information, visit www.burr-brown.com

PWM SOLENOID/VALVE DRIVER

DRV102

D

RV102

DRV102

FEATURES

● HIGH OUTPUT DRIVE: 2.7A

● WIDE SUPPLY RANGE: +8V to +60V

● COMPLETE FUNCTION

PWM Output
Internal 24kHz Oscillator
Digital Control Input
Adjustable Delay and Duty Cycle
Over/Under Current Indicator

● FULLY PROTECTED

Thermal Shutdown with Indicator
Internal Current Limit

● POWER PACKAGES: 7-Lead TO-220 and

7-Lead Surface-Mount DDPAK

DESCRIPTION

The DRV102 is a high-side power switch employing
a pulse-width modulated (PWM) output. Its rugged
design is optimized for driving electromechanical de­vices such as valves, solenoids, relays, actuators, and
positioners. The DRV102 is also ideal for driving
thermal devices such as heaters and lamps. PWM
operation conserves power and reduces heat rise in the
device, resulting in higher reliability. In addition, ad­justable PWM allows fine control of the power deliv­ered to the load. Time from dc output to PWM output
is externally adjustable.

APPLICATIONS

● ELECTROMECHANICAL DRIVER:

Solenoids Positioners
Actuators
Valves Clutches/Brakes

● SOLENOID OVERHEAT PROTECTORS

● FLUID AND GAS FLOW CONTROLLERS

● PART HANDLERS

● ELECTRICAL HEATERS/COOLERS

● MOTOR SPEED CONTROLLERS

● INDUSTRIAL CONTROL

● FACTORY AUTOMATION

● MEDICAL ANALYSIS

● PHOTOGRAPHIC PROCESSING

The DRV102 can be set to provide a strong initial
closure, automatically switching to a “soft” hold mode
for power savings. Duty cycle can be controlled by a
resistor, analog voltage, or digital-to-analog converter
for versatility. A flag output indicates thermal shut­down and over/under current limit. A wide supply
range allows use with a variety of actuators.

The DRV102 is available in 7-lead staggered TO-220
package and a 7-lead surface-mount DDPAK plastic
power package. It operates from –55°C to +125°C.

Flag

High Power Relays/Contactors

7

(1)

4

DRV102

5
V

6
Out

(Gnd electrically

connected to tab)

(+8V to +60V)

S

Load

Thermal Shutdown

Over/Under Current

24kHz

Oscillator

Input

1

On

(TTL-Compatible)

Off

International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: [phone]

Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: [phone] • Immediate Product Info: [phone]

©

1998 Burr-Brown Corporation PDS-1471B Printed in U.S.A. March, 1999

Delay

PWM

23

Delay

Adjust

Gnd

Duty Cycle

Adjust

SPECIFICATIONS

At TC = +25°C, VS = +24V, load = series diode MUR415 and 100Ω, and 4.99kΩ Flag pull-up to +5V, unless otherwise noted.

DRV102T, F
PARAMETER CONDITIONS MIN TYP MAX UNITS
OUTPUT

Output Saturation Voltage, Source I

Current Limit 2 2.7 3.4 A
Under-Scale Current 16 mA
Leakage Current Output Transistor Off, V

DIGITAL CONTROL INPUT

V

Low (output disabled) 0 +1.2 V

CTR

V

High (output enabled) +2.2 V

CTR

I

Low (output disabled) V

CTR

I

High (output enabled) V

CTR

(1)

Propagation Delay: On-to-Off 0.9 µs

Off-to-On 1.8 µs

DELAY TO PWM

Delay Equation
Delay Time C
Minimum Delay Time

(3)

(4)

(5)

DUTY CYCLE ADJUST

Duty Cycle Range 10 to 90 %
Duty Cycle Accuracy 49% Duty Cycle, R

vs Supply Voltage 49% Duty Cycle, VS = 8V to 60V ±1 ±5%

Nonlinearity

(6)

20% to 80% Duty Cycle ±2 % FSR

DYNAMIC RESPONSE

Output Voltage Rise Time V
Output Voltage Fall Time VO = 90% to 10% of V
Oscillator Frequency 19 24 29 kHz

FLAG

Normal Operation 20kΩ Pull-Up to +5V, I

(7)

Fault
Sink Current V
Under-Current Flag: Set 5.2 µs

Reset 11 µs

Over-Current Flag: Set 5.2 µs

Reset 11.5 µs

THERMAL SHUTDOWN

Junction Temperature

Shutdown +165 °C
Reset from Shutdown +150 °C

POWER SUPPLY

Specified Operating Voltage +24 V
Operating Voltage Range +8 +60 V
Quiescent Current I

TEMPERATURE RANGE

Specified Range –55 +125 °C
Storage Range –55 +125 °C
Thermal Resistance,

θ

JC

7-Lead DDPAK, 7-Lead TO-220 3 °C/W

Thermal Resistance,

θ

JA

7-Lead DDPAK, 7-Lead TO-220 No Heat Sink 65 °C/W

NOTES: (1) Logic high enables output (normal operation). (2) Negative conventional current flows out of the terminals. (3) Constant dc output to PWM (pulse-width
modulated) time. (4) Maximum delay is determined by an external capacitor. Pulling the Delay Adjust pin low corresponds to an infinite (continuous) delay.
(5) Connecting the Delay Adjust pin to +5V reduces delay time to 3µs. (6) V
over-current, or under-current conditions.

= 1A +1.7 +2.2 V

O

IO = 0.1A +1.3 +1.7 V

= +60V, VO = 0V ±0.01 ±2mA

S

= 0V –80

CTR

= +5V 20

CTR

(2)

(2)

S

dc to PWM Mode

Delay to PWM ≈ CD • 106 (CD in F) s

= 0.1µF 80 97 110 ms

D

CD = 0 15 µs

= 25.5kΩ±1 ±7%

PWM

= 10% to 90% of V

O

S
S

< 1.5A +4 +4.9 V

O

0.25 2.5 µs

0.25 2.5 µs

Sinking 1mA +0.2 +0.4 V

= 0.4V 2 mA

FLAG

= 0 6.5 9 mA

O

at pin 3 to percent of duty cycle at pin 6. (7) A fault results from over-temperature,

IN

V

µA
µA

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.

®

DRV102

2

CONNECTION DIAGRAMS

Top Front View TO-220, DDPAK

7-Lead

Stagger-Formed

TO-220

7-Lead

DDPAK

Surface-Mount

ABSOLUTE MAXIMUM RATINGS

Supply Voltage, V

Input Voltage .......................................................................... –0.2V to V

PWM Adjust Input ................................................ –0.2V to VS (24V max)

Delay Adjust Input ................................................ –0.2V to V

Operating Temperature Range ...................................... –55°C to +125°C

Storage Temperature Range ......................................... –55°C to +125°C

Junction Temperature .................................................................... +150°C

Lead Temperature (soldering, 10s)

NOTES: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may de­grade device reliability. (2) Vapor-phase or IR reflow techniques are recom­mended for soldering the DRV102F surface-mount package. Wave soldering
is not recommended due to excessive thermal shock and “shadowing” of
nearby devices.

.............................................................................. 60V

S

(2)

........................................... +300°C

(1)

S

(24V max)

S

1234

7

5

6

1234

6 7

5

ELECTROSTATIC
DISCHARGE SENSITIVITY

In

PWM

V

Flag

S

Delay

In

Delay

NOTE: Tabs are electrically connected to ground (pin 4).

PWM

Gnd Out

V

S

Flag

Gnd Out

PACKAGE/ORDERING INFORMATION

PACKAGE SPECIFIED
DRAWING TEMPERATURE PACKAGE ORDERING TRANSPORT

PRODUCT PACKAGE NUMBER

DRV102T 7-Lead Stagger-Formed TO-220 327 –55°C to +125°C DRV102T DRV102T Rails
DRV102F 7-Lead DDPak Surface Mount 328 –55°C to +125°C DRV102F DRV102F Rails

" " " " " DRV102F/500 Tape and Reel

NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/ )
are available only in Tape and Reel in the quantities indicated (e.g., /500 indicates 500 devices per reel). Ordering 500 pieces of “DRV102F/500” will get a single
500-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.

(1)

This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and
installation procedures can cause damage.

ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes
could cause the device not to meet its published specifications.

RANGE MARKING NUMBER

(2)

MEDIA

®

3

DRV102

PIN DESCRIPTIONS

PIN # NAME DESCRIPTION

Pin 1 Input The input is compatible with standard TTL levels. The device output becomes enabled when the input voltage is driven above

Pin 2 Delay Adjust This pin sets the duration of the initial 100% duty cycle before the output goes into PWM mode. Leaving this pin floating results

Pin 3 Duty Cycle Adjust Internally, this pin connects to the input of a comparator and a 19kΩ resistor to ground. It is driven by a 200µA current source

(PWM) from V

Pin 4 Ground This pin is electrically connected to the package tab. It must be connected to system ground for the DRV102 to function. It

Pin 5 V

S

Pin 6 Out The output is the emitter of a power npn with the collector connected to V

Pin 7 Flag Normally high (active low), the Flag signals either an over-temperature, over-current, or under-current fault. The over/under-

the typical switching threshold, 1.7V. Below this level, the output is disabled. With no connection to the pin, the input level rises
to 3.4V. Input current is 20µA when driven high and 80µA with the input low. The input may be driven to the power supply (V
without damage.

in a delay of approximately 15µs, which is internally limited by parasitic capacitance. Minimum delay may be reduced to less
than 3µs by tying the pin to 5V. This pin connects internally to a 3µA current source from V
When the pin voltage is below 3V, the output device is 100% on. The PWM oscillator is not synchronized to the Input (pin 1),

and to a 3V threshold comparator.

S

so the first pulse may be extended by any portion of the programmed duty cycle.

. The voltage at this node linearly sets the duty cycle. Duty cycle can be programmed with a resistor, analog voltage,

S

or output of a D/A converter. The active voltage range is from 0.55V to 3.7V to facilitate the use of single-supply control
electronics. At 0.56V (or R
frequency is a constant 24kHz.

= 4.4kΩ), duty cycle is near 90%. Swing to ground should be limited to no lower than 0.1V. PWM

PWM

carries the 6.5mA quiescent current.
This is the power supply pin. Operating range is +8V to +60V.

. Low power dissipation in the DRV102 is obtained

by low saturation voltage and fast switching transitions. Rise time is less than 250ns, fall time depends on load impedance.

S

A flyback diode is (D1) needed with inductive loads to conduct the load current during the off cycle. The external diode should
be selected for low forward voltage. The internal clamp diode provides protection but should not be used to conduct load
currents. An additional diode (D2), located in series with Out pin, is required for inductive loads.

current flags are true only when the output is on (constant dc output or the “on” portion of PWM mode). A thermal fault (thermal
shutdown) occurs when the die surface reaches approximately 165°C and latches until the die cools to 150°C. Its output
requires a pull-up resistor. It can typically sink two milliamps, sufficient to drive a low-current LED.

)

S

LOGIC BLOCK DIAGRAM

DRV102

Input

On

Off

1

Thermal

Shutdown

Over/Under Current

PWM

Delay

23

C

D

R

PWM

Flag

7

Gnd 4

5

(+8V to +60V)

V

S

(2)

6
Out

D

2

D

1

Load

(1)

NOTES: (1) Schottky Power Rectifier for low
power dissipation. (2) Schottky or appropriately
rated silicon diode.

®

DRV102

4

TYPICAL PERFORMANCE CURVES

CURRENT LIMIT vs TEMPERATURE

–75 –50 –25 0 25 50 75 100 125

Temperature (°C)

Current Limit (mA)

3.25

3

2.75

2.5

2.25

2

VS = +60V, Load = 5Ω

VS = +24V, Load = 5Ω

VS = +8V, Load = 1Ω

At TC = +25°C and VS = +24V, unless otherwise noted.

DUTY CYCLE and DUTY CYCLE ERROR vs VOLTAGE

90
80
70
60
50
40

Duty Cycle (%)

30
20
10

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0

OUTPUT SATURATION VOLTAGE vs TEMPERATURE

2.25

2

1.75

1.5

Duty Cycle

IO = 0.1A to 1A

V

PWM

Error

IO = 1A

(V)

IO = 0.1A

IO = 2A

IO = 1.5A

IO = 1A

8
6
4
2
0
–2

Duty Cycle Error (%)

–4
–6
–8

54

53

52

51

50

Duty Cycle (%)

49

48

–75 –50 –25 0 25 50 75 100 125

DUTY CYCLE vs TEMPERATURE

R

= 25.5kΩ

PWM

VS = +8V

VS = +24V

VS = +60V

Temperature (°C)

1.25

Saturation Voltage (V)

1

0.75
–75 –50 –25 0 25 50 75 100 125

Temperature (°C)

8

7.5

7

6.5

Quiescent Current (mA)

6

5.5

QUIESCENT CURRENT vs TEMPERATURE

VS = +60V

VS = +24V

VS = +8V

–75 –50 –25 0 25 50 75 100 125

Temperature (°C)

IO = 0.1A

20

18

16

14

12

Under-Scale Current (mA)

10

UNDER-SCALE CURRENT vs TEMPERATURE

VS = +8V to +60V

–75 –50 –25 0 25 50 75 100 125

Temperature (°C)

®

5

DRV102

TYPICAL PERFORMANCE CURVES (CONT)

At TC = +25°C and VS = +24V, unless otherwise noted.

(VS = +60V, CD = 220pF, R

60V

OUT

40V

V

20V

0

4V
2V

FLAG

V

0

(VS = +60V, CD = 120pF, R

60V
40V

OUT

V

20V

0

1A

0.5A

SUPPLY

0

I

Inductive load ramp current

FLAG OPERATION

OVER-CURRENT LIMIT

= 25.5kΩ, Load = 350mH || 47Ω)

PWM

Onset of current limit where

V

begins to drop

OUT

Flag only set during

constant output mode

or “ON” portion of

PWM mode

50µs/div

DC TO PWM MODE

DRIVING INDUCTIVE LOAD

= 30.1kΩ, Load = 350mH)

PWM

(VS = +60V, CD = 120pF, R

60V

IN

40V

V

20V

0

4V
2V

FLAG

V

0

Constant Output

TYPICAL SOLENOID CURRENT WAVEFORM

(VS = +60V, CD = 0.1µF, R

4V

IN

0

V

Solenoid

Motion
Period

1A

0.5A
0

Solenoid Current

FLAG OPERATION
UNDER-CURRENT

= 25.5kΩ, No Load)

PWM

Flag only on during constant output

or “ON” portion of PWM mode

PWM Mode

50µs/div

= 30.1kΩ, Load = 350mH)

PWM

{

PWM Mode

Solenoid Closure

FLAG

V

OUT

I

5V

2.5V

3A
2A
1A

50µs/div

25ms/div

CURRENT LIMIT REPSONSE

(Load = 1Ω, 2kΩ pull-up to +5V on Flag pin)

OSCILLATOR FREQUENCY vs TEMPERATURE

24.2

24.0

0

VS = +8V

23.8

23.6

0

Oscillator Frequency (kHz)

VS = +60V

23.4

10µs/div

–75 –55 –35 –15 5 25 45 65 85 105 125

Temperature (°C)

®

DRV102

6

TYPICAL PERFORMANCE CURVES (CONT)

NOMINAL DELAY TIME TO PWM vs TEMPERATURE

–75 –50 –25 0 25 50 75 100 125

Temperature (°C)

Delay (ms)

103

101

99

97

95

93

91

CD = 0.1µF

VS = +8V

VS = +24V

VS = +60V

DELAY TIME TO PWM

PRODUCTION DISTRIBUTION

Percent of Units (%)

Delay Time to PWM (ms)

60

50

40

30

20

10

0

Typical distribution
of packaged units.

DRV102F and

DRV102T included.

C

D

= 0.1µF

80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110

At TC = +25°C and VS = +24V, unless otherwise noted.

–200

–175

–150

–125

–100

Leakage Current (µA)

–75

Percent of Units (%)

OUTPUT LEAKAGE CURRENT vs TEMPERATURE

Output Transistor Off

= 0V

V

O

VS = +60V

VS = +8V

–75 –55 –35 –15 5 25 45 65 85 105 125

Temperature (°C)

CURRENT LIMIT

40
35
30
25
20
15
10

5
0

2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4

PRODUCTION DISTRIBUTION

Typical distribution
of packaged units.

DRV102F and

DRV102T included.

Current Limit (A)

VS = +24V

DUTY CYCLE ACCURACY

30

Nominal Duty Cycle = 49%

25

20

15

10

Percent of Units (%)

5

0

–7 –6 –5 –4 –3 –2 –1 0 1 2 3 4 5 6 7

PRODUCTION DISTRIBUTION

= 25.5kΩ

R

PWM

Duty Cycle Accuracy (%)

Typical distribution
of packaged units.

DRV102F and

DRV102T included.

7

®

DRV102

BASIC OPERATION

The DRV102 is a high-side, bipolar power switch employ­ing a pulse-width modulated (PWM) output for driving
electromechanical and thermal devices. Its design is opti­mized for two types of applications: a two-state driver
(open/close) for loads such as solenoids and actuators, and
a linear driver for valves, positioners, heaters, and lamps. Its
wide supply range, adjustable delay to PWM mode, and
adjustable duty cycle make it suitable for a wide range of
applications. Figure 1 shows the basic circuit connections to
operate the DRV102. A 0.1µF bypass capacitor is shown
connected to the power supply pin.

The Input (pin 1) is compatible with standard TTL levels.
Input voltages between +2.2V and +5.5V turn the device
output on, while pulling the pin low (0V to +1.2V), shuts the
DRV102 output off. Input current is typically 80µA.

Delay Adjust (pin 2) and Duty Cycle Adjust (pin 3) allow
external adjustment of the PWM output signal. The Delay
Adjust pin can be left floating for minimum delay to PWM
mode (typically 15µs) or a capacitor can be used to set the
delay time. Duty cycle of the PWM output can be controlled
by a resistor, analog voltage, or D/A converter. Figure 1b
provides an example timing diagram with the Delay Adjust

pin connected to 0.1µF and duty cycle set for 25%. See the
“Delay Adjust” and “Duty Cycle Adjust” text for equations
and further explanation.

Ground (pin 4) is electrically connected to the package tab.
This pin must be connected to system ground for the
DRV102 to function. This serves as the DRV102 reference
ground.

The load (solenoid, valve, etc.) is connected between the
output (pin 6) and ground. For an inductive load, an external
flyback diode (D1 in Figure 1a) across the output is required.
The diode serves to maintain the hold force during PWM
operation. Depending on the application, the flyback diode
should be placed near the DRV102 or close to the solenoid
(see “Flyback Diode” text). The device’s internal clamp
diode, connected between the output and ground, should not
be used to carry load current. When driving inductive loads,
an additional diode in series with the out pin, D2, is required
(see “Series Diode” text).

The Flag (pin 7) provides fault status for under-current,
over-current, and thermal shutdown conditions. This pin is
active low with pin voltage typically +0.2V during a fault
condition. A small value capacitor may be needed between
Flag and ground for noisy applications.

1a). Basic Circuit Connections

Thermal Shutdown

Over/Under Current

24kHz

Oscillator

1

Input

On

Off

(TTL-Compatible)

NOTE: (1) External flyback diode required for inductive loads to conduct load current during the off cycle.
Flyback diode shown near DRV102. For some applications with remotely located load, it may be desirable
to place the diode near the solenoid—see “Flyback Diode” text. Motorola MSRS1100T3 (1A, 100V) or
MBRS360T3 (3A, 60V).

Delay

23

Delay

C

D

Adjust

R

PWM

1b). Simplified Timing Diagram

INPUT

OUTPUT

+2.2V to +5.5V

0V to +1.2V

CD = 0.1µF (92ms constant dc output before PWM)

V

S

0

Initial dc Output

R

CD = 0.1µF

92ms

(set by value

)

of C

D

= 90.9kΩ

PWM

(resistor or voltage

FIGURE 1. Basic Circuit Connections and Timing Diagram.

®

DRV102

PWM

Duty

Cycle

Adjust

t

P

PWM Mode

controlled)

8

Flag

7

DRV102

Gnd

4

(Gnd electrically

connected to tab)

• • •

t

ON

• • •
R

= 90.9kΩ

PWM

≈ 10.4µs

t

ON

t

≈ 41.6µs (1/24kHz)

P

Duty Cycle = = 25%

t

ON

t

P

V

S

(+8V to +60V)

0.1µF

5
V

S

6
Out

D

2

(1)

D

1

Load

APPLICATIONS INFORMATION

POWER SUPPLY

The DRV102 operates from a single +8V to +60V supply
with excellent performance. Most behavior remains un­changed throughout the full operating voltage range. Param­eters which vary significantly with operating voltage are
shown in the Typical Performance Curves.

CONNECTIONS TO LOAD

The PWM switching voltage and currents can cause electro­magnetic radiation. Proper physical layout of the load cur­rent will help minimize radiation. Load current flows from
the DRV102 output terminal to the load and returns through
the ground return path. This current path forms a loop. To
minimize radiation, make the area of the enclosed loop as
small as possible. Twisted pair leading to the load is excel­lent. If the ground return current must flow through a chassis
ground, route the output current line directly over the chassis
surface in the most direct path to the load.

FLYBACK DIODE LOCATION

Physical location of the flyback diode may affect electro­magnetic radiation. With most solenoid loads, inductance is
large enough that load current is virtually constant during
PWM operation. When the switching transistor is off, load
current flows though the flyback diode. If the flyback diode
is located near the DRV102 (Figure 2a), the current flowing
in long lines to the load is virtually constant. If the flyback
diode is, instead, located directly across the load (Figure 2b),
pulses of current must flow from the DRV102 to the distant
load. While theory seems to favor placing the diode at the
DRV102 output (constant current in the long lines), indi-

vidual situations may defy logic; if one location seems to
create noise problems, try the other.

SERIES DIODE FOR INDUCTIVE LOADS

An additional bias diode, located in series with the output, is
required when driving inductive loads. Any silicon diode,
such as the 1N4002, appropriately rated for current will
work. The diode biases the emitter of the internal power
device such that it can be fully shut off during the “off”
portion of the PWM cycle. Note that the voltage at the load
drops below ground due to the flyback diode. If it is not used,
apparent leakage current can rise to hundreds of milliamps,
resulting in unpredictable operation and thermal shutdown.

ADJUSTABLE INITIAL 100% DUTY CYCLE

A unique feature of the DRV102 is its ability to provide an
initial constant dc output (100% duty cycle) and then switch
to PWM mode to save power. This function is particularly
useful when driving solenoids which have a much higher
pull-in current requirement than hold current requirement.

The duration of this constant dc output (before PWM output
begins) can be externally and independently controlled with
a capacitor connected from Delay Adjust (pin 2) to ground
according to the following equation:

Delay Time ≈ CD • 10

6

(time in seconds, CD in Farads)

Leaving the Delay Adjust pin open results in a constant
output time of approximately 15µs. The duration of this
initial output can be reduced to less than 3µs by connecting
the pin to 5V. Table I provides examples of desired “delay”
times (constant output before PWM mode) and the appropri­ate capacitor values or pin connection.

2a) Flyback Diode Near DRV102

DRV102

4

2b) Flyback Diode Near Load

DRV102

4

5

6
Out

5

6
Out

V

S

V

S

FIGURE 2. Location of External Flyback Diode.

Load

Load

CONSTANT OUTPUT DURATION

(Delay Time to PWM Mode) C

3µs Pin Connected to 5V
15µs Pin Open
97µs 100pF

0.97ms 1nF
97ms 0.1µF

D

TABLE I. Delay Adjust Pin Connections.
The internal Delay Adjust circuitry is composed of a 3µA

current source and a 3V comparator as shown in Figure 3.
Thus, when the pin voltage is less than 3V, the output device
is 100% on (dc output mode).

DRV102

3V Reference

V

S

3µA

Comparator

2

Delay Adjust

C

D

FIGURE 3. Simplified Circuit Model of the Delay Adjust Pin.

9

DRV102

®

ADJUSTABLE DUTY CYCLE

The DRV102’s externally adjustable duty cycle provides an
accurate means of controlling power delivered to the load.
Duty cycle can be set from 10% to 90% with an external
resistor, analog voltage, or the output of a D/A converter.
Reduced duty cycle results in reduced power dissipation.
This keeps the DRV102 and load cooler, resulting in in­creased reliability for both devices. PWM frequency is a
constant 24kHz.

Resistor-Controlled Duty Cycle

Duty cycle is independently programmed with a resistor
(R

) connected between the Duty Cycle Adjust pin and

PWM

ground. Increased resistor values correspond to decreased
duty cycles. Table II provides resistor values for typical duty
cycles. Resistor values for additional duty cycles can be
obtained from Figure 4. For reference purposes, the equation
for calculating R

DUTY CYCLE R

10 536 3.67
20 137 3.31
30 66.5 2.91
40 39.2 2.49
50 24.9 2.07
60 16.2 1.66
70 10.5 1.26
80 6.65 0.88
90 4.42 0.56

NOTES: (1) Resistor values listed are nearest 1% standard values. (2) Do not
drive pin below 0.1V. For additional values, see “Duty Cycle vs Voltage” typical
performance curve.

is included in Figure 4.

PWM

RESISTOR

(1)

(kΩ)V

PWM

VOLTAGE

(V)

PWM

(2)

TABLE II. Duty Cycle Adjust. TA= +25°C, VS = +24V.

Voltage-Controlled Duty Cycle

Duty cycle can also be programmed with an analog voltage,
V

PWM

. With V

≈ 0.5V, duty cycle is 100%. Increasing

PWM

this voltage results in decreased duty cycles. For 0% duty
cycle, V

is approximately 4V. Table II provides V

PWM

PWM

values for typical duty cycles. See the “Duty Cycle vs
Voltage” typical performance curve for additional duty cycle
values.

The Duty Cycle Adjust pin should not be driven below 0.1V.
If the voltage source used can go between 0.1V and ground,
a 1kΩ series resistor between the voltage source and the Duty
Cycle Adjust pin (Figure 5) is required to limit swing. If the
pin is driven below 0.1V, the output will be unpredictable.

DRV102

5

V

S

PWM

3 Gnd 4

V

PWM

1kΩ

NOTE: (1) Required if voltage source can go below 0.1V.

6

Out

D/A

Converter

(1)

(or analog

voltage)

FIGURE 5. Using a Voltage Source to Program Duty Cycle.

1000

100

(kΩ)

PWM

R

10

1

10 20 40 60 10080

Duty Cycle (%)

R

= [ a + b (DC) + c (DC)2 + d (DC)3 + e (DC)4]

PWM

where: a = –4.9686 x 10

b = –5.9717 x 10
c = 2.9889 x 10

For 50% duty cycle:
R

= [–4.9686 x 10

PWM

+ (–5.4837 x 10

= 24.9kΩ

–8

d = –5.4837 x 10

–8

e = 5.9361 x 10

–8

DC = duty cycle in %

–8

+ (–5.9717 x 10

–10

) (50)3 + (5.9361 x 10

–12

–8)

(50) + (2.9889 x 10–8) (50)

–10

–12

–1

) (50)4]

The DRV102’s internal 24kHz oscillator sets the PWM
period. This frequency is not externally adjustable. Duty
Cycle Adjust (pin 3) is internally driven by a 200µA current
source and connects to the input of a comparator and a 19kΩ
resistor as shown in Figure 6. The DRV102’s PWM control
design is inherently monotonic. That is, a decreased voltage
(or resistor value) always produces an increased duty cycle.

3.8V
f = 24kHz

0.7V
V

S

Comparator

19kΩ

DRV102

–1

2

NOTE: (1) Do not drive pin below 0.1V.

Duty Cycle

Adjust

200µA

3

Resistor or

Voltage Source

(1)

FIGURE 4. R

versus Duty Cycle.

PWM

®

DRV102

FIGURE 6. Simplified Circuit Model of the Duty Cycle

Adjust Pin.

10

STATUS FLAG

Flag (pin 7) provides fault indication for under-current,
over-current, and thermal shutdown conditions. During a
fault condition, Flag output is driven low (pin voltage
typically drops to 0.2V). A pull-up resistor, as shown in
Figure 7, is required to interface with standard logic. A small
value capacitor may be needed between Flag and ground in
noisy applications.

Figure 7 gives an example of a non-latching fault monitoring
circuit, while Figure 8 provides a latching version. The Flag
pin can sink several milliamps, sufficient to drive external
logic circuitry or an LED (Figure 9) to indicate when a fault
has occurred. In addition, the Flag pin can be used to turn off
other DRV102’s in a system for chain fault protection.

Thermal Shutdown

Over/Under Current

5kΩ

Flag

+5V

7

(LED)
HLMP-Q156

5

V

S

+5V

5kΩ

Pull-Up

Flag

Thermal Shutdown

Over/Under Current

DRV102

4Gnd

7

TTL or HCT

5

6

V

Out

FIGURE 7. Non-Latching Fault Monitoring Circuit.

+5V

74XX76A

V

Flag
Flag

Flag Reset

Q
Q
CLR

DRV102

S

J

CLK

GND K

Thermal Shutdown

Over/Under Current

(1)

Flag

20kΩ

7

4Gnd

DRV102

4Gnd

6

Out

FIGURE 9. LED to Indicate Fault Condition.

Over/Under Current Fault

S

An over-current fault occurs when the output current ex­ceeds the current limit. All units are guaranteed to drive 2A
without current limiting. Typically, units will limit at 2.7A.
The status flag is not latched. Since current during PWM
mode is switched on and off, the flag output will be modu­lated with PWM timing (see flag waveforms in the Typical
Performance Curves).

An under-current fault occurs when the output current is
below the under-scale current threshold (typically 16mA).
For example, this function indicates when the load is discon­nected. Again, the flag output is not latched, so an under­current condition during PWM mode will produce a flag
output that is modulated by the PWM waveform. An initial,
brief under-current flag normally appears driving inductive
loads and may be avoided by adding a parallel resistor
sufficient to move the initial current above the under-current
threshold. Avoid adding capacitance to pin 6 (Out) as it may
cause momentary current limiting.

Over-Temperature Fault

A thermal fault occurs when the die reaches approximately
165°C, producing a similar effect as pulling the input low.
Internal shutdown circuitry disables the output and resets the
Delay Adjust pin. The Flag is latched in the low state (fault

5

V

S

condition) until the die has cooled to approximately 150°C.
A thermal fault can occur in any mode of operation. Recov­ery from thermal fault will start in delay mode (constant dc

6

Out

output).

NOTE: (1) Small capacitor (10pF) may be required in noisy environments.

FIGURE 8. Latching Fault Monitoring Circuit.

11

®

DRV102

PACKAGE MOUNTING

Figure 10 provides recommended PCB layouts for both the
TO-220 and DDPAK power packages. The tab of both
packages is electrically connected to ground (pin 4). It may
be desirable to isolate the tab of TO-220 package from its
mounting surface with a mica (or other film) insulator (see
Figure 11). For lowest overall thermal resistance, it is best to
isolate the entire heat sink/DRV102 structure from the
mounting surface rather than to use an insulator between the
semiconductor and heat sink.

For best thermal performance, the tab of the DDPAK sur­face-mount version should be soldered directly to a circuit
board copper area. Increasing the copper area improves heat
dissipation. Figure 12 shows typical thermal resistance from
junction-to-ambient as a function of the copper area.

POWER DISSIPATION

Power dissipation depends on power supply, signal, and load
conditions. Power dissipation is equal to the product of

7-Lead TO-220

(Package Drawing #327)

0.335

0.15

0.05

Mean dimensions in inches. Refer to end of data sheet
or Appendix C of Burr-Brown Data Book for tolerances
and detailed package drawings. For further information
on solder pads for surface-mount devices consult
Application Bulletin AB-132.

0.04

7-Lead DDPAK

(1)

(Package Drawing #328)

0.51

0.45

0.085

0.2

0.05

0.105

NOTE: (1) For improved thermal performance increase footprint area.
See Figure 12, “Thermal Resistance versus Circuit Board Copper Area”.

0.035

FIGURE 10. TO-220 and DDPAK Solder Footprints.

THERMAL RESISTANCE

18

16

(°C/W)

JA

θ

14

12

10

Thermal Resistance

Aluminum Plate

Thickness (inches)

8

012345678

vs ALUMINUM PLATE AREA

Vertically Mounted

0.050

0.062

Aluminum Plate Area (inches2)

in Free Air

0.030

Optional mica or film insulator
for electrical isolation. Adds
approximately 1°C/W.

FIGURE 11. TO-220 Thermal Resistance versus Aluminum Plate Area.

®

DRV102

12

Aluminum Plate Area

Flat, Rectangular

Aluminum Plate

DRV102

TO-220 Package

THERMAL RESISTANCE vs

10

8

6

4

2

0

Power Dissipation (Watts)

0 25 50 75 100 125

Ambient Temperature (°C)

MAXIMUM POWER DISSIPATION

vs AMBIENT TEMPERATURE

TO-220 with Thermalloy

6030B Heat Sink

JA

= 16.5°C/W

PD = (TJ (max) – TA) /

JA

TJ (max) = 125°C

With infinite heat sink

(

JA

= 3°C/W),

max P

D

= 33W

at T

A

= 25°C

θ

θ

DDPAK

JA

= 26°C/W (3 in

2

1 oz.

copper mounting pad)

θ

DDPAK or TO-220

JA

= 65°C/W (no heat sink)

θ

θ

50

40

(°C/W)

JA

30

20

10

Thermal Resistance, θ

0

012345

CIRCUIT BOARD COPPER AREA

DRV102

DDPAK

Surface-Mount Package

1oz. copper

2

Copper Area (inches

)

FIGURE 12. DDPAK Thermal Resistance versus Circuit Board Copper Area.

Circuit Board Copper Area

DRV102

DDPAK

Surface-Mount Package

output current times the voltage across the conducting out­put transistor times the duty cycle. Power dissipation can be
minimized by using the lowest possible duty cycle necessary
to assure the required hold force.

THERMAL PROTECTION

Power dissipated in the DRV102 will cause the junction
temperature to rise. The DRV102 has thermal shutdown
circuitry that protects the device from damage. The thermal
protection circuitry disables the output when the junction
temperature reaches approximately +165°C, allowing the de­vice to cool. When the junction temperature cools to approxi­mately +150°C, the output circuitry is again enabled. Depend­ing on load and signal conditions, the thermal protection
circuit may cycle on and off. This limits the dissipation of the
driver but may have an undesirable effect on the load.

Any tendency to activate the thermal protection circuit
indicates excessive power dissipation or an inadequate heat
sink. For reliable operation, junction temperature should be
limited to +125°C, maximum. To estimate the margin of
safety in a complete design (including heat sink), increase
the ambient temperature until the thermal protection is
triggered. Use worst-case load and signal conditions. For
good reliability, thermal protection should trigger more than
40°C above the maximum expected ambient condition of
your application. This produces a junction temperature of
125°C at the maximum expected ambient condition.

The internal protection circuitry of the DRV102 was designed
to protect against overload conditions. It was not intended to
replace proper heat sinking. Continuously running the
DRV102 into thermal shutdown will degrade reliability.

HEAT SINKING

Most applications will not require a heat sink to assure that
the maximum operating junction temperature (125°C) is not
exceeded. However, junction temperature should be kept as

low as possible for increased reliability. Junction tempera­ture can be determined according to the equation:

where,

TJ = TA + P

θ

=

JA

DθJA

θ

+

θ

+

CH

θ

HA

JC

TJ= Junction Temperature (°C)
TA= Ambient Temperature (°C)
PD= Power Dissipated (W)

θ

= Junction-to-Case Thermal Resistance (°C/W)

JC

θ

= Case-to-Heat Sink Thermal Resistance (°C/W)

CH

θ

=

Heat Sink-to-Ambient Thermal Resistance (°C/W)

HA

θ

= Junction-to-Air Thermal Resistance (°C/W)

JA

Figure 13 shows maximum power dissipation versus ambi­ent temperature with and without the use of a heat sink.
Using a heat sink significantly increases the maximum
power dissipation at a given ambient temperature as shown.

FIGURE 13. Maximum Power Dissipation versus Ambient

Temperature.

13

DRV102

(1)

(2)

®

The difficulty in selecting the heat sink required lies in
determining the power dissipated by the DRV102. For dc
output into a purely resistive load, power dissipation is simply
the load current times the voltage developed across the
conducting output transistor times the duty cycle. Other loads
are not as simple. Once power dissipation for an application
is known, the proper heat sink can be selected.

Heat Sink Selection Example

A TO-220 package’s maximum dissipation is 2 Watts. The
maximum expected ambient temperature is 80°C. Find the
proper heat sink to keep the junction temperature below
125°C.

Combining Equations 1 and 2 gives:

TJ = TA + PD(

TJ, TA, and PD are given.
tions table, 3°C/W.

θ

+

θ

+

θ

JC

CH

θ

is provided in the Specifica-

θ

JC

can be obtained from the heat sink

CH

) (3)

HA

manufacturer. Its value depends on heat sink size, area, and
material used. Semiconductor package type, mounting screw
torque, insulating material used (if any), and thermal
joint compound used (if any) also affect

θ

. A typical

CH

θ

CH

for a TO-220 mounted package is 1°C/W. Now we can solve
for

θ

:

HA

To maintain junction temperature below 125°C, the heat
sink selected must have a

θ

less than 18.5°C/W. In other

HA

words, the heat sink temperature rise above ambient must be
less than 37°C (18.5°C/W • 2W). For example, at 2 Watts
Thermalloy model number 6030B has a heat sink
temperature rise of about 33°C above ambient, which is
below the 37°C required in this example. Figure 13 shows
power dissipation versus ambient temperature for a TO-220
package with a 6030B heat sink.

Another variable to consider is natural convection versus
forced convection air flow. Forced-air cooling by a small fan
can lower

θ

(

θ

+

θ

CA

CH

) dramatically. Heat sink manufac-

HA

turers provide thermal data for both of these cases. For
additional information on determining heat sink require­ments, consult Application Bulletin AB-038.

As mentioned earlier, once a heat sink has been selected, the
complete design should be tested under worst-case load and
signal conditions to ensure proper thermal protection.

θ

HA

θθθ

HA

125 C – 80 C

°°

=

2W

TT

–

JA

=+

–

()

P

D

– 3 C/W 1 C/W 18.5 C/W

()

JC CH

°+°

=°

(4)

®

DRV102

14

APPLICATION CIRCUITS

+5V

5kΩ

Microprocessor

NOTE: (1) Duty cycle can be programmed by

a resistor, analog voltage, or D/A converter.

Do not drive below 0.1V.

TTL Control Input

1

On

Off

Delay
Adjust

FIGURE 14. Fluid Flow Control System.

Thermal Shutdown

Over/Under Current

Delay

2

C

DRPWM

24kHz

Oscillator

PWM

3 4 Gnd

Duty Cycle

(1)

Adjust

(10% to 90%)

Flag

7

DRV102

5
V

6
Out

Can drive most types

of solenoid-actuated

valves and actuators

V

S

S

Pinch Valve

Flexible Tube

Plunger

Solenoid Coil

Brighter light results in

increased duty cycle

DRV102

5

V

S

On/Off

1

6
Out

34

2

Delay
Adjust

Aimed at

ambient

light

λ

Cadmium Sulfide

Optical Detector

(Clairex CL70SHL

or CLSP5M)

10kΩ

FIGURE 15. Instrument Light Dimmer Circuit.

Lamp

DRV102

5

V

Input

(On/Off)

4-20mA

1

2

34

Delay

Adjust

100Ω

Duty Cycle Adjust
187Ω

Twisted Pair

NOTE: (1) Rectifier diode required for inductive

loads to conduct load current during the off cycle.

S

6
Out

FIGURE 16. 4-20mA Input to PWM Output.

(1)

Coil

15

®

DRV102

On/Off

Reduced mechanical actuation delay with high voltage pull-in followed by low duty cycle

DRV102

5

+40V (max for TPIC6273)

V

1

C

D

0.047µF

34

2

R

150kΩ

PWM

(25% Duty Cycle)

S

6
Out

Full power pulse width is control

.

D

7 14 15 16 17

TI TPIC6273

(Octal Power Switch)

TTL/CMOS Solenoid Selection Inputs

+5V

plus interval set by C

4

20

10

238912131819

5 6

FIGURE 17. Improved Switching Time When Driving Multiple Loads.

74LS05

• • •• • •

11

Control

®

DRV102

16

a)

V

S

DRV102

5

On/Off

Delay

Adjust

b)

On/Off

Delay

Adjust

1

2

Duty

Cycle

Adjust

1

2

DRV102

6
Out

Gnd43

Heating
Element

5

0.1µF

Higher temperature results

in lower duty cycle.

Thermistor

R

1

R

2

V

S

10µF

REF200

6
Out

Gnd43

Heating
Element

7, 8

100µA 100µA

12

Temperature

10kΩ

or

(1)

IN4148

20kΩ

Control

Higher temperature results

in lower duty cycle.

Duty Cycle

Adjust

4.7V

NOTE: (1) Or any common silicon diode suited

to the mechanical mounting requirements.

1kΩ

Integrator improves accuracy

2µF Film

0.1µF

6

OPA134

V

S

7

2

3

4

Thermistor

5kΩ at +25°C

10MΩ

FIGURE 18. (a) Constant Temperature Controller. (b) Improved Accuracy Constant Temperature Controller.

17

®

DRV102

Input

(On/Off)

Speed Control

(1)

1

2

Delay
Adjust

FIGURE 19. Constant Speed Motor Control.

DRV102

5

+12V

6
Out

34

R

R

1

2

NOTE: (1) Select R1/R2 ratio based on tachometer output voltage.

dc Tachometer

Coupled to Motor

M

Open circuit will

provide 3.4V

“on” signal

T

1

DRV102

5

+40V

6

Speed Control Input

0V to +10V

–15V

+15V

One-Shot

5nF

NP0

47kΩ

Tachometer

T

22kΩ

1nF

2N2222

AC

Coupled to Motor

+15V

100kΩ

470kΩ

Frequency In

10kΩ

FIGURE 20. DC Motor Speed Control Using AC Tachometer.

40kΩ

23

Delay Adjust

0.5µF

VFC32

1kΩ

V

OUT

4

M

®

DRV102

18

DRV102

1

On

Off

32

Delay
Adjust

Duty Cycle

Adjust

0.6V gives ~ 90% Duty Cycle

3.7V gives ~ 10% Duty Cycle

FIGURE 21. Constant Current Output Drive.

5

Phase 2
Stepper
Logic In

DRV102

6

+24V

5

V

S

6
Out

4

Only one DRV102 is

turned on at sequence time.

V

S

2kΩ

5.1V

Zener

R

Load

SHUNT

0.1Ω

5kΩ

V

Z

25kΩ

100kΩ

0.1µF

1kΩ

Current Set

100kΩ

V

Z

OPA237

0.1µF

5

V

S

Phase 3

DRV102

6

Stepper
Logic In

Motor

5

V

S

Phase 1
Stepper
Logic In

DRV102

6

FIGURE 22. Three-Phase Stepper Motor Driver Provides High-Stepping Torque.

VS = +8V to +60V

Select R1 and R2 to divide

down V

to 5.5V max.

S

For example: with V

= 11kΩ, R2 = 1kΩ

R

1

VIN = • 60V = 5V

1kΩ + 11kΩ

1kΩ

= 60V

S

R

1

R

3

4.87kΩ

Sets start-up

duty cycle

R

2

C

1

20µF

+

DRV102

1

2

Delay Adjust

4.3V

DIN5229

5

6
Out

34

Duty Cycle Adjust

after soft start

R

4

4.87kΩ

V

S

FIGURE 23. Soft-Start Circuit for Incandescent Lamps and Other Sensitive Loads.

19

®

DRV102