Datasheet DM9328W-883, DM9328J-883 Datasheet (NSC)

Page 1
TL/F/9793
9328/DM9328 Dual 8-Bit Shift Register
June 1989
9328/DM9328 Dual 8-Bit Shift Register
General Description
The ’9328 is a high speed serial storage element providing 16 bits of storage in the form of two 8-bit registers. The multifunctional capability of this device is provided by sever­al features: 1) additional gating is provided at the input to both shift registers so that the input is easily multiplexed between two sources; 2) the clock of each register may be provided separately or together; 3) both the true and com­plementary outputs are provided from each 8-bit register, and both registers may be master cleared from a common input.
Connection Diagram
Dual-In-Line Package
TL/F/9793– 1
Order Number 9328DMQB, 9328FMQB or DM9328N
See NS Package Number J16A, N16E or W16A
Logic Symbol
TL/F/9793– 2
V
CC
e
Pin 16
GND
e
Pin 8
Pin Names Description
S Data Select Input D0, D1 Data Inputs CP Clock Pulse Input (Active HIGH)
Common (Pin 9) Separate (Pins 7 and 10)
MR
Master Reset Input (Active LOW) Q7 Last Stage Output Q
7 Complementary Output
C
1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.
Page 2
Absolute Maximum Ratings (Note)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Supply Voltage 7V
Input Voltage 5.5V
Operating Free Air Temperature Range
Military
b
55§Ctoa125§C
Commercial 0
§
Ctoa70§C
Storage Temperature Range
b
65§Ctoa150§C
Note:
The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaran­teed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation.
Recommended Operating Conditions
Symbol Parameter
Military Commercial
Units
Min Nom Max Min Nom Max
V
CC
Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
V
IH
High Level Input Voltage 2 2 V
V
IL
Low Level Input Voltage 0.8 0.8 V
I
OH
High Level Output Current
b
0.4
b
0.4 mA
I
OL
Low Level Output Current 16 16 mA
T
A
Free Air Operating Temperature
b
55 125 0 70
§
C
ts(H) Setup Time HIGH or LOW 20 20
ns
t
s
(L) Dnto CP 20 20
th(H) Hold Time HIGH or LOW 0 0
ns
t
h
(L) Dnto CP 0 0
tw(H) Clock Pulse Width HIGH 25 25
ns
tw(L) or LOW 25 25
tw(L) MR Pulse Width with CP HIGH 30 30 ns
tw(L) MR Pulse Width with CP LOW 40 40 ns
t
rec
Recovery Time MR to CP 33 33 ns
Electrical Characteristics
Over Recommended Operating Free Air Temperature Range (Unless Otherwise Noted)
Symbol Parameter Conditions Min
Typ
Max Units
(Note 1)
V
I
Input Clamp Voltage V
CC
e
Min, I
I
eb
12 mA
b
1.5 V
V
OH
High Level Output Voltage V
CC
e
Min, I
OH
e
Max
2.4 3.4 V
V
IL
e
Max
V
OL
Low Level Output Voltage V
CC
e
Min, I
OL
e
Max
0.2 0.4 V
V
IH
e
Min
I
I
Input Current@Max Input Voltage V
CC
e
Max, V
I
e
5.5V 1 mA
I
IH
High Level Input Current V
CC
e
Max, V
I
e
2.4V 40
MR
,DnInputs
CP Inputs 60 mA
S Inputs 80
CP (COM) Inputs 120
I
IL
Low Level Input Current V
CC
e
Max, V
I
e
0.4V
b
1.6
MR
,DnInputs
CP Inputs
b
2.4 mA
S Inputs
b
3.2
CP (COM) Input
b
4.8
2
Page 3
Electrical Characteristics
Over Recommended Operating Free Air Temperature Range (Unless Otherwise Noted) (Continued)
Symbol Parameter Conditions Min
Typ
Max Units
(Note 1)
I
OS
Short Circuit V
CC
e
Max MIL
b
20
b
70
mA
Output Current (Note 2)
COMM
b
20
b
70
I
CC
Supply Current V
CC
e
Max 77 mA
Note 1: All typicals are at V
CC
e
5V, T
A
e
25§C.
Note 2: Not more than one output should be shorted at a time.
Switching Characteristics
V
CC
ea
5.0V, T
A
ea
25§C (See Section 1 for waveforms and load configurations)
C
L
e
15 pF
Symbol Parameter R
L
e
400X Units
Min Max
f
max
Maximum Shift Right Frequency 20 MHz
t
PLH
Propagation Delay 20
ns
t
PHL
CP to Q7 or Q735
t
PHL
Propagation Delay MR to Q7 50 ns
Functional Description
The two 8-bit shift registers have a common clock input (pin
9) and separate clock inputs (pins 10 and 7). The clocking of each register is controlled by the OR function of the sep­arate and the common clock input. Each register is com­posed of eight clocked RS master/slave flip-flops and a number of gates. The clock OR gate drives the eight clock inputs of the flip-flops in parallel. When the two clock inputs (the separate and the common) to the OR gate are LOW, the slave latches are steady, but data can enter the master latches via the R and S input. During the first LOW-to-HIGH transition of either, or both simultaneously, of the two clock inputs, the data inputs (R and S) are inhibited so that a later change in input data will not affect the master; then the now trapped information in the master is transferred to the slave. When the transfer is complete, both the master and the slave are steady as long as either or both clock inputs re­main HIGH. During the HIGH-to-LOW transition of the last remaining HIGH clock input, the transfer path from master to slave is inhibited first, leaving the slave steady in its pres­ent state. The data inputs (R and S) are enabled so that new data can enter the master. Either of the clock inputs can be used as clock inhibit inputs by applying a logic HIGH signal.
Each 8-bit shift register has a 2-input multiplexer in front of the serial data input. The two data inputs D0 and D1 are controlled by the data select input (S) following the Boolean expression:
Serial data in: S
D
e
SD0aSD1
An asynchronous master reset is provided which, when acti­vated by a LOW logic level, will clear all 16 stages indepen­dently of any other input signal.
Shift Select Table
INPUTS OUTPUT
SD0D1Q7(t
n
a
8
)
LL X L LH X H HX L L HX H H
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
X
e
Immaterial
n
a8e
indicates state after eight clock pulse
3
Page 4
Logic Diagram
TL/F/9793– 3
4
Page 5
Physical Dimensions inches (millimeters)
16-Lead Ceramic Dual-In-Line Package (J)
Order Number 9328DMQB NS Package Number J16A
16-Lead Molded Dual-In-Line Package (N)
Order Number DM9328N
NS Package Number N16E
5
Page 6
9328/DM9328 Dual 8-Bit Shift Register
Physical Dimensions inches (millimeters) (Continued)
16-Lead Ceramic Flat Package (W)
Order Number 9328FMQB
NS Package Number W16A
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