Datasheet DM74LS503N Datasheet (Fairchild Semiconductor)

DM74LS503
8-Bit Successive Approximation Register
(with Expansion Control)

DM74LS503 8-Bit Successive Approximation Register

March 1989
Revised March 2000

General Description

The DM74LS503 register has an active LOW Enable (E)
input that is used in cascading two or more packages f or
longer word lengths. A HIGH signal on E
operation, forces Q7 HIG H and prevents the device from
accepting serial data. With the E
connected to the CC
cant) device, the DM74LS503 will be inhibited until the pre­ceding device is filled, causing its CC
This LOW signal then enables the D M74LS503 to accept
the serial data on subsequent clocks.

output of a precedin g (more signifi-

, after a START

input of an DM7 4LS503

output to go LOW.

Features

■ Performs serial-to-parallel conversion

■ Expansion control for longer words

■ Storage and control for successive approximation A to D

conversion

■ Low power Schottky version of 2503

Ordering Code:

Order Number Package Number Package Description

DM74LS503N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Connection Diagram Logic Symbol

VCC = Pin 16
GND = Pin 8

Pin Descriptions

Pin Names Description

D Serial Data Input
S
CP Clock Pulse Input (Active Rising Edge)
E
CC

Q0–Q7 Parallel Register Outputs

7 Complement of Q7 Output

Q

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Start Input (Active LOW)

Conversion Enable Input (Active LOW)
Conversion Complete Output (Active LOW)

Logic Diagrams

DM74LS503

Note: Cell logic is repeated fo r register stages Q5 to Q1.

Connection for Longer Word Lengths

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Absolute Maximum Ratings(Note 1)

Supply Voltage 7V
Input Voltage 7V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature Range −65°C to +150°C

Note 1: The “Absolute Maximum Ratings ” are those val ues beyond w hich
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommend ed O peratin g Cond itions” t able w ill defin e the condit ions
for actual device operation.

Recommended Operating Conditions

Symbol Parameter Min Nom Max Units

V

CC

V

IH

V

IL

I

OH

I

OL

T

A

(H) Setup Time HIGH or LOW 16

t

S

(L) S to CP 16

t

S

(H) Hold Time HIGH or LOW 0

t

H

(L) S to CP 0

t

H

(H) Setup Time HIGH or LOW 8

t

S

(L) D to CP 8

t

S

(H) Hold Time HIGH or LOW 10

t

H

(L) D to CP 10

t

H

(H) CP Pulse Width HIGH or LOW 46

t

W

(L) 46

t

W

Supply Voltage 4.75 5 5.25 V
HIGH Level Input Voltage 2 V
LOW Level In put Voltage 0.8 V
HIGH Level Output Voltage −0.4 mA
LOW Level Output Current 8 mA
Free Air Oper ating Temperature 0 70 °C

DM74LS503

ns

ns

ns

ns

ns

Electrical Characteristics

Over recommended operating free air temperature range (unless otherwise noted)

Symbol Parameter Conditions Min

V

I

V

OH

V

OL

I

I

I

IH

I

IL

I

OS

I

CC

Note 2: All typicals are at VCC = 5V, TA = 25°C.
Note 3: Not more than one output should be shorted at a time, and the duration should not exc eed one second.

Input Clamp Voltage VCC = Min, II = −18 mA −1.5 V
HIGH Level VCC = Min, IOH = Max,
Output Voltage VIL = Max
LOW Level VCC = Min, IOL = Max, VIH = Min 0.5
Output Voltage IOL = 4 mA, VCC = Min 0.4
Input Current @ Max VCC = Max, VI = 7V
Input Voltage VI = 10V
HIGH Level Input Current VCC = Max, VI = 2.7V 20 µA
LOW Level Input Current VCC = Max, VI = 0.4V −0.8 mA
Short Circuit Output Current VCC = Max (Note 3) −20 −100 mA
Supply Current VCC = Max 65 mA

Switching Characteristics

VCC = +5.0V, TA = +25°C

Symbol Parameter

f

MAX

t

PLH

t

PHL

t

PLH

t

PHL

Maximum Count Frequency 15 MHz
Propagation Delay 35
CP to Qn or CC 25
Propagation Delay 20
E to Q7 24

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RL = 2 kΩ, CL = 15 pF

Min Max

Typ

(Note 2)

2.7 V

Max Units

0.1 mA

Units

ns

ns

V

Physical Dimensions inches (millimeters) unless otherwise noted

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Package Number N16E

DM74LS503 8-Bit Successive Approximation Register

Fairchild does not assume any responsibility for us e of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or syste ms
which, (a) are intended for surgical implant into the
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to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea­sonably expected to result in a significan t injury to the
user.

2. A critical component in any compon ent of a lif e supp ort
device or system whose failu re to perform can be rea­sonably expected to ca use the fa i lure of the li fe su pp ort
device or system, or to affect its safety or effectiveness.

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