Datasheet DM74LS47N, DM74LS47MX, DM74LS47M Datasheet (Fairchild Semiconductor)

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© 2000 Fairchild Semiconductor Corporation DS009817 www.fairchildsemi.com
October 1988 Revised March 2000
DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs
DM74LS47 BCD to 7-Segment Decoder/Driver with
Open-Collector Outputs
General Description
Features
Open-collector outputs
Drive indicator segments directly
Cascadable zero-suppression capability
Lamp test input
Ordering Code:
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.
Logic Symbol
VCC = Pin 16 GND = Pin 8
Connection Diagram
Pin Descriptions
Note 1: OC—Open Collector
Order Number Package Number Package Description
DM74LS47M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74LS47N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
A0–A3 BCD Inputs RBI
Ripple Blanking Input (Active LOW)
LT
Lamp Test Input (Active LOW)
BI
/RBO Blanking Input (Active LOW) or
Ripple Blanking Output (Active LOW)
a
–g Segment Outputs (Active LOW) (Note 1)
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DM74LS47
Truth Table
Note 2: BI/RBO is wire-AN D logic serving as blanking input (B I) and/or ripple-bla nk ing output (RBO). The blanking out (BI) must be open or held at a HIGH
level when output fun ctions 0 through 15 ar e desired, and ripple-bl anking input (RBI
) must be open or at a HIGH lev el if blanking or a decima l 0 is not
desired. X = input may be HIGH or LOW. Note 3: When a LOW level is applied to the blanking input (forced condition) all segment outputs go to a HIGH level regardless of the state of any other input
condition. Note 4: When ripple-b lanking input (RB I
) and inputs A0, A1, A2 a nd A3 are LOW le vel, w ith th e l amp test inpu t a t H IGH leve l, a ll se gme nt o utpu ts go t o a
HIGH level and the ripple-blanking output (RBO
) goes to a LOW level (re sp onse condition).
Note 5: When the blanking input/ripple-blanking output (BI
/RBO) is OPEN or hel d at a HIG H lev el, and a LOW level is applied to lamp test input , all seg m ent
outputs go to a LOW level.
Functional Description
The DM74LS47 decodes the input data in the pattern indi­cated in the Truth Table and the segment identification illustration. If the input data is decimal zero, a LOW signal applied to the RBI
blanks the display and causes a multi-
digit display. For example, by grounding the RBI
of the
highest order decoder and connecting its BI
/RBO to RBI of the next lowest order decoder, etc., leading zeros will be suppressed. Similarly, by grounding RBI
of the lowest order
decoder and connecting its BI
/RBO to RBI of the next high­est order decoder, etc., trailing zeros will be suppressed. Leading and trailing zeros can be suppressed simulta­neously by using external gates, i.e.: by driving RBI
of a
intermediate decoder fro m an OR gate whose inputs are BI
/RBO of the next highest and lowest order decoders. BI/ RBO also serves as an unconditio nal blanking input. The internal NAND gate that gen erates the RBO
signal has a resistive pull-up, as oppose d to a totem pole, and thu s BI/ RBO can be forced LOW by exte rnal means, usin g wired­collector logic. A LOW signal thus app lied to BI
/RBO turns off all segment outputs. This b lanking f eature can be used to control display inten sity by vary ing the d uty cycle of the blanking signal. A LOW signal applied to LT
turns on all
segment outputs, provided that BI
/RBO is not forced LOW.
Decimal
Inputs Outputs
or Note
Function
LT
RBI A3 A2 A1 A0 BI/RBO a b c d e f g
0 HHLLLL H LLLLLLH(Note 2) 1 H X L L L H H H L L H H H H (Note 2) 2HXLLHLHLLHLLHL 3 HXLLHHHLLLLHHL
4HXLHLLHHLLHHLL 5 HXLHLHHLHLLHLL 6 HXLHHL H HHLLLLL 7 HXLHHHHLLLHHHH 8 HXHL LL H LLLLLLL
9 HXHL LH H LLLHHLL 10 H X H L H L H H H H L L H L 11 HXH LHH H HHLLHHL 12 H X H H L L H H L H H H L L 13 HXHHLHHLHHLHLL
14 HXHHHL H HHHLLLL 15 H XH HH H H HHHHHHH BI
XXXXXX L HHHHHHH(Note 3)
RBI
H L L L L L L HHHHHHH(Note 4)
LT
LXXXXX H LLLLLLL(Note 5)
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DM74LS47
Logic Diagram
Numerical Designations—Resultant Displays
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DM74LS47
Absolute Maximum Ratings(Note 6)
Note 6: The “Absolute Maximum Ratin gs” are those v alues beyon d which
the safety of the dev ice cannot be guaranteed. T he device sh ould not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommend ed O peratin g Cond itions” t able w ill defin e the co ndition s for actual device operation.
Recommended Operating Conditions
Note 7: OFF-State at a–g.
Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted)
Note 8: All typicals are at VCC = 5V, TA = 25°C. Note 9: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Switching Characteristics
at VCC = +5.0V, TA = +25°C
Note 10: LT = HIGH, A0–A3 = LOW
Supply Voltage 7V Input Voltage 7V Operating Free Air Temperature Range 0°C to +70°C Storage Temperature Range −65°C to +150°C
Symbol Parameter Min Nom Max Units
V
CC
Supply Voltage 4.75 5 5. 25 V
V
IH
HIGH Level Input Voltage 2 V
V
IL
LOW Level Input Voltage 0.8 V
I
OH
HIGH Level Output Current
250 µA
a
g @ 15V = VOH (Note 7)
I
OH
HIGH Level Output Current BI /RBO −50 µA
I
OL
LOW Level Output Current 24 mA
T
A
Free Air Operating Temperature 0 70 °C
Symbol Parameter Conditions Min
Typ
Max Units
(Note 8)
V
I
Input Clamp Voltage VCC = Min, II = 18 mA 1.5 V
V
OH
HIGH Level VCC = Min, IOH = Max,
2.7 3.4 V
Output Voltage VIL = Max, BI /RBO
I
OFF
Output HIGH Current Segment Outputs VCC = 5.5V, VO = 15V a g 250 µA
V
OL
LOW Level VCC = Min, IOL = Max,
0.35 0.5
Output Voltage VIH = Min, a g
IOL = 3.2 mA, BI /RBO 0.5 V IOL = 12 mA, a –g 0.25 0.4
IOL = 1.6 mA, BI /RBO 0.4
I
I
Input Current @ Max VCC = Max, VI = 7V
100 µA
Input Voltage VCC = Max, VI = 10V
I
IH
HIGH Level Input Current VCC = Max, VI = 2.7V 20 µA
I
IL
LOW Level Input Current VCC = Max, VI = 0.4V 0.4 mA
I
OS
Short Circuit VCC = Max (Note 9),
mA
Output Current IOS at BI/RBO −0.3 2.0
I
CC
Supply Current VCC = Max 13 mA
RL = 665
Symbol Parameter Conditions CL = 15 pF Units
Min Max
t
PLH
Propagation Delay 100
ns
t
PHL
An to a –g 100
t
PLH
Propagation Delay 100
ns
t
PHL
RBI to a –g (Note 10) 100
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DM74LS47
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
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DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit pate nt licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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