Datasheet DM74LS38SJX, DM74LS38SJ, DM74LS38N, DM74LS38MX, DM74LS38M Datasheet (Fairchild Semiconductor)

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August 1986 Revised March 2000

DM74LS38 Quad 2-Input NAND Buffer with Open-Collector Outputs

General Description

This device contains four independent gates, each of which performs the logic NA ND functio n. The open -collector outputs require external pull-up resistors for proper logical operation.

Pull-Up Resistor Equations

Where: N1 (IOH) = total maximum output high c urrent

for all outputs tied to pull-up resistor

(IIH) = total maximum input high current for all inputs tied to pull-up resistor N

(IIL) = total maximum input low current for all inputs tied to pull-up resistor

Ordering Code:

Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.

Connection Diagram Function Table

Y = AB

H = HIGH Logic Level L = LOW Logic Level

Order Number Package Number Package Description

DM74LS38M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow DM74LS38SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74LS38N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Inputs Output

ABY

LLH LHH HLH HHL

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DM74LS38

Absolute Maximum Ratings(Note 1)

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the dev ice cannot be guaranteed. T he device sh ould not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommend ed O peratin g Cond itions” t able w ill defin e the co ndition s for actual device operation.

Recommended Operating Conditions

Electrical Characteristics

over recommended operating free air temperature range (unless otherwise noted)

Note 2: All typicals are at VCC = 5V, TA = 25°C.

Switching Characteristics

at VCC = 5V and TA = 25°C

Supply Voltage 7V Input Voltage 7V Output Voltage 7V Operating Free Air Temperature Range 0°C to +70°C Storage Temperature Range −65°C to +150°C

Symbol Parameter Min Nom Max Units

Supply Voltage 4.75 5 5.25 V

HIGH Level Input Voltage 2 V

LOW Level Input Voltage 0.8 V

HIGH Level Output Voltage 5.5 V

LOW Level Output Current 24 mA

Free Air Operating Temperature 0 70 °C

Symbol Parameter Conditions Min

Typ

Max Units

(Note 2)

Input Clamp Voltage VCC = Min, II = −18 mA −1.5 V

CEX

HIGH Level VCC = Min, VO = 5.5V

250 µA

Output Current VIL = Max

LOW Level VCC = Min, IOL = Max

0.35 0.5

Output Voltage VIH = Min V

IOL = 12 mA, VCC = Min 0.25 0.4

Input Current @ Max Input Voltage VCC = Max, VI = 7V 0.1 mA

HIGH Level Input Current VCC = Max, VI = 2.7V 20 µA

LOW Level Input Current VCC = Max, VI = 0.4V −0.36 mA

CCH

Supply Current with Outputs HIGH VCC = Max 0.9 2 mA

CCL

Supply Current with Outputs LOW VCC = Max 6 12 mA

RL = 667Ω

Symbol Parameter

CL = 45 pF CL = 150 pF

Units

Min Max Min Max

PLH

Propagation Delay Time

22 48 ns

LOW-to-HIGH Level Output

PHL

Propagation Delay Time

22 29 ns

HIGH-to-LOW Level Output

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DM74LS38

Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

Package Number M14A

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DM74LS38

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M14D

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DM74LS38 Quad 2-Input NAND Buffer with Open-Collector Outputs

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Package Number N14A

Fairchild does not assume any responsibility for use of any circu itry described, no circuit patent license s are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are dev ic es or syste ms which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided i n the labe li ng, can be re asonably expected to result in a significant injury to the user.

2. A critical componen t in any com ponent o f a l ife supp ort device or system whose failu re to perform can b e reasonably expected to c ause th e fa i lure of the li fe s upp or t device or system, or to affect its safety or effectiveness.

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