Datasheet DM74LS245WMX, DM74LS245WM, DM74LS245SJX, DM74LS245SJ, DM74LS245N Datasheet (Fairchild Semiconductor)

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© 2000 Fairchild Semiconductor Corporation DS006413 www.fairchildsemi.com
August 1986 Revised March 2000
DM74LS245 3-STATE Octal Bus Transceiver
DM74LS245 3-STATE Octal Bus Transceiver
General Description
These octal bus transceivers ar e designed for asynchro­nous two-way communication between data buses. The control function im plementation minimizes exte rnal timing requirements.
) can be used to disa ble the device so that the
buses are effectively isolated.
Features
Bi-Directional bus tr ansceiver in a high-density 20-pin package
3-STATE outputs drive bus lines directly
PNP inputs reduce DC loading on bus lines
Hysteresis at bus inputs improve noise margins
Typical propagation delay times, port-to-port 8 ns
Typical enable/disable times 17 ns
I
OL
(sink current)
24 mA
I
OH
(source current)
15 mA
Ordering Code:
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.
Connection Diagram Function Table
H = HIGH Level L = LOW Level X = Irrelevant
Order Number Package Number Package Description
DM74LS245WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JED EC MS-013, 0.300 Wide DM74LS245SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74LS245N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Enable Direction Operation
G
Control
DIR
L L B Data to A Bus L H A Data to B Bus
HX Isolation
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DM74LS245
Absolute Maximum Ratings(Note 1)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the dev ice cannot be guaranteed. T he device sh ould not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommend ed O peratin g Cond itions” t able w ill defin e the co ndition s for actual device operation.
Recommended Operating Conditions
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Note 2: All typicals are at VCC = 5V, TA = 25°C. Note 3: Not more than one output should be shorted at a time, not to exceed one second duration
Supply Voltage 7V Input Voltage
DIR or G
7V
A or B 5.5V Operating Free Air Temperature Range 0°C to +70°C Storage Temperature Range −65°C to +150°C
Symbol Parameter Min Nom Max Units
V
CC
Supply Voltage 4.75 5 5.25 V
V
IH
HIGH Level Input Voltage 2 V
V
IL
LOW Level Input Volt age 0.8 V
I
OH
HIGH Level Output Current −15 mA
I
OL
LOW Level Output Current 24 mA
T
A
Free Air Operating Temperature 0 70 °C
Symbol Parameter Conditions Min
Typ
Max Units
(Note 2)
V
I
Input Clamp Voltage VCC = Min, II = 18 mA 1.5 V
HYS Hysteresis (VT+ VT)V
CC
= Min 0.2 0.4 V
V
OH
HIGH Level VCC = Min, VIH = Min
2.7
Output Voltage VIL = Max, IOH = 1 mA
VCC = Min, VIL = Min
2.4 3.4 V
VIL = Max, IOH = 3 mA VCC = Min, VIH = Min
2
VIL = 0.5V, IOH = Max
V
OL
LOW Level VCC = Min IOL = 12 mA 0.4 Output Voltage VIL = Max
IOL = Max 0.5
V
VIH = Min
I
OZH
Off-State Output Current, VCC = Max
VO = 2.7V 20 µA
HIGH Level Voltage Applied VIL = Max
I
OZL
Off-State Output Current, VIH = Min
VO = 0.4V 200 µA
LOW Level Voltage Applied
I
I
Input Current at Maximum VCC = Max A or B VI = 5.5V 0.1
mA
Input Voltage DIR or G VI = 7V 0.1
I
IH
HIGH Level Input Current VCC = Max, VI = 2.7V 20 µA
I
IL
LOW Level Input Current VCC = Max, VI = 0.4V 0.2 mA
I
OS
Short Circuit Output Current VCC = Max (Note 3) 40 225 mA
I
CC
Supply Current Outputs HIGH
VCC = Max
48 70 Outputs LOW 62 90 mA Outputs at Hi-Z 64 95
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DM74LS245
Switching Characteristics
VCC = 5V, TA = 25°C
Symbol Parameter Conditions Min Max Units
t
PLH
Propagation Delay Time, CL = 45 pF
12 ns
LOW-to-HIGH Level Output RL = 667
t
PHL
Propagation Delay Time,
12 ns
HIGH-to-LOW Level Output
t
PZL
Output Enable Time
40 ns
to LOW Level
t
PZH
Output Enable Time
40 ns
to HIGH Level
t
PLZ
Output Disable Time CL = 5 pF
25 ns
from LOW Level RL = 667
t
PHZ
Output Disable Time
25 ns
from HIGH Level
t
PLH
Propagation Delay Time, CL = 150 pF
16 ns
LOW-to-HIGH Level Output RL = 667
t
PHL
Propagation Delay Time,
17 ns
HIGH-to-LOW Level Output
t
PZL
Output Enable Time
45 ns
to LOW Level
t
PZH
Output Enable Time
45 ns
to HIGH Level
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DM74LS245
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
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DM74LS245
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
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DM74LS245 3-STATE Octal Bus Transceiver
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit pate nt licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea­sonably expected to result in a significant inju ry to the user.
2. A critical component in any compon ent of a life supp ort device or system whose failu re to perform can be rea­sonably expected to ca use the fa i lure of the life su pp ort device or system, or to affect its safety or effectiveness.
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