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DM74LS245
3-STATE Octal Bus Transceiver
DM74LS245 3-STATE Octal Bus Transceiver
August 1986
Revised March 2000
General Description
These octal bus transceivers ar e designed for asynchronous two-way communication between data buses. The
control function im plementation minimizes exte rnal timing
requirements.
The device allows data t ransmiss ion fr om the A Bus to t he
B Bus or from the B Bus t o the A Bus d epend ing upo n the
logic level at the direction control (DIR) input. The enable
) can be used to disa ble the device so that the
input (G
buses are effectively isolated.
Features
■ Bi-Directional bus transceiver in a high-density 20-pin
package
■ 3-STATE outputs drive bus lines directly
■ PNP inputs reduce DC loading on bus lines
■ Hysteresis at bus inputs improve noise margins
■ Typical propagation delay times, port-to-port 8 ns
■ Typical enable/disable times 17 ns
(sink current)
■ I
OL
24 mA
(source current)
■ I
OH
−15 mA
Ordering Code:
Order Number Package Number Package Description
DM74LS245W M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74LS245SJ M20D 20-Lead Small Outline Package (SOP ), EIAJ TYPE II, 5.3mm Wide
DM74LS245N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering cod e.
Connection Diagram Function Table
Enable Direction Operation
G
L L B Data to A Bus
L H A Data to B Bus
HX Isolation
H = HIGH Level
L = LOW Level
X = Irrelevant
Control
DIR
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Absolute Maximum Ratings(Note 1)
Supply Voltage 7V
Input Voltage
DIR or G
DM74LS245
A or B 5.5V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature Range −65°C to +150°C
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the dev ice cannot be guaranteed. T he device sh ould not be
operated at these limits. The parametric values defined in the Electrical
7V
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommend ed O peratin g Cond itions” t able w ill defin e the c ondit ions
for actual device operation.
Recommended Operating Conditions
Symbol Parameter Min Nom Max Units
V
CC
V
IH
V
IL
I
OH
I
OL
T
A
Supply Voltage 4.75 5 5.25 V
HIGH Level Input Voltage 2 V
LOW Level In put Volt age 0.8 V
HIGH Level Output Current −15 mA
LOW Level Ou tput Current 24 mA
Free Air Operating Temperature 0 70 °C
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min
V
I
HYS Hysteresis (VT+ − VT−)V
V
OH
V
OL
I
OZH
I
OZL
I
I
I
IH
I
IL
I
OS
I
CC
Note 2: All typicals are at VCC = 5V, TA = 25°C.
Note 3: Not more than one output should be shorted at a time, not to exceed one second duration
Input Clamp Voltage VCC = Min, II = −18 mA −1.5 V
HIGH Level VCC = Min, VIH = Min
Output Voltage VIL = Max, IOH = −1 mA
LOW Level VCC = Min IOL = 12 mA 0.4
Output Voltage VIL = Max
Off-State Output Current, VCC = Max
HIGH Level Voltage Applied VIL = Max
Off-State Output Current, VIH = Min
LOW Level Voltage Applied
Input Current at Maximum VCC = Max A or B VI = 5.5V 0.1
Input Voltage DIR or G VI = 7V 0.1
HIGH Level Input Current VCC = Max, VI = 2.7V 20 µA
LOW Level Input Current VCC = Max, VI = 0.4V −0.2 mA
Short Circuit Output Current VCC = Max (Note 3) −40 −225 mA
Supply Current Outputs HIGH
= Min 0.2 0.4 V
CC
VCC = Min, VIL = Min
VIL = Max, IOH = −3 mA
VCC = Min, VIH = Min
VIL = 0.5V, IOH = Max
VIH = Min
Outputs LOW 62 90 mA
Outputs at Hi-Z 64 95
IOL = Max 0.5
VO = 2.7V 20 µA
VO = 0.4V −200 µA
VCC = Max
2.7
2.4 3.4 V
2
Typ
(Note 2)
48 70
Max Units
V
mA
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Switching Characteristics
VCC = 5V, TA = 25°C
Symbol Parameter Conditions Min Max Units
t
PLH
t
PHL
t
PZL
t
PZH
t
PLZ
t
PHZ
t
PLH
t
PHL
t
PZL
t
PZH
Propagation Delay Time, CL = 45 pF
LOW-to-HIGH Level Output RL = 667Ω
Propagation Delay Time,
HIGH-to-LOW Level Output
Output Enable Time
to LOW Level
Output Enable Time
to HIGH Level
Output Disable Time CL = 5 pF
from LOW Level RL = 667Ω
Output Disable Time
from HIGH Level
Propagation Delay Time, CL = 150 pF
LOW-to-HIGH Level Output RL = 667Ω
Propagation Delay Time,
HIGH-to-LOW Level Output
Output Enable Time
to LOW Level
Output Enable Time
to HIGH Level
12 ns
12 ns
40 ns
40 ns
25 ns
25 ns
16 ns
17 ns
45 ns
45 ns
DM74LS245
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Physical Dimensions inches (millimeters) unless otherwise noted
DM74LS245
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
DM74LS245
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
DM74LS245 3-STATE Octal Bus Transceiver
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Fairchild does not assume any responsibility for us e of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significan t injury to the
user.
Package Number N20A
2. A critical component in any com ponen t of a life supp ort
device or system whose failu re to perform can be reasonably expected to ca use the fa i lure of the li fe su pp ort
device or system, or to affect its safety or effectiveness.
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