Datasheet DM74LS240 Datasheet

Page 1
August 1986 Revised March 2000
DM74LS240 • DM74LS241 Octal 3-STATE Buffer/Line Driver/Line Receiver
DM74LS240 • DM74LS241 Octal 3-STATE Buffer/Line Driver/Line Receiver
General Description
These buffers/line drivers are designed to improve both the performance and PC board density of 3-STATE buffers/ drivers employed as memor y-address drivers, clock driv­ers, and bus-oriented transmitters/receivers. Featuring 400 mV of hysteresis at each low current PN P data line input, they provide improved noise rejection and high fanout outputs and can be used to d rive terminated lines down to 133Ω.
Features
■ 3-STATE outputs drive bus lines directly
■ PNP inputs reduce DC loading on bus lines
■ Hysteresis at data inputs improves noise margins
■ Typical I
■ Typical I
■ Typical propagation delay times
■ Typical enable/disable time 18 ns
■ Typical power dissipation (enabled)
(sink current)
OL
24 mA
(source current)
OH
−15 mA
Inverting 10.5 ns Noninverting 12 ns
Inverting 130 mW Noninverting 135 mW
Ordering Code:
Order Number Package Number Package Description
DM74LS240W M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74LS240SJ M20D 20-Lead Small Outline Package (SOP ), EIAJ TYPE II, 5.3mm Wide DM74LS240N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide DM74LS241W M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74LS241N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering cod e.
Connection Diagrams
DM74LS240
© 2000 Fairchild Semiconductor Corporation DS006411 www.fairchildsemi.com
DM74LS241
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Function Tables
Inputs Output
G
LLH LHL
HXZ
DM74LS240 • DM74LS241
L = LOW Logic Level H = HIGH Logic Level X = Either LOW or HIGH Logic Level Z = High Impedance
DM74LS240 DM74LS241
Inputs Outputs
AY
GG
XLLXL XLHXH XHXXZ HXXL L HXXH H
LXXX Z
1A 2A 1Y 2Y
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Absolute Maximum Ratings(Note 1)
Supply Voltage 7V Input Voltage 7V Operating Free Air Temperature Range 0°C to +70°C Storage Temperature Range −65°C to +150°C
Note 1: The “Absolute M aximu m R atin gs” are t hose valu es b eyo nd w hich the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommend ed O peratin g Cond itions” t able w ill defin e the condit ions for actual device operation.
Recommended Operating Conditions
Symbol Parameter Min Nom Max Units
V
CC
V
IH
V
IL
I
OH
I
OL
T
A
Supply Voltage 4.75 5 5.25 V HIGH Level Input Voltage 2 V LOW Level In put Volta ge 0.8 V HIGH Level Output Current −15 mA LOW Level Output Current 24 mA Free Air Oper ating Temperature 0 70 °C
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min
V
I
HYS Hysteresis (VT+ − VT−)
V
OH
V
OL
I
OZH
I
OZL
I
I
I
IH
I
IL
I
OS
I
CC
Note 2: All typicals are at VCC = 5V, TA = 25°C. Note 3: Not more than one output should be shorted at a time, and the duration should not exc eed one second.
Input Clamp Voltage VCC = Min, II = −18 mA −1.5 V
Data Inputs Only HIGH Level Output Voltage VCC = Min, VIH = Min
LOW Level Output Voltage VCC = Min IOL = 12 mA 0.4
Off-State Output Current, VCC = Max HIGH Level Voltage Applied VIL = Max Off-State Output Current, VIH = Min LOW Level Voltage Applied Input Current at Maximum VCC = Max Input Voltage VI = 7V HIGH Level Input Current VCC = Max, VI = 2.7V 20 µA LOW Level Input Current VCC = Max, VI = 0.4V −0.2 mA Short Circuit Output Current VCC = Max (Note 3) −40 −225 mA Supply Current VCC = Max, Outputs HIGH 13 23
VCC = Min 0.2 0.4 V
VIL = Max, IOH = −1 mA VCC = Min, VIH = Min VIL = Max, IOH = −3 mA VCC = Min, VIH = Min VIL = 0.5V, IOH = Max
VIL = Max VIH = Min
Outputs OPEN
IOL = Max 0.5
VO = 2.7V 20 µA
VO = 0.4V −20 µA
Outputs LOW
Outputs Disabled
2.7
2.4 3.4 V
2
Typ
(Note 2)
26 44 27 46 mA 29 50 32 54
Max Units
0.1 mA
DM74LS240 • DM74LS241
V
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Page 4
Switching Characteristics
at VCC = 5V and TA = 25°C
Symbol Parameter Conditions Max Units
t
PLH
t
PHL
t
PZL
t
PZH
t
PLZ
DM74LS240 • DM74LS241
t
PHZ
t
PLH
t
PHL
t
PZL
t
PZH
Propagation Delay Time CL = 45 pF DM74LS240 14 LOW-to-HIGH Level Output RL = 667Ω DM74LS241 18 Propagation Delay Time CL = 45 pF DM74LS240 18 HIGH-to-LOW Level Output RL = 667Ω DM74LS241 18 Output Enable Time CL = 45 pF DM74LS240 30 to LOW Level RL = 667Ω DM74LS241 30 Output Enable Time CL = 45 pF DM74LS240 23 to HIGH Level RL = 667Ω DM74LS241 23 Output Disable Time CL = 5 pF DM74LS240 25 from LOW Level RL = 667Ω DM74LS241 25 Output Disable Time CL = 5 pF DM74LS240 18 from HIGH Level RL = 667Ω DM74LS241 18 Propagation Delay Time CL = 150 pF DM74LS240 18 LOW-to-HIGH Level Output RL = 667Ω DM74LS241 21 Propagation Delay Time CL = 150 pF DM74LS240 22 HIGH-to-LOW Level Output RL = 667Ω DM74LS241 22 Output Enable Time CL = 150 pF DM74LS240 33 to LOW Level RL = 667Ω DM74LS241 33 Output Enable Time CL = 150 pF DM74LS240 26 to HIGH Level RL = 667Ω DM74LS241 26
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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Page 5
Physical Dimensions inches (millimeters) unless otherwise noted
DM74LS240 • DM74LS241
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
DM74LS240 • DM74LS241
20-Lead Small Outline Package ( SOP), EIAJ TYPE II, 5.3mm Wide
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Package Description M20D
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
DM74LS240 • DM74LS241 Octal 3-STATE Buffer/Line Driver/Line Receiver
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent license s are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provide d in the labe l ing, can be re a­sonably expected to result in a significant injury to the user.
Package Number N20A
2. A critical componen t in any com ponen t of a life s upport device or system whose failu re to perform can b e rea­sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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