Datasheet DM74ALS573BWMX, DM74ALS573BWM, DM74ALS573BSJX, DM74ALS573BN Datasheet (Fairchild Semiconductor)

© 2000 Fairchild Semiconductor Corporation DS006226 www.fairchildsemi.com

April 1984
Revised February 2000

DM74ALS573B Extended Temperature Octal D-Type Transparent Latch with 3-STATE Outputs

DM74ALS573B
Extended Temperature Octal D-Type Transparent Latch

with 3-STATE Outputs

General Description

These 8-bit register s feature totem-pole 3- STATE outputs
designed specifically fo r driving highly-capacitive or rela­tively low-impedance loa ds. Th e hi gh -im ped ance state and
increased high-logic-level drive provide these registers with
the capability of being connected directly to and driving the
bus lines in a bu s-or ga nized sy stem w ith ou t n eed fo r inter­face or pull-up components. They are part icularly attractive
for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.

The eight latches of the DM74 AL S573 B are tran spa ren t D­type latches. While the enable (G) is HIGH the Q outputs
will follow the data (D) inputs. When the enable is taken
LOW the output will be latched at the level of the data that
was set UP.

A buffered output control input ca n be used to place the
eight outputs in either a normal l ogic state (HIGH or LOW
logic levels) or a high-impedance state. In the high-imped­ance state the outputs ne ither load nor dr ive the bus lines
significantly.

The output control does not affect the i nternal oper ation of
the latches. That is, the old data can be retained or new
data can be entered even while the outputs are OFF.

Features

■ Switching specifications at 50 pF

■ Switching specifications guaranteed over full tempera-

ture and V

CC

range

■ Advanced oxide-isolated, ion-implanted Schottky TTL
process

■ Functionally equivalent with DM74LS373

■ Improved AC perfo rma nce ov er DM74LS373 at app roxi -

mately half the power

■ 3-STATE buffer-type outputs drive bus lines directly

Ordering Code:

Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.

Connection Diagram

Order Number Package Number Package Description

DM74ALS573BWM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74ALS573BSJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74ALS573BN N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

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DM74ALS573B

Function Table

L = LOW State
H = HIGH State
X = Don’t Care
Z = High Impedance State
Q

0

= Previous Condit ion of Q

Logic Diagram

Output Enable D Output

Control G Q

LHHH
LHLL
LLXQ

0

HXXZ

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DM74ALS573B

Absolute Maximum Ratings(Note 1)

Note 1: The “Absolute M aximu m R atin gs” are t hose valu es b eyo nd w hich

the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommend ed O peratin g Cond itions” t able w ill defin e the condition s
for actual device operation.

Recommended Operating Conditions

Note 2: The (↓) arrow in dic ates the negative edge of the enable is used for ref erence.

Electrical Characteristics

over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C.

Supply Voltage 7V
Input Voltage 7V
Voltage Applied to Disabled Output 5.5V
OperatingFree Air Temperature Range 0°C to +70°C
Storage Temperature Range −65°C to +150°C
Typical θ

JA

N Package 56.0°C/W
M Package 75.0°C/W

Symbol Parameter Min Nom Max Units

V

CC

Supply Voltage 4.5 5 5.5 V

V

IH

HIGH Level Input Voltage 2 V

V

IL

LOW Level Input Voltage 0.8 V

I

OH

HIGH Level Output Current −2.6 mA

I

OL

LOW Level Output Current 24 mA

t

W

Width of Enable Pulse, HIGH 10 ns

t

SU

Data Setup Time (Note 2) 10↓ ns

t

H

Data Hold Time (Note 2) 7↓ ns

T

A

Free Air Operating Temperature 0 70 °C

Symbol Parameter Conditions Min Typ Max Units

V

IK

Input Clamp Voltage VCC = 4.5V, II = −18 mA −1.2 V

V

OH

HIGH Level VCC = 4.5V

IOH = Max 2.4 3.2 V

Output Voltage VIL = VIL Max

VCC = 4.5V to 5.5V IOH = −400 µAVCC − 2V

V

OL

LOW Level VCC = 4.5V IOL = 12 mA 0.25 0.4 V
Output Voltage VIH = 2V IOL = 24 mA 0.35 0.5 V

I

I

Input Current @ Maximum

VCC = 5.5V, VIH = 7V 0.1 mA

Input Voltage

I

IH

HIGH Level Input Current VCC = 5.5V, VIH = 2.7V 20 µA

I

IL

LOW Level Input Current VCC = 5.5V, VIL = 0.4V −0.1 mA

I

O

Output Drive Current VCC = 5.5V, VO = 2.25V −30 −112 mA

I

OZH

OFF-State Output Current VCC = 5.5V, VIH = 2V

20 µA

HIGH Level Voltage Applied VO = 2.7V

I

OZL

OFF-State Output Current VCC = 5.5V, VIH = 2V

−20 µA

LOW Level Voltage Applied VO = 0.4V

I

CC

Supply Current VCC = 5.5V Outputs HIGH 10 17 mA

Outputs OPEN Outputs LOW 15 24 mA

Outputs Disabled 15.5 27 mA

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DM74ALS573B

Switching Characteristics

over recommended operating free air temperature range.

Symbol Parameter Conditions From To Min Max Units

t

PLH

Propagation Delay Time VCC = 4.5V to 5.5V

Data Any Q 2 14 ns

LOW-to-HIGH Level Output RL = 500Ω

t

PHL

Propagation Delay Time CL = 50 pF

Data Any Q 2 14 ns

HIGH-to-LOW Level Output

t

PLH

Propagation Delay Time

Enable Any Q 6 20 ns

LOW-to-HIGH Level Output

t

PHL

Propagation Delay Time

Enable Any Q 6 19 ns

HIGH-to-LOW Level Output

t

PZH

Output Enable Time Output

Any Q 3 18 ns

to HIGH Level Output Control

t

PZL

Output Enable Time Output

Any Q 4 18 ns

to LOW Level Output Control

t

PHZ

Output Disable Time Output

Any Q 1 10 ns

from HIGH Level Output Control

t

PLZ

Output Disable Time Output

Any Q 1 15 ns

from LOW Level Output Control

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DM74ALS573B

Physical Dimensions inches (millimeters) unless otherwise noted

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

Package Number M20B

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DM74ALS573B

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M20D

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DM74ALS573B Extended Temperature Octal D-Type Transparent Latch with 3-STATE Outputs

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Package Number N20A

Fairchild does not assume any responsibility for use of any circu itry described, no circuit patent license s are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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