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© 2000 Fairchild Semiconductor Corporation DS006114 www.fairchildsemi.com
September 1986
Revised April 2000
DM74ALS520 • DM74ALS521 8-Bit Comparator
DM74ALS520 • DM74ALS521
8-Bit Comparator
General Description
These comparators perf orm an “equal to” comparison of
two 8-bit words with provision for expansion or external
enabling. The matc hing of the two 8-bit input plus a logic
LOW on the EN
input produces t he output A = B on the
DM74ALS520 and DM74ALS521. The DM74ALS520 and
DM74ALS521 have totem pole outputs for wire AND cascading. Additionally, the DM74ALS520 is provided with B
input pull up termination resistors for analog or switch data.
Features
■ Switching specifications at 50 pF
■ Switching specifications guaranteed over full tempera-
ture and V
CC
range
■ Advanced oxide-isolated, ion-implanted Schottky TTL
process
■ Functionally and pin for pin compatible with LS family
counterpart
■ Improved output transient handling capability
Ordering Code:
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.
Connection Diagram Function Table
H = HIGH Logic Level
L = LOW Logic Level
X = Don't Care
Ordering Code Package Number Package Description
DM74ALS520WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74ALS520N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DM74ALS521WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
SM74ALS521N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs Output
EN
Data A = B
LA = BL
LA ≠ BH
HXH
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DM74ALS520 • DM74ALS521
Logic Diagram
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DM74ALS520 • DM74ALS521
Absolute Maximum Ratings(Note 1)
Note 1: The “Absolute Maximum Ratings” are those value s beyond which
the safety of the dev ice cannot b e guaranteed . The device sh ould not be
operated at these limit s. The parametric values defi ned in the Electrical
Characteristics tables are not gu aranteed at the absolute m ax i m um ratings.
The “Recomm ended O peratin g Cond itions ” table will defin e the condition s
for actual device operation.
Recommended Operating Conditions
Electrical Characteristics
over recommended operating free air temperature range. All typical values are measured at V
CC
= 5V, T
A
= 25°C.
Note 2: ICC is measured with EN groun ded, A and B inputs at 4.5V and outputs OPEN .
Switching Characteristics
over recommended operating free air temperature range
Supply Voltage 7V
Input Voltage 7V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature Range −65°C to +150°C
Typical θ
JA
N Package 62.0°C/W
M Package 82.0°C/W
Symbol Parameter Min Nom Max Units
V
CC
Supply Voltage 4.5 5 5.5 V
V
IH
HIGH Level Input Voltage 2 V
V
IL
LOW Level Input Voltage 0.8 V
I
OH
HIGH Level Output Current −2.6 mA
I
OL
LOW Level Output Current 24 mA
T
A
Free Air Operating T emperature 0 70 °C
Symbol Parameter Conditions Min Typ Max Units
V
IK
Input Clamp Voltage VCC = 4.5V, II = −18 mA −1.5 V
V
OH
HIGH Level VCC = 4.5V to 5.5V
V
CC
− 2V
Output Voltage I
OH
= −400 µA
V
CC
= 4.5V
2.4 3.2 V
I
OH
= Max
V
OL
LOW Level Output Voltage VCC = 4.5V IOL = 24 mA 0.35 0.5 V
I
I
Max HIGH VCC = 5.5V VIH = 5.5V
Input Current B Input DM74ALS520 0.1 mA
V
IH
= 7V, All Others
I
IH
HIGH Level VCC = 5.5V, All Others 20
µA
Input Current V
IH
= 2.7V B Input DM74ALS520 −200
I
IL
Low Level Input VCC = 5.5V, B Input DM74ALS520 −0.6 mA
Current V
IL
= 0.4V All Others −0.1 mA
I
O
Output Drive Current VCC = 5.5V VO = 2.25V −30 −112 mA
I
CC
Supply Current VCC = 5.5V (Note 2) 12 19 mA
Symbol Parameter Conditions
From To
Min Max Units
Input Output
t
PLH
Propagation Delay Time VCC = 4.5V to 5.5V A or B
A = B 312ns
LOW-to-HIGH Level Output CL = 50 pF Data
t
PHL
Propagation Delay Time RL = 500Ω A or B
A = B 520ns
HIGH-to-LOW Level Output Data
t
PLH
Propagation Delay Time
EN A = B 212ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
EN A = B 522ns
HIGH-to-LOW Level Output
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DM74ALS520 • DM74ALS521
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
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DM74ALS520 • DM74ALS521 8-Bit Comparator
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described , no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are dev ic es or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provide d in the labe l ing, can be re asonably expected to result in a significant injury to the
user.
2. A critical compo nent in any com ponen t of a life s upp ort
device or system whose failure to perform can be reasonably expected to cause the failure of the l ife support
device or system, or to affect its safety or effectiveness.
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