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DM7403
Quad 2-Input NAND Gates with Open-Collector Outputs
DM7403 Quad 2-Input NAND Gates with Open-Collector Outputs
August 1986
Revised February 2000
General Description
This device contains four independent gates each of which
performs the logic N AND functio n. The open -collector outputs require external pull-up resistors for proper logical
operation.
Pull-Up Resistor Equations
Where: N1 (IOH) = total maximum output high c urrent
N
for all outputs tied to pull-up resistor
(IIH) = total maximum input high current for
2
all inputs tied to pull-up resistor
(IIL) = total maximum input low current for
N
3
all inputs tied to pull-up resistor
Ordering Code:
Order Number Package Number Package Description
DM7403N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram Function Table
Y = AB
Inputs Output
ABY
LLH
LHH
HLH
HHL
H = HIGH Logic Level
L = LOW Logic Level
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Absolute Maximum Ratings(Note 1)
Supply Voltage 7V
DM7403
Input Voltage 5.5V
Output Voltage 7V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature Range −65°C to +150°C
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the dev ice cannot be guaranteed. T he device sh ould not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommend ed O peratin g Cond itions” t able w ill defin e the c ondit ions
for actual device operation.
Recommended Operating Conditions
Symbol Parameter Min Nom Max Units
V
CC
V
IH
V
IL
V
OH
I
OL
T
A
Supply Voltage 4.75 5 5.25 V
HIGH Level Input Voltage 2 V
LOW Level Input Voltage 0.8 V
HIGH Level Output Voltage 5.5 V
LOW Level Ou tput Current 16 mA
Free Air Operating Temperature 0 70 °C
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min
V
I
I
CEX
V
OL
I
I
I
IH
I
IL
I
CCH
I
CCL
Note 2: All typicals are at VCC = 5V, TA = 25°C.
Input Clamp Voltage VCC = Min, II = −12 mA −1.5 V
HIGH Level VCC = Min, VO = 5.5V
Output Current VIL = Max
LOW Level VCC = Min, IOL = Max
Output Voltage VIH = Min
Input Current @ Max Input Voltage VCC = Max, VI = 5.5V 1 mA
HIGH Level Input Current VCC = Max, VI = 2.4V 40 µA
LOW Level Input Current VCC = Max, VI = 0.4V −1.6 mA
Supply Current with Outputs HIGH VCC = Max 4 8 mA
Supply Current with Outputs LOW VCC = Max 12 22 mA
Typ
(Note 2)
0.2 0.4 V
Max Units
250 µA
Switching Characteristics
at VCC = 5V and TA = 25°C
Symbol Parameter Co nditions Min Max Units
t
PLH
t
PHL
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Propagation Delay Time CL = 15 pF
LOW-to-HIGH Level Output RL = 4 kΩ (t
Propagation Delay Time RL = 400Ω (t
HIGH-to-LOW Level Output
PLH
PHL
)
)
45 ns
15 ns

Physical Dimensions inches (millimeters) unless otherwise noted
DM7403 Quad 2-Input NAND Gates with Open-Collector Outputs
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent license s are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provide d in the labe l ing, can be re asonably expected to result in a significant injury to the
user.
Package Number N14A
2. A critical componen t in any com ponen t of a life s upport
device or system whose failu re to perform can b e reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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