
TTL-INTERFACED, GATED
DELAY LINE OSCILLATOR
(SERIES DLO31F)
delay
devices,
FEATURES PACKAGES
C1
• Continuous or keyable wave train
1
• Synchronizes with arbitrary gating signal
• Fits standard 14-pin DIP socket
• Low profile
• Auto-insertable
• Input & outputs fully TTL interfaced & buffered
• Available in frequencies from 2MHz to 40MHz
GND
7
DLO31F-xx DIP
DLO31F-xxA2 Gull-Wing
DLO31F-xxB2 J-Lead
DLO31F-xxM Military DIP
FUNCTIONAL DESCRIPTION
The DLO31F-series device is a gated delay line oscillator. The device
produces a stable square wave which is synchronized with the falling edge
of the Gate Input (GB). The frequency of oscillation is given by the device
dash number (See Table). The two outputs (C1,C2) are in phase during
oscillation, but return to opposite logic levels when the device is disabled.
VCC
14
C2
10
GB
8
N/C
N/C
N/C
N/C
N/C
GND
PIN DESCRIPTIONS
GB Gate Input
C1 Clock Output 1
C2 Clock Output 2
VCC +5 Volts
GND Ground
inc.
2
13
3
12
4
11
5
10
6
9
7
8
Military SMD
DLO31F-xxMD1
DLO31F-xxMD4
N/C
N/C
N/C
C2
N/C
GB
SERIES SPECIFICATIONS
• Frequency accuracy: 2%
• Inherent delay (TE0): 5.5ns typical
• Output skew: 3.5ns typical
• Output rise/fall time: 2ns typical
• Supply voltage: 5VDC ± 5%
• Supply current: 40ma typical (7ma when disabled)
• Operating temperature: 0° to 70° C
• Temperature coefficient: 100 PPM/°C (See text)
GATE
(GB)
CLOCK 1
(C1)
CLOCK 2
(C2)
1998 Data Delay Devices
t
EO
1/f
0
Figure 1: Timing Diagram
t
GR
t
CS
DASH NUMBER
SPECIFICATIONS
Part
Number
DLO31F-2
DLO31F-2.5
DLO31F-3
DLO31F-3.5
DLO31F-4
DLO31F-4.5
DLO31F-5
DLO31F-5.5
DLO31F-6
DLO31F-7
DLO31F-8
t
DO
DLO31F-9
DLO31F-10
DLO31F-12
DLO31F-14
DLO31F-15
DLO31F-20
DLO31F-25
DLO31F-30
DLO31F-35
DLO31F-40
NOTE: Any dash number
between 2 and 40 not shown
Frequency
(MHz)
2.0 ± 0.04
2.5 ± 0.05
3.0 ± 0.06
3.5 ± 0.07
4.0 ± 0.08
4.5 ± 0.09
5.0 ± 0.10
5.5 ± 0.11
6.0 ± 0.12
7.0 ± 0.14
8.0 ± 0.16
9.0 ± 0.18
10 ± 0.20
12 ± 0.24
14 ± 0.28
15 ± 0.30
20 ± 0.40
25 ± 0.50
30 ± 0.60
35 ± 0.70
40 ± 0.80
Doc #98001 DATA DELAY DEVICES, INC. 1
3/17/98 3 Mt. Prospect Ave. Clifton, NJ 07013

APPLICATION NOTES
THERMAL STABILITY
The delay line used internally to develop the clock
signals in the DLO31F has a thermal coefficient
of 100ppm/C. For low frequency units, this is also
the thermal coefficient of the output frequency.
For higher frequency units, however, other
internal effects must be considered, and the
actual thermal coefficient may be somewhat
higher.
DEVICE SPECIFICATIONS
TABLE 1: ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL MIN MAX UNITS NOTES
DC Supply Voltage V
Input Pin Voltage V
Storage Temperature T
Lead Temperature T
TABLE 2: DC ELECTRICAL CHARACTERISTICS
CC
IN
STRG
LEAD
(0C to 70C, 4.75V to 5.25V)
POWER SUPPLY BYPASSING
The DLO31F relies on a stable power supply to
produce a repeatable frequency within the stated
tolerances. A 0.1uf capacitor from VCC to GND,
located as close as possible to the VCC pin, is
recommended. A wide VCC trace and a clean
ground plane should be used.
-0.3 7.0 V
-0.3 VDD+0.3 V
-55 150 C
300 C 10 sec
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
High Level Output Voltage V
OH
2.5 3.4 V VCC = MIN, IOH = MAX
VIH = MIN, VIL = MAX
Low Level Output Voltage V
OL
0.35 0.5 V VCC = MIN, IOL = MAX
VIH = MIN, VIL = MAX
High Level Output Current I
Low Level Output Current I
High Level Input Voltage V
Low Level Input Voltage V
Input Clamp Voltage V
Input Current at Maximum
I
OH
OL
IHH
IH
IL
IK
2.0 V
-1.0 mA
20.0 mA
0.8 V
-1.2 V VCC = MIN, II = I
0.1 mA VCC = MAX, VI = 7.0V
Input Voltage
High Level Input Current I
Low Level Input Current I
Short-circuit Output Current I
OS
IH
IL
-60 -150 mA VCC = MAX
20
µA
VCC = MAX, VI = 2.7V
-0.6 mA VCC = MAX, VI = 0.5V
Output High Fan-out 25 Unit
Output Low Fan-out 12.5 Load
TABLE 3: AC ELECTRICAL CHARACTERISTICS
(0C to 70C, 4.75V to 5.25V)
PARAMETER SYMBOL MIN TYP MAX UNITS
Enable to Clock On (Inherent Delay) t
Disable to Clock Off t
Clock Skew t
Gate Recovery Time t
EO
DO
CS
GR
3.5 5.5 7.0 ns
3.5 5.5 7.0 ns
2.5 3.5 4.5 ns
50 % of Clock Period
IK
Doc #98001 DATA DELAY DEVICES, INC. 2
3/17/98 Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com

DLO31F-xx (Commercial DIP)
1 7
DLO31F-xxM (Military DIP)
.780 MAX.
PACKAGE DIMENSIONS
814 10
Lead Material:
Nickel-Iron alloy 42
TIN PLATE
.280
MAX.
1 7
.820 MAX.
814 10
.410
TYP.
.290
MAX.
.018
TYP.
.020 TYP.
1 7
.090
.600±.010
.600
.790 MAX.
.015 TYP.
.070 MAX.
.040
TYP.
81014
.270
TYP.
.010±.002
.350
MAX.
.010 TYP.
.300
MAX.
DLO31F-xxA2 (Commercial Gull-Wing)
.430
TYP.
.050
TYP.
.320
.020
MAX.
TYP.
.130
.030
.018 TYP.
.600 TYP.
.020 TYP.
1 7
.200.110
.600
.790 MAX.
.200
TYP.
1014
±
.040
TYP.
8
.270
TYP.
.020 TYP.
.300
TYP.
.050 TYP.
.350
MAX.
DLO31F-xxB2 (Commercial J-Lead)
.320
TYP.
.110
TYP.
.100
.300
TYP.
.100
.200 MAX. (Com)
.225 MAX. (Mil)
.065
TYP.
DLO31F-xxD1 (Commercial SMD)
DLO31F-xxMD1 (Military SMD)
Doc #98001 DATA DELAY DEVICES, INC. 3
3/17/98 3 Mt. Prospect Ave. Clifton, NJ 07013
1
7 8
.510 MAX.
.360
TYP.
.650
14
.017
.510
MAX.
.050
.300.300
.065
.025
.008
.045
.200 MAX. (Com)
.225 MAX. (Mil)
TYP.
.100
1
14
.300
TYP.
7 8
.100
.080 .080
.005
.065 TYP.
.510 MAX.
.360 TYP.
.065 TYP.
.017
.510
MAX.
.050
.008
DLO31F-xxD4 (Commercial SMD)
DLO31F-xxMD4 (Military SMD)

DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT: OUTPUT:
Ambient Temperature: 25oC ± 3oC Load: 1 FAST-TTL Gate
Supply Voltage (Vcc): 5.0V ± 0.1V C
Input Pulse: High = 3.0V ± 0.1V Threshold: 1.5V (Rising & Falling)
Low = 0.0V ± 0.1V
Source Impedance: 50Ω Max.
Rise/Fall Time: 3.0 ns Max. (measured
between 0.6V and 2.4V )
Pulse Width Low: PWIN = 10 x Clock Period
Period: PERIN = 20 x Clock Period
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
: 5pf ± 10%
load
FREQUENCY
COUNTER
PULSE
GENERATOR
INPUT
SIGNAL
OUTPUT
SIGNAL
GB
TRIG
T
FALL
1.5V 1.5V
0.6V 0.6V
T
DEVICE UNDER
PW
V
EO
TEST (DUT)
IN
IL
C1OUT
C2
Test Setup
PER
2.4V2.4V
V
OH
IN
V
IH
OSCILLOSCOPE
V
OL
TRIG
IN
T
RISE
1.5V1.5V
Timing Diagram For Testing
Doc #98001 DATA DELAY DEVICES, INC. 4
3/17/98 Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com