Datasheet DDU7F-50MC3, DDU7F-50M, DDU7F-50B2, DDU7F-50A2, DDU7F-500MC3 Datasheet (DADD)

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Page 1
DDU7F
Doc #97016 DATA DELAY DEVICES, INC. 1
1/29/97 3 Mt. Prospect Ave. Clifton, NJ 07013
10-TAP, TTL-INTERFACED FIXED DELAY LINE (SERIES DDU7F)
FEATURES PACKAGES
Fits standard 14-pin DIP socket
Low profile
Auto-insertable
Input & outputs fully TTL interfaced & buffered
10 T2L fan-out capability
FUNCTIONAL DESCRIPTION
The DDU7F-series device is a 10-tap digitally buffered delay line. The signal input (IN) is reproduced at the outputs (T1-T10), shifted in time by an amount determined by the device dash number. The nominal tap-to-tap delay increment is given by 1/10 of the dash number. For dash numbers less than 50, the total delay of the line is measured from T1 to T10, with the nominal value given by 9 times the increment. The inherent delay from IN to T1 is nominally 3.5ns. For dash numbers greater than or equal to 50, the total delay of the line is measured from IN to T10, with the nominal value given by the dash number.
SERIES SPECIFICATIONS
Minimum input pulse width: 20% of total delay
Output rise time: 2ns typical
Supply voltage: 5VDC ± 5%
Supply current: I
CCL
= 50ma typical
I
CCH
= 15ma typical
Operating temperature: 0° to 70° C
Temp. coefficient of total delay: 100 PPM/°C
10% 10% 10% 10%
VCC GNDIN T1 T2 T3 T4 T10
Functional diagram for dash numbers < 50
3.5ns 10% 10% 10% 10%
T5 T6 T7 T8
10%
T9
10% 10% 10% 10%
VCC GNDIN T1 T2 T3 T4 T10
Functional diagram for dash numbers >= 50
10% 10% 10% 10%
T5 T6 T7 T8
10%
T9
10%
1997 Data Delay Devices
data
delay devices, inc.
3
1
2 3 4 5 6 7 8
16
15 14 13 12 11 10
9
IN
T2 T4 T6
T8 T10 N/C
GND
VCC
T1 T3 T5 T7 T9 N/C N/C
14 13 12 11 10
9 8
1 2 3 4 5 6 7
IN
N/C
T2 T4 T6 T8
GND
VCC T1 T3 T5 T7 T9 T10
DDU7F-xx DIP DDU7F-xxA2 Gull-Wing DDU7F-xxB2 J-Lead DDU7F-xxM Military DIP
Military SMD DDU7F-xxMC3
PIN DESCRIPTIONS
IN Signal Input T1-T10 Tap Outputs VCC +5 Volts GND Ground
DASH NUMBER SPEC.’S
Part
Number
Total
Delay (ns)
Delay Per
Tap (ns)
DDU7F-10
9 ± 2.0 * 1.0 ± 0.5
DDU7F-20
18 ± 2.0 * 2.0 ± 1.0
DDU7F-25
22.5 ± 2.0 * 2.5 ± 1.0
DDU7F-50
50 ± 2.5 5.0 ± 2.0
DDU7F-100
100 ± 5.0 10.0 ± 3.0
DDU7F-150
150 ± 7.5 15.0 ± 3.0
DDU7F-200
200 ± 10.0 20.0 ± 3.0
DDU7F-250
250 ± 12.5 25.0 ± 3.0
DDU7F-300
300 ± 15.0 30.0 ± 3.0
DDU7F-400
400 ± 20.0 40.0 ± 4.0
DDU7F-500
500 ± 25.0 50.0 ± 5.0
* Total delay is referenced to first tap Input to first tap = 3.5ns ±± 1ns
NOTE: Any dash number between 10 and
500 not shown is also available.
Page 2
DDU7F
Doc #97016 DATA DELAY DEVICES, INC. 2
1/29/97 Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
APPLICATION NOTES
HIGH FREQUENCY RESPONSE
The DDU7F tolerances are guaranteed for input pulse widths and periods greater than those specified in the test conditions. Although the device will function properly for pulse widths as small as 20% of the total delay and periods as small as 40% of the total delay (for a symmetric input), the delays may deviate from their values at low frequency. However, for a given input condition, the deviation will be repeatable from pulse to pulse. Contact technical support at Data
Delay Devices if your application requires device testing at a specific input condition.
POWER SUPPLY BYPASSING
The DDU7F relies on a stable power supply to produce repeatable delays within the stated tolerances. A 0.1uf capacitor from VCC to GND, located as close as possible to the VCC pin, is recommended. A wide VCC trace and a clean ground plane should be used.
DEVICE SPECIFICATIONS
TABLE 1: ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL MIN MAX UNITS NOTES
DC Supply Voltage V
CC
-0.3 7.0 V
Input Pin Voltage V
IN
-0.3 VCC+0.3 V
Storage Temperature T
STRG
-55 150 C
Lead Temperature T
LEAD
300 C 10 sec
TABLE 2: DC ELECTRICAL CHARACTERISTICS
(0C to 70C, 4.75V to 5.25V)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
High Level Output Voltage V
OH
2.5 3.4 V VCC = MIN, IOH = MAX VIH = MIN, VIL = MAX
Low Level Output Voltage V
OL
0.35 0.5 V VCC = MIN, IOL = MAX VIH = MIN, VIL = MAX
High Level Output Current I
OH
-1.0 mA
Low Level Output Current I
OL
20.0 mA
High Level Input Voltage V
IH
2.0 V
Low Level Input Voltage V
IL
0.8 V
Input Clamp Voltage V
IK
-1.2 V VCC = MIN, II = I
IK
Input Current at Maximum Input Voltage
I
IHH
0.1 mA VCC = MAX, VI = 7.0V
High Level Input Current I
IH
20
µA
VCC = MAX, VI = 2.7V
Low Level Input Current I
IL
-0.6 mA VCC = MAX, VI = 0.5V
Short-circuit Output Current I
OS
-60 -150 mA VCC = MAX Output High Fan-out 25 Unit Output Low Fan-out 12.5 Load
Page 3
DDU7F
Doc #97016 DATA DELAY DEVICES, INC. 3
1/29/97 3 Mt. Prospect Ave. Clifton, NJ 07013
PACKAGE DIMENSIONS
DDU7F-xx (Commercial DIP)
.780 MAX.
1 2 3 4 5 6 7
814 13 12 11 10 9
.290 MAX.
.015 TYP.
.070 MAX.
.018 TYP.
.600±.010
6 Equal spaces
each .100±.010
Non-Accumulative
.280 MAX.
.350 MAX.
.010±.002
Lead Material: Nickel-Iron alloy 42 TIN PLATE
DDU7F-xxM (Military DIP)
.195
±.010
.830 MAX.
1 2 3 4 5 6 7
8
.290
MAX.
.020 TYP.
.440 MAX.
.300 TYP.
.010 TYP.
.600 TYP.
.030
±.005
91011121314
DDU7F-xxA2 (Commercial Gull-Wing)
.790 MAX.
.430 TYP.
.020 TYP.
.040 TYP.
.100
.090
.600
.300 MAX.
.270 TYP.
.010 TYP.
.050
TYP.
1 2 3 4 5 6 7
891011121314
DDU7F-xxB2 (Commercial J-Lead)
.790 MAX.
1 2 3 4 5 6 7
8
.320 TYP.
.020 TYP.
.040 TYP.
.100
.110
.600
.350 MAX.
.270 TYP.
.050 TYP.
.110
TYP.
91011121314
.880±.020
.882
±
.005
.020 TYP.
.040 TYP.
.100
.090
.700
.280 MAX.
.590
MAX.
.010±.002
.050
±.010
.710
±
.005
.007
±
.005
1 2 3 4 5 6 7 8
910111213141516
DDU7F-xxMC3 (Military Gull-Wing)
Page 4
DDU7F
Doc #97016 DATA DELAY DEVICES, INC. 4
1/29/97 Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT: OUTPUT: Ambient Temperature: 25oC ± 3oC Load: 1 FAST-TTL Gate Supply Voltage (Vcc): 5.0V ± 0.1V C
load
: 5pf ± 10%
Input Pulse: High = 3.0V ± 0.1V Threshold: 1.5V (Rising & Falling)
Low = 0.0V ± 0.1V
Source Impedance: 50 Max. Rise/Fall Time: 3.0 ns Max. (measured
between 0.6V and 2.4V )
Pulse Width: PWIN = 1.5 x Total Delay Period: PERIN = 10 x Total Delay
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
T1
OUT
TRIGINREF
TRIG
Test Setup
DEVICE UNDER
TEST (DUT)
TIME INTERVAL
COUNTER
PULSE
GENERATOR
COMPUTER
SYSTEM
PRINTER
INT2T3T4T5T6T7T8T9
T10
Timing Diagram For Testing
T
RISE
T
FALL
PER
IN
PW
IN
T
RISE
T
FALL
0.6V
0.6V
1.5V
1.5V
2.4V
2.4V
1.5V
1.5V
V
IH
V
IL
V
OH
V
OL
INPUT SIGNAL
OUTPUT SIGNAL
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