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5-TAP, HCMOS-INTERFACED
FIXED DELAY LINE
(SERIES DDU4C)
delay
devices,
FEATURES PACKAGES
IN
• Five equally spaced outputs
1
• Fits standard 8-pin DIP socket
• Low profile
T2
4
• Auto-insertable
T4
• Input & outputs fully CMOS interfaced & buffered
• 10 T2L fan-out capability
DDU4C-xx Comm.
DDU4C-xxM Military
GND
6
7
DIP
FUNCTIONAL DESCRIPTION
The DDU4C-series device is a 5-tap digitally buffered delay line. The
signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an
amount determined by the device dash number (See Table). The total
delay of the line is measured from IN to T5. The nominal tap-to-tap delay
increment is given by one-fifth of the total delay.
VCC
14
T1
12
T3
10
T5
8
N/C
N/C
T2
N/C
T4
GND
DDU4C-xxA2 Comm.
DDU4C-xxB2 Comm.
DDU4C-xxMC2 Military
PIN DESCRIPTIONS
IN Signal Input
T1-T5 Tap Outputs
VDD +5 Volts
GND Ground
2
3
4
5
6
7
SMD
inc.
13
12
11
10
9
8
N/C
T1
N/C
T3
N/C
T5
SERIES SPECIFICATIONS
• Minimum input pulse width: 20% of total delay
• Output rise time: 8ns typical
• Supply voltage: 5VDC ± 5%
• Supply current: I
I
= 40µa typical
CCL
= 10ma typical
CCH
• Operating temperature: 0° to 70° C
• Temp. coefficient of total delay: 300 PPM/°C
20% 20% 20% 20% 20%
VDD GNDIN T1 T2 T3 T4 T5
DDU4C Functional diagram
DASH NUMBER SPECIFICATIONS
Part
Number
DDU4C-5050
DDU4C-5060
DDU4C-5075
DDU4C-5100
DDU4C-5125
DDU4C-5150
DDU4C-5200
DDU4C-5250
DDU4C-5300
DDU4C-5400
DDU4C-5500
NOTE: Any dash number between 5050 and 5500
not shown is also available.
Total
Delay (ns)
50 ± 2.5 10.0 ± 3.0
60 ± 3.0 12.0 ± 3.0
75 ± 4.0 15.0 ± 3.0
100 ± 5.0 20.0 ± 3.0
125 ± 6.5 25.0 ± 3.0
150 ± 7.5 30.0 ± 3.0
200 ± 10.0 40.0 ± 4.0
250 ± 12.5 50.0 ± 5.0
300 ± 15.0 60.0 ± 6.0
400 ± 20.0 80.0 ± 8.0
500 ± 25.0 100.0 ± 10.0
Delay Per
Tap (ns)
1997 Data Delay Devices
Doc #97034 DATA DELAY DEVICES, INC. 1
12/10/97 3 Mt. Prospect Ave. Clifton, NJ 07013

APPLICATION NOTES
HIGH FREQUENCY RESPONSE
The DDU4C tolerances are guaranteed for input
pulse widths and periods greater than those
specified in the test conditions. Although the
device will function properly for pulse widths as
small as 20% of the total delay and periods as
small as 40% of the total delay (for a symmetric
input), the delays may deviate from their values at
low frequency. However, for a given input
condition, the deviation will be repeatable from
pulse to pulse. Contact technical support at Data
DEVICE SPECIFICATIONS
TABLE 1: ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL MIN MAX UNITS NOTES
DC Supply Voltage V
Input Pin Voltage V
Storage Temperature T
Lead Temperature T
DD
IN
STRG
LEAD
Delay Devices if your application requires device
testing at a specific input condition.
POWER SUPPLY BYPASSING
The DDU4C relies on a stable power supply to
produce repeatable delays within the stated
tolerances. A 0.1uf capacitor from VDD to GND,
located as close as possible to the VDD pin, is
recommended. A wide VDD trace and a clean
ground plane should be used.
-0.3 7.0 V
-0.3 VDD+0.3 V
-55 150 C
300 C 10 sec
TABLE 2: DC ELECTRICAL CHARACTERISTICS
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
High Level Output Voltage V
Low Level Output Voltage V
High Level Output Current I
Low Level Output Current I
High Level Input Voltage V
Low Level Input Voltage V
Input Current I
(0C to 70C, 4.75V to 5.25V)
OH
OL
OH
OL
IH
IL
IH
3.98 4.4 V VDD = 5.0, IOH = MAX
0.15 0.26 V VDD = 5.0, IOL = MAX
3.15 V
-4.0 mA
4.0 mA
1.35 V
0.10
µA
VIH = MIN, VIL = MAX
VIH = MIN, VIL = MAX
VDD = 5.0
Doc #97034 DATA DELAY DEVICES, INC. 2
12/10/97 Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com

DDU4C-xx (Commercial DIP)
1 4 6 7
DDU4C-xxMC2 (Military SMD)
.780 MAX.
PACKAGE DIMENSIONS
814 12 10
Lead Material:
Nickel-Iron alloy 42
TIN PLATE
.280
MAX.
1 4 6 7
.820 MAX.
814 12 10
.410
TYP.
.290
MAX.
.018
TYP.
1 2 3 4 5 6 7
.600±.010
.020 TYP. .040
.600
.790 MAX.
.015 TYP.
.070 MAX.
TYP.
891011121314
.270
TYP.
.100.090
.010±.002
.010 TYP.
.300
MAX.
DDU4C-xxA2 (Commercial Gull-Wing)
.350
MAX.
.430
TYP.
.050
TYP.
.320
.020
MAX.
TYP.
.130
.030
.018 TYP.
.600 TYP.
.020 TYP.
1 2 3 4 5 6 7
.600
.790 MAX.
.100
TYP.
91011121314
.100.110
±
.040
TYP.
8
.270
TYP.
.020 TYP.
.300
TYP.
.050 TYP.
.350
MAX.
DDU4C-xxB2 (Commercial J-Lead)
.320
TYP.
.110
TYP.
.020 TYP. .040
TYP.
8
91011121314
.007
.005
±
±
.050
.010
±
.882
.005
1 2 3 4 5 6 7
.100.090
.600
.710
.005
±
.590
MAX.
.320
MAX.
Doc #97034 DATA DELAY DEVICES, INC. 3
12/10/97 3 Mt. Prospect Ave. Clifton, NJ 07013

DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT: OUTPUT:
Ambient Temperature: 25oC ± 3oC Load: 1 FAST-TTL Gate
Supply Voltage (VDD): 5.0V ± 0.1V C
Input Pulse: High = 5.0V ± 0.1V Threshold: 2.5V (Rising & Falling)
Low = 0.0V ± 0.1V
Source Impedance: 50Ω Max.
Rise/Fall Time: 5.0 ns Max. (measured
between 0.5V and 4.5V )
Pulse Width: PWIN = 1.5 x Total Delay
Period: PERIN = 10 x Total Delay
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
: 5pf ± 10%
load
PULSE
GENERATOR
TRIG
T
RISE
IN
DEVICE UNDER
PW
IN
COMPUTER
SYSTEM
TEST (DUT)
Test Setup
PER
PRINTER
REF
T1OUT
T2
T3
T4
T5
IN
T
FALL
IN
TRIG
TIME INTERVAL
COUNTER
RISE
V
IH
2.5V2.5V
0.5V0.5V
V
OH
T
FALL
V
IL
2.5V2.5V
V
OL
INPUT
SIGNAL
OUTPUT
SIGNAL
4.5V 4.5V
T
Timing Diagram For Testing
Doc #97034 DATA DELAY DEVICES, INC. 4
12/10/97 Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com