Datasheet DAC0800LCM, DAC0800LCJ, DAC-08Q, DAC-08HQ, DAC-08HP Datasheet (NSC)

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Page 1
TL/H/5686
DAC0800/DAC0801/DAC0802 8-Bit Digital-to-Analog Converters
January 1995
DAC0800/DAC0801/DAC0802 8-Bit Digital-to-Analog Converters
General Description
The DAC0800 series are monolithic 8-bit high-speed cur­rent-output digital-to-analog converters (DAC) featuring typi­cal settling times of 100 ns. When used as a multiplying DAC, monotonic performance over a 40 to 1 reference cur­rent range is possible. The DAC0800 series also features high compliance complementary current outputs to allow differential output voltages of 20 Vp-p with simple resistor loads as shown in
Figure 1
. The reference-to-full-scale cur-
rent matching of better than
g
1 LSB eliminates the need for full-scale trims in most applications while the nonlinearities of better than
g
0.1% over temperature minimizes system
error accumulations.
The noise immune inputs of the DAC0800 series will accept TTL levels with the logic threshold pin, V
LC
, grounded.
Changing the V
LC
potential will allow direct interface to oth­er logic families. The performance and characteristics of the device are essentially unchanged over the full
g
4.5V to
g
18V power supply range; power dissipation is only 33 mW
with
g
5V supplies and is independent of the logic input
states.
The DAC0800, DAC0802, DAC0800C, DAC0801C and DAC0802C are a direct replacement for the DAC-08, DAC­08A, DAC-08C, DAC-08E and DAC-08H, respectively.
Features
Y
Fast settling output current 100 ns
Y
Full scale error
g
1 LSB
Y
Nonlinearity over temperature
g
0.1%
Y
Full scale current drift
g
10 ppm/§C
Y
High output compliance
b
10V toa18V
Y
Complementary current outputs
Y
Interface directly with TTL, CMOS, PMOS and others
Y
2 quadrant wide range multiplying capability
Y
Wide power supply range
g
4.5V tog18V
Y
Low power consumption 33 mW atg5V
Y
Low cost
Typical Applications
TL/H/5686– 1
FIGURE 1.g20 V
P-P
Output Digital-to-Analog Converter (Note 4)
Ordering Information
Non-Linearity
Temperature Order Numbers
Range
J Package (J16A)* N Package (N16A)* SO Package (M16A)
g
0.1% FS 0§CsT
A
s
a
70§C DAC0802LCJ DAC-08HQ DAC0802LCN DAC-08HP DAC0802LCM
g
0.19% FSb55§CsT
A
s
a
125§C DAC0800LJ DAC-08Q
g
0.19% FS 0§CsT
A
s
a
70§C DAC0800LCJ DAC-08EQ DAC0800LCN DAC-08EP DAC0800LCM
g
0.39% FS 0§CsT
A
s
a
70§C DAC0801LCN DAC-08CP DAC0801LCM
*Devices may be ordered by using either order number.
C
1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.
Page 2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Supply Voltage (V
a
b
Vb)
g
18V or 36V Power Dissipation (Note 2) 500 mW Reference Input Differential Voltage
(V14 to V15) V
b
to V
a
Reference Input Common-Mode Range
(V14, V15) V
b
to V
a
Reference Input Current 5 mA Logic Inputs V
b
to Vbplus 36V
Analog Current Outputs (V
S
b
eb
15V) 4.25 mA ESD Susceptibility (Note 3) TBD V Storage Temperature
b
65§Ctoa150§C
Lead Temp. (Soldering, 10 seconds)
Dual-In-Line Package (plastic) 260
§
C
Dual-In-Line Package (ceramic) 300
§
C
Surface Mount Package
Vapor Phase (60 seconds) 215
§
C
Infrared (15 seconds) 220
§
C
Operating Conditions (Note 1)
Min Max Units
Temperature (T
A
)
DAC0800L
b
55
a
125
§
C
DAC0800LC 0
a
70
§
C
DAC0801LC 0
a
70
§
C
DAC0802LC 0
a
70
§
C
Electrical Characteristics The following specifications apply for V
S
e
g
15V, I
REF
e
2 mA and T
MIN
s
T
A
s
T
MAX
unless otherwise specified. Output characteristics refer to both I
OUT
and I
OUT
.
DAC0802LC
DAC0800L/
DAC0801LC
Symbol Parameter Conditions DAC0800LC Units
Min Typ Max Min Typ Max Min Typ Max
Resolution 8 8 8 8 8 8 8 8 8 Bits Monotonicity 8 8 8 8 8 8 8 8 8 Bits Nonlinearity
g
0.1
g
0.19
g
0.39 %FS
t
s
Settling Time Tog(/2 LSB, All Bits Switched 100 135 100 150 ns
‘‘ON’’ or ‘‘OFF’’, T
A
e
25§C DAC0800L 100 135 ns DAC0800LC 100 150 ns
tPLH, Propagation Delay T
A
e
25§C
tPHL Each Bit 35 60 35 60 35 60 ns
All Bits Switched 35 60 35 60 35 60 ns
TCIFSFull Scale Tempco
g10g
50
g10g
50
g10g
80 ppm/§C
V
OC
Output Voltage Compliance Full Scale Current Change
b
10 18b10 18b10 18 V
k
(/2 LSB, R
OUT
l
20 MX Typ
I
FS4
Full Scale Current V
REF
e
10.000V, R14e5.000 kX 1.984 1.992 2.000 1.94 1.99 2.04 1.94 1.99 2.04 mA
R15e5.000 kX,T
A
e
25§C
I
FSS
Full Scale Symmetry I
FS4
b
I
FS2
g
0.5g4.0
g1g
8.0
g2g
16 mA
I
ZS
Zero Scale Current 0.1 1.0 0.2 2.0 0.2 4.0 mA
I
FSR
Output Current Range V
b
eb
5V 0 2.0 2.1 0 2.0 2.1 0 2.0 2.1 mA
V
b
eb
8V tob18V 0 2.0 4.2 0 2.0 4.2 0 2.0 4.2 mA
Logic Input Levels
V
IL
Logic ‘‘0’’ V
LC
e
0V 0.8 0.8 0.8 V
V
IH
Logic ‘‘1’’ 2.0 2.0 2.0 V
Logic Input Current V
LC
e
0V
I
IL
Logic ‘‘0’’
b
10VsV
IN
s
a
0.8V
b
2.0b10
b
2.0b10
b
2.0b10 mA
I
IH
Logic ‘‘1’’ 2VsV
IN
s
a
18V 0.002 10 0.002 10 0.002 10 mA
V
IS
Logic Input Swing V
b
eb
15V
b
10 18b10 18b10 18 V
V
THR
Logic Threshold Range V
S
e
g
15V
b
10 13.5b10 13.5b10 13.5 V
I
15
Reference Bias Current
b
1.0b3.0
b
1.0b3.0
b
1.0b3.0 mA
dl/dt Reference Input Slew Rate
(Figure 12)
4.0 8.0 4.0 8.0 4.0 8.0 mA/ms
PSSI
FS
a
Power Supply Sensitivity 4.5VsV
a
s
18V 0.0001 0.01 0.0001 0.01 0.0001 0.01 %/%
PSSI
FS
b
b
4.5VsV
b
s
18V 0.0001 0.01 0.0001 0.01 0.0001 0.01 %/%
I
REF
e
1mA
Power Supply Current V
S
e
g
5V, I
REF
e
1mA
I
a
2.3 3.8 2.3 3.8 2.3 3.8 mA
I
b b
4.3b5.8
b
4.3b5.8
b
4.3b5.8 mA
V
S
e
5V,b15V, I
REF
e
2mA
I
a
2.4 3.8 2.4 3.8 2.4 3.8 mA
I
b b
6.4b7.8
b
6.4b7.8
b
6.4b7.8 mA
V
S
e
g
15V, I
REF
e
2mA
I
a
2.5 3.8 2.5 3.8 2.5 3.8 mA
I
b b
6.5b7.8
b
6.5b7.8
b
6.5b7.8 mA
2
Page 3
Electrical Characteristics (Continued)
The following specifications apply for V
S
e
g
15V, I
REF
e
2 mA and T
MIN
s
T
A
s
T
MAX
unless otherwise specified. Output
characteristics refer to both I
OUT
and I
OUT
.
DAC0802LC
DAC0800L/
DAC0801LC
Symbol Parameter Conditions DAC0800LC Units
Min Typ Max Min Typ Max Min Typ Max
P
D
Power Dissipationg5V, I
REF
e
1mA 334833483348mW
5V,
b
15V, I
REF
e
2 mA 108 136 108 136 108 136 mW
g
15V, I
REF
e
2 mA 135 174 135 174 135 174 mW
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating the device beyond its specified operating conditions.
Note 2: The maximum junction temperature of the DAC0800, DAC0801 and DAC0802 is 125
§
C. For operating at elevated temperatures, devices in the Dual-In-Line
J package must be derated based on a thermal resistance of 100
§
C/W, junction-to-ambient, 175§C/W for the molded Dual-In-Line N package and 100§C/W for the
Small Outline M package.
Note 3: Human body model, 100 pF discharged through a 1.5 kX resistor.
Note 4: Pin-out numbers for the DAC080X represent the Dual-In-Line package. The Small Outline package pin-out differs from the Dual-In-Line package.
Connection Diagrams
Dual-In-Line Package
TL/H/5686– 13
Top View
Small Outline Package
TL/H/5686– 14
Top View
See Ordering Information
Block Diagram (Note 4)
TL/H/5686– 2
3
Page 4
Typical Performance Characteristics
Full Scale Current vs Reference Current LSB Propagation Delay Vs I
FS
Reference Input Frequency Response
Curve 1: C
C
e
15 pF, V
IN
e
2 Vp-p
centered at 1V.
Curve 2: C
C
e
15 pF, V
IN
e
50 mVp-p
centered at 200 mV.
Curve 3: C
C
e
0 pF, V
IN
e
100 mVp-p
at 0V and applied through 50 X con-
nected to pin 14.2V applied to R14.
Reference Amp Common-Mode Range
Logic Input Current vs Input Voltage V
TH
b
VLCvs Temperature
Note. Positive common-mode range is always (V
a)b
1.5V
Output Current vs Output Voltage (Output Voltage Compliance)
Output Voltage Compliance vs Temperature
Bit Transfer Characteristics
TL/H/5686– 3
Note. B1– B8 have identical transfer characteris­tics. Bits are fully switched with less than (/2 LSB error, at less than
g
100 mV from actual thresh­old. These switching points are guaranteed to lie between 0.8 and 2V over the operating tempera­ture range (V
LC
e
0V).
4
Page 5
Typical Performance Characteristics (Continued)
Power Supply Current vs
a
V
Power Supply Current vsbV
Power Supply Current vs Temperature
TL/H/5686– 4
Equivalent Circuit
TL/H/5686– 15
FIGURE 2
Typical Applications (Continued)
TL/H/5686– 5
I
FS
&
a
V
REF
R
REF
c
255
256
I
O
a
I
O
e
IFSfor all
logic states
For fixed reference, TTL operation,
typical values are:
V
REF
e
10.000V
R
REF
e
5.000k
R15&R
REF
C
C
e
0.01 mF
V
LC
e
0V (Ground)
FIGURE 3. Basic Positive Reference Operation (Note 4)
TL/H/5686– 21
TL/H/5686– 16
I
FS
&
b
V
REF
R
REF
c
255
256
Note. R
REF
sets IFS; R15 is
for bias current cancellation
FIGURE 4. Recommended Full Scale Adjustment Circuit
(Note 4)
FIGURE 5. Basic Negative Reference Operation (Note 4)
5
Page 6
Typical Applications (Continued)
TL/H/5686– 17
B1 B2 B3 B4 B5 B6 B7 B8 IOmA IOmA E
O
E
O
Full Scale 1 1 1 1 1 1 1 1 1.992 0.000b9.960 0.000 Full Scale
b
LSB 1 1 1 1 1 1 1 0 1.984 0.008b9.920b0.040
Half Scale
a
LSB 1 0 0 0 0 0 0 1 1.008 0.984b5.040b4.920
Half Scale 1 0 0 0 0 0 0 0 1.000 0.992b5.000b4.960 Half Scale
b
LSB 0 1 1 1 1 1 1 1 0.992 1.000b4.960b5.000
Zero Scale
a
LSB 0 0 0 0 0 0 0 1 0.008 1.984b0.040b9.920
Zero Scale 0 0 0 0 0 0 0 0 0.000 1.992 0.000
b
9.960
FIGURE 6. Basic Unipolar Negative Operation (Note 4)
TL/H/5686– 6
B1 B2 B3 B4 B5 B6 B7 B8 E
O
E
O
Pos. Full Scale 1 1 111111b9.920a10.000 Pos. Full Scale
b
LSB11111110b9.840a9.920
Zero Scale
a
LSB 10000001b0.080a0.160
Zero Scale 1 0 000000 0.000
a
0.080
Zero Scale
b
LSB 01111111a0.080 0.000
Neg. Full Scale
a
LSB00000001a9.920b9.840
Neg. Full Scale 0 0 000000
a
10.000b9.920
FIGURE 7. Basic Bipolar Output Operation (Note 4)
TL/H/5686– 18
If R
L
e
RLwithing0.05%, output is symmetrical about ground
B1 B2 B3 B4 B5 B6 B7 B8 E
O
Pos. Full Scale 1 1 1 1 1 1 1 1a9.960 Pos. Full Scale
b
LSB11111110a9.880
(
a
)Zero Scale 1 0 0 0 0 0 0 0a0.040
(
b
)Zero Scale 0 1 1 1 1 1 1 1b0.040
Neg. Full Scale
a
LSB00000001b9.880
Neg. Full Scale 0 0 0 0 0 0 0 0
b
9.960
FIGURE 8. Symmetrical Offset Binary Operation (Note 4)
6
Page 7
Typical Applications (Continued)
TL/H/5686– 19
For complementary output (operation as negative logic DAC), connect invert­ing input of op amp to I
O
(pin 2), connect IO(pin 4) to ground.
FIGURE 9. Positive Low Impedance Output Operation (Note 4)
TL/H/5686– 20
For complementary output (operation as a negative logic DAC) connect non-in­verting input of op am to I
O
(pin 2); connect IO(pin 4) to ground.
FIGURE 10. Negative Low Impedance Output Operation (Note 4)
V
TH
e
V
LC
a
1.4V
15V CMOS, HTL, HNIL
V
TH
e
7.6V
TL/H/5686– 9
Note. Do not exceed negative logic input range of DAC.
TL/H/5686– 10
Typical values: R
IN
e
5k,aV
IN
e
10V
FIGURE 11. Interfacing with Various Logic Families FIGURE 12. Pulsed Reference Operation (Note 4)
7
Page 8
Typical Applications (Continued)
(a) I
REF
t
peak negative swing of I
IN
TL/H/5686– 11
(b)aV
REF
must be above peak positive swing of V
IN
TL/H/5686– 12
FIGURE 13. Accommodating Bipolar References (Note 4)
TL/H/5686– 7
FIGURE 14. Settling Time Measurement (Note 4)
8
Page 9
Typical Applications (Continued)
Note. For 1 ms conversion time with 8-bit resolution and 7-bit accuracy, an LM361 comparator replaces the LM319 and the reference current is doubled by reducing R1, R2 and R3 to 2.5 k X and R4 to 2 MX.
TL/H/5686– 8
FIGURE 15. A Complete 2 ms Conversion Time, 8-Bit A/D Converter (Note 4)
Physical Dimensions inches (millimeters)
Molded Dual-In-Line Package
Order Numbers DAC0800 or DAC0802
NS Package Number J16A
9
Page 10
DAC0800/DAC0801/DAC0802 8-Bit Digital-to-Analog Converters
Physical Dimensions inches (millimeters) (Continued)
Molded Small Outline Package (SO)
Order Numbers DAC0800LCM,
DAC0801LCM or DAC0802LCM
NS Package Number M16A
Molded Dual-In-Line Package
Order Numbers DAC0800, DAC0801, DAC0802
NS Package Number N16A
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