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查询CY7C197-12VC供应商
CY7C197
256Kx1 Static RAM
Features
vided by an active LOW Chip Enable (CE
ers. The CY7C197 has an automatic power-down feature,
• High speed
—12 ns
• CMOS for optimum speed/power
• Low active power
—880 mW
• Low standby power
—220 mW
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
Functional Description
reducing the power consumption by 75% when deselected.
Writing to the device is accomplished when the Chip Enable
) and Write En able (WE) inpu ts are both LOW . Data on the
(CE
input pin (D
the address pins (A
) is written into t he m em ory l ocati on s pec ifi ed o n
IN
through A17).
0
Reading the device is accomplished by taking chip enable
) LOW while Write Enable (WE) remains HIGH. Under
(CE
these conditions th e contents of the memory locati on specifie d
on the address pins will appear on the da ta output (D
The output pin stays in a high-impedance state when Chip
Enable (CE
) is HIGH or Wri te Enable (W E) is LOW.
The CY7C197 utilizes a die coat to insure alpha immunity.
The CY7C197 is a high-perfo rmance CMO S static RAM org anized as 256K words by 1 bit. Easy memory exp ansio n is pr o-
LogicBlock Diagram Pin Configurations
DI
DIP/SOJ
Top View
A
1
D
OUT
WE
GND
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
2
3
4
5
7C197
6
7
8
9
10
11
12 13
INPUT BUFFER
A
13
A
14
A
15
A
16
A
17
A
0
A
1
A
2
A
A
ROW DECODER
3
4
1024 x 256
ARRAY
COLUMN
DECODER
SENSE AMPS
POWER
DOWN
DO
CE
V
24
CC
A
23
17
A
22
16
A
21
15
A
20
14
A
19
13
A
18
12
A
17
11
A
10
16
A
15
9
14
D
IN
CE
C197-2 C197-3
) and three-state driv -
) pin.
OUT
LCC
Top View
17
2
CC
V
A1A0A
A
28
321 27
4
NC
5
A
3
A
6
4
7
A
5
8
A
6
A
9
7
A
10
8
D
11
OUT
12
1314151617
7C197
WE
GND
CE
26
NC
25
A
16
24
A
15
23
A
14
22
A
13
21
A
12
20
A
11
A
19
10
18
NCNC
9
IN
A
D
A
A5A
A
A9A10A11A
7
6
8
12
WE
C197-1
Selection Guide
7C197-12 7C197-15 7C197-20 7C197-25 7C197-35 7C197-45
Maximum Access Time (ns) 12 15 20 25 35 45
Maximum Operating Current (mA) 150 140 135 95 95
Maximum Standby Current (mA) 30 30 30 30 30 30
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-05049 Rev. ** Revised August 24, 2001
Page 2
[1]
Maximum Ratings
(Above which the useful life may be im pai red. For user guidelines, not tested.)
Storage Temperature .....................................−65
Ambient Temperature with
Power Applied..................................................−55
°C to +150°C
°C to +125°C
DC Input Voltage
Output Current into Outputs (LOW).............................20 mA
Static Discharge Voltage.......................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current.................................................... >200 mA
Operating Range
Supply Voltage to Ground Potential
(Pin 24 to Pin 12).................................................−0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State
[1]
.......................................−0.5V to VCC + 0.5V
Range
Commercial 0°C to +70°C 5V ± 10%
Electrical Characteristics Ov er the Op erat ing Range
Parameter Description Test Conditions
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
OS
I
CC
I
SB1
I
SB2
Notes:
1. V
(min.)
2. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
3. A pull-up resistor to V
Output HIGH Voltage VCC = Min., IOH = −4.0 mA 2.4 2.4 V
Output LOW Voltage VCC = Min. IOL=12.0 mA 0.4 0.4 V
Input HIGH Voltage 2.2 V
Input LOW Voltage
Input Load Current GND < VI < V
[1]
CC
Output Leakage Current GND < VO < VCC, Output Disabled −5+5−5+5µA
Output Short
Circuit Current
[2]
VCC Operating
Supply Current
Automatic CE Power-Down
Current—TTL Inputs
[3]
Automatic CE Power-Down
Current—CMOS Inputs
= −2.0V for pulse durations of less than 20 ns.
on the CE input is required to keep the device deselected during VCC power-up, otherwise ISB will exceed values given.
CC
VCC = Max., V
VCC = Max., I
MAX
= 1/t
f = f
= GND −300 −300 mA
OUT
= 0 mA,
OUT
RC
Max. VCC, CE > VIH, VIN > VIH or
< VIL, f = f
V
IN
Max. VCC, CE > VCC − 0.3V,
[3]
> VCC − 0.3V or VIN < 0.3V
V
IN
MAX
....................................−0.5V to VCC + 0.5V
Temperature V
7C197-12 7C197-15
−0.5 0.8 −0.5 0 .8 V
−5+5−5+5µA
CY7C197
Ambient
CC
CC
+ 0.3V
150 140 mA
30 30 mA
10 10
2.2 V
+0.3V
CC
UnitMin. Max. Min. Max.
V
mA
Document #: 38-05049 Rev. ** Page 2 of 10
Page 3
Electrical Characteristics Ov er the Op erat ing Range (continued)
CY7C197
Parameter Description Test Conditions
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
OS
I
CC
I
SB1
I
SB2
Capacitance
Output HIGH Voltage VCC = Min., IOH = −4.0 mA 2.4 2.4 V
Output LOW Voltage VCC = Min. IOL=12.0mA 0.4 0.4 V
Input HIGH Voltage 2.2 V
Input LOW Voltage
Input Load Current GND < VI < V
[1]
CC
Output Leakage Current GND < VO < VCC, Output Disabled −5 +5 −5 +5 µA
Output Short
Circuit Current
[2]
VCC Operating
Supply Current
Automatic CE Power Down
Current—TTL Inputs
[3]
Automatic CE Power-Down
Current—CMOS Inputs
[4]
VCC = Max., V
VCC = Max., I
MAX
= 1/t
f = f
= GND −300 −300 mA
OUT
= 0 mA,
OUT
RC
Max. VCC, CE > VIH, VIN > VIH or
< VIL, f = f
V
IN
Max. VCC, CE > VCC − 0.3V,
[3]
> VCC − 0.3V or VIN < 0.3V
V
IN
MAX
Parameter Description Test Conditions Max. Unit
C
C
IN
OUT
Input Capacitance TA = 25°C, f = 1 MHz,
= 5.0V
V
Output Capacitance 10 pF
CC
7C197-20
7C197-25, 35, 45
UnitMin. Max. Min. Max.
CC
+ 0.3V
2.2 V
+ 0.3V
CC
−0.5 0.8 −0.5 0.8 V
−5 +5 −5 +5 µA
135 95 mA
30 30 mA
15 15 mA
8 pF
V
5V
OUTPUT
INCLUDING
[5]
5pF
JIG AND
SCOPE
R1 329
Ω
R2
Ω
255
(255Ω MIL)
C197-4
AC Test Loads and Wavefor ms
R1 329
Ω
5V
OUTPUT
30 pF
INCLUDING
JIG AND
SCOPE
Equivalent to: THÉ VENIN EQUIVALENT
OUTPUT 1.90V
R2
Ω
202
(255Ω MIL)
(a) (b)
125Ω
Commercial
Notes:
4. Tested initially and after any design or process changes that may affect these parameters.
5. t
= < 3 ns for the -12 and -15 speeds. tr = < 5 ns for the -20 and slower speeds.
r
3.0V
GND
10%
<t
ALL INPUT PULSES
90%
r
90%
10%
<t
r
C197-5
Document #: 38-05049 Rev. ** Page 3 of 10
Page 4
CY7C197
Switching Characteristics Over the Operating Range
7C197-12
7C197-15 7C197-20 7C197-25 7C197-35 7C197-45
[6]
Parameter Description
READ CYCLE
t
RC
t
AA
t
OHA
t
ACE
t
LZCE
t
HZCE
t
PU
t
PD
WRITE CYCLE
t
WC
t
SCE
t
AW
t
HA
t
SA
t
PWE
t
SD
t
HD
t
LZWE
t
HZWE
Notes:
6. Test conditions assume signal transition time of 3 ns or less for -12 and -15 speeds and 5 ns or less for -20 and slower speeds, timing reference levels of
1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified I
7. At any given temperature and voltage condition, t
8. t
HZCE
9. The internal write time of the memory is defined by the overlap of CE
terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
Read Cycle Time 12 15 20 25 35 45 ns
Address to
12 15 20 25 35 45 ns
Data Valid
Output Hold from
3 3 3 3 3 3 ns
Address Change
CE LOW to
12 15 20 25 35 45 ns
Data Valid
CE LOW to
[7]
Low Z
CE HIGH to
[7, 8]
High Z
CE LOW to
3 3 3 3 3 3 ns
5 7 0 9 0 11 0 15 0 15 ns
0 0 0 0 0 0 ns
Power-Up
CE HIGH to
12 15 20 20 25 30 ns
Power-Down
[9]
Write Cycle T im e 12 15 20 25 35 45 ns
CE LOW to
9 10 15 20 30 40 ns
Write End
Address Set-Up to
9 10 15 20 30 40 ns
Write End
Address Hold from
0 0 0 0 0 0 ns
Write End
Address Set-Up to
0 0 0 0 0 0 ns
Write Start
WE Pulse Width 8 9 15 20 25 30 ns
Data Set-Up to
8 9 10 15 17 20 ns
Write End
Data Hold from
0 0 0 0 0 0 ns
Write End
WE HIGH to
Low Z
WE LOW to
High Z
and t
HZWE
[7]
[7,8]
are specified with CL = 5 pF as in part (b) in AC Test Loads and Waveforms. Transition is measured ±500 mV from steady-state voltage.
2 2 3 3 3 3 ns
7 7 0 10 0 11 0 15 0 15 ns
and 30-pF load capacitance.
is less than t
HZCE
OL/IOH
and t
LZCE
LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can
HZWE
is less than t
for any given device.
LZWE
UnitMin. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
Document #: 38-05049 Rev. ** Page 4 of 10
Page 5
Switching Waveforms
CY7C197
Read Cycle No. 1
[10, 11]
ADDRESS
DATA OUT PREVIOUS DATA VALID
Read Cycle No. 2
[10]
CE
t
LZCE
DATA OUT
V
CC
SUPPLY
HIGH IMPEDANCE
t
PU
CURRENT
Write Cycle No.1
Controlled)
(WE
t
ACE
t
OHA
50%
[9]
t
RC
t
AA
DATA VALID
C197-6
t
RC
t
DATA VALID
HZCE
t
PD
HIGH
IMPEDANCE
ICC
50%
ISB
C197-7
ADDRESS
CE
WE
DATA IN
DATA OUT
Notes:
is HIGH for read cycle.
10. WE
11. Device is continuously selected, CE
t
SA
DATA UNDEFINED
= VIL.
t
SCE
t
AW
t
WC
t
DATA VALID
t
HZWE
PWE
t
SD
t
HA
t
HD
t
LZWE
HIGH IMPEDANCE
C197-8
Document #: 38-05049 Rev. ** Page 5 of 10
Page 6
Switching Waveforms (continued)
CY7C197
Write Cycle No. 2 (CE Controlled)
ADDRESS
t
SA
CE
WE
DATA IN
DATA OUT
Note:
12. If CE
goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
[9, 12]
t
AW
t
WC
t
SCE
t
PWE
DATA VALID
t
SD
HIGH IMPEDANCE
t
HA
t
HD
C197-9
Document #: 38-05049 Rev. ** Page 6 of 10
Page 7
Typical DC and AC Characteristics
CY7C197
NORMALIZED SUPPLY CURRENT
vs. SUPPLY VOLTAGE
1.4
1.2
I
CC SB
1.0
CC
0.8
0.6
0.4
NORMALIZED I, I
0.2
I
SB
0.0
4.0 4.5 5.0 5.5 6.0
V
IN
T
A
=5.0V
=25°C
SUPPLY VOLTAGE(V)
NORMALIZED ACCESSTIME
vs. SUPP LY
VOLTAGE
1.4
1.3
AA
1.2
1.1
TA=25°C
1.0
NORMALIZED t
0.9
0.8
4.0 4.5 5.0 5.5 6.0
SUPPLY VOLTAGE(V)
NORMALIZED SUPPLY
CURRENT
vs. AMBIENT TEMPERATURE
1.4
1.2
CC SB
1.0
I
CC
0.8
0.6
V
=5.0V
0.4
NORMALIZED I, I
0.2
I
0.0
SB
-55 25 125
V
CC
IN
=5.0V
AMBIENT TEMPERATURE(°C)
NORMALIZEDACCESSTIME
vs.AMBIENT TEMPERATURE
1.6
1.4
AA
1.2
1.0
VCC=5.0V
NORMALIZED t
0.8
0.6
−55 25 125
AMBIENT TEMPERATURE(°C)
OUTPUT SOURCECURRENT
vs. OUTPUT
VOLTAGE
120
100
80
=5.0V
V
60
CC
T
A
=25°C
40
20
0
OUTPUT SOURCE CURRENT (mA)
0.0 1.0 2.0 3.0 4.0
OUTPUT VOLTAGE(V)
OUTPUT SINK CURRENT
vs. OUTPUT VOLTAGE
140
120
100
80
60
40
20
OUTPUT SINK CURRENT (mA)
0
0.0 1.0 2.0 3.0 4.0
V
CC
T
A
=5.0V
=25°C
OUTPUT VOLTAGE(V)
TYPICAL P OWER-ON CURRENT
vs. SUPPLY
VOLTAGE
3.0
2.5
PO
2.0
1.5
1.0
NORMALIZED I
0.5
0.0
0.0 1.0 2.0 3.0 4.0
SUPPLY VOLTAGE (V)
5.0
TYPICAL ACCESS
vs. OUTPUT LOADING
30.0
25.0
20.0
AA
15.0
DELTA t (ns)
10.0
5.0
0.0
0 200 400 600 800
CAPACITANCE (pF)
TIME
V
CC
T
A
=4.5V
=25°C
CHANGE
1000
NORMALIZED
vs. CYCLE TIME
I
CC
1.25
=5.0V
V
CC
1.00
T
A
V
CC
=25°C
=0.5V
IN
0.75
NORMALIZED I
0.50
10 20 30 40
CYCLE FREQUENCY (MHz)
Document #: 38-05049 Rev. ** Page 7 of 10
Page 8
CY7C197 Truth Table
CE WE Input/Output Mode
H X High Z Deselect/Power-Down
L H Data Out Read
L L Data In Write
Ordering Information
Speed
(ns) Ordering Code
12 CY7C197-12PC P13 24-Lead (300-Mil) Molded DIP Commercial
CY7C197-12VC V13 24-Lead Molded SOJ
15 CY7C197-15PC P13 24-Lead (300-Mil) Molded DIP Commercial
CY7C197-15VC V13 24-Lead Molded SOJ
20 CY7C197-20PC P13 24-Lead (300-Mil) Molded DIP Commercial
CY7C197-20VC V13 24-Lead Molded SOJ
25 CY7C197-25PC P13 24-Lead (300-Mil) Molded DIP Commercial
CY7C197-25VC V13 24-Lead Molded SOJ
35 CY7C197-35PC P13 24-Lead (300-Mil) Molded DIP Commercial
CY7C197-35VC V13 24-Lead Molded SOJ
45 CY7C197-45PC P13 24-Lead (300-Mil) Molded DIP Commercial
CY7C197-45VC V13 24-Lead Molded SOJ
Package
Name Package Type
CY7C197
Operating
Range
Document #: 38-05049 Rev. ** Page 8 of 10
Page 9
ng so indemnifies Cypress Semiconductor against all charges.
Package Diagrams
CY7C197
24-Lead (300-Mil) Molded DIP P13/P13A
24-Lead (300-Mil) Molded SOJ V13
51-85013-A
51-85030-A
Document #: 38-05049 Rev. ** Page 9 of 10
© Cypress Semiconductor Corporation, 2001. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. No r does it convey or imply any license under patent or other rights. Cypress Semiconductor does not autho rize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assume s all risk of such use and in doi
Page 10
Document Title: CY7C197 256K x 1 Static RAM
Document Number: 38-05049
REV. ECN NO.
** 107151 09/10/01 SZV Change from Spec number: 38-00078 to 38-05049
Issue
Date
Orig. of
Change Description of Change
CY7C197
Document #: 38-05049 Rev. ** Page 10 of 10
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