Peripheral component interconnect (PCI) standard form factor
expansion card
■
Supports in-circuit reconfiguration with an EPC1 Configuration
EPROM, or the BitBlasterª, ByteBlasterª, or ByteBlasterMVª
download cable
■
Includes an EPF10K30RC240-3 device
■
128 KBytes of on-board SRAM upgradable to 256 KBytes
■
Local-side function can interface to a standard parallel port or a
standard VGA port
■
I/O headers allowing users to interface with extra prototype devices
■
External power connection for stand alone operation
■
On-board headers
ÐConnect to either the BitBlaster or the ByteBlaster download
cable for device configuration
ÐAllow fast external local-side clock input
The PCI prototype board is designed to work with the
function and is for demonstration purposes only. This data sheet provides
signal connections, jumper settings, supported components, and board
options for the Altera PCI prototype board, version 1.0.
PCI Prototype Board
pci_a
MegaCoreª
f
Functional
For installation instructions, refer to ÒGetting Started with the pci_a
Prototype BoardÓ in the
function
Figure 1 shows the PCI prototype board block diagram.
.
readme.htm
file included with the
pci_a
Description
Altera Corporation 1
A-DS-PCIDEMO-01
FLEX 10K PCI Prototype Board Data Sheet
Figure 1. PCI Prototype Board Block Diagram
Local Side Clock InputLocal Side Clock Oscillator
Status LEDs
VGA
Header
Parallel Port Header
Video DAC (optional)
J1
J6
1
25 26
S1
64 Kbytes
RAM
2
64 Kbytes
RAM
JP1
JP2
1
3
2
1
2
3
JP3
I/O HeaderI/O Header
2
1
J5
2
1
J3
2
1
26
J4
25
1
2
J7
ByteBlaster
J9
JTAG
J11
I/O Header
25 26
I/O Header
I/O Header
EPF10K30RC240-3
AAB239737
40
39
40
39
2
1
J8
®
®
I/O Header
GND
GND
26
25
LEDP1
ALTERA PCI Prototype Board
External Power Input
PCI Interface
Signal Connections
Signals pass through the PCI prototype board via the PCI interface or
external sources and connect to various board components. To view upto-date PCI prototype board schematics, refer to the Altera FTP site at
ftp.altera.com/pub/megacore/pci/board/
references, and Table 2 lists the board connections illustrated in the
schematics.
. Table 1 defines the schematic
Table 1. Schematic Reference Definitions (Part 1 of 2)
ReferenceDefinition
P1.A<n> or P1.B<n>P1 = PCI interface; A = front of board; B = back of board; <n> = pin number
(1) Altera-reserved signal names are shown in upper case Courier type.
Jumper Settings
Table 3 lists default jumper settings and describes optional pin
connections for the stopn, trdyn, and framen bidirectional signals.
Table 3. Jumper Settings (Part 1 of 2)
Item Default
Setting
JP3 A-B Video digital analog
Altera Corporation 9
Schematic Reference,
Note (1)
converter (DAC)
Description
The board is shipped without the Brooktree Bt121 video DAC, and
the three jumpers (one for each color channel) are set to the A-B
position. This configuration allows the EPF10K30 device to drive
the VGA outputs directly, for a total of 8 colors. To configure the
board for use with the Bt121 video DAC, set the JP3 jumpers to the
B-C position.
FLEX 10K PCI Prototype Board Data Sheet
Table 3. Jumper Settings (Part 2 of 2)
ItemDefault
Setting
JP41-2FLEX® 10K PCI
JP51-2FLEX 10K PCI controller In the pci_a function, the bidirectional signal trdyn is split into
JP61-2FLEX 10K PCI controller In the pci_a function, the bidirectional signal framen is split into
S1–Configuration logic
Note:
(1) Refer to the Altera FTP site for up-to-date PCI prototype board schematics at
ftp.altera.com/pub/megacore/pci/board/.
Supported
Components
Schematic Reference,
Note (1)
controller
and Joint Test Action
Group (JTAG) interface
Table 4 lists all components supported by the PCI prototype board;
however, not all components are shipped with the board. See "Board
Options" on page 12 for more information.
In the pci_a function, the bidirectional signal stopn is split into
two separate input and output pins (212, 81). To configure the
board to use the stopn signal driven by one bidirectional pin (81),
set JP4 to 2-3. JP4 is a solder jumper on the bottom side of the
board.
two separate input and output pins (90, 75). To configure the board
to use the trdyn signal driven by one bidirectional pin (75), set
JP5 to 2-3. JP5 is a solder jumper on the bottom side of the board.
two separate input and output pins (92, 73). To configure the board
to use the framen signal driven by one bidirectional pin (73), set
JP6 to 2-3. JP6 is a solder jumper on the bottom side of the board.
S1 is not needed for device configuration. However, bits 3 through
6 are connected to the EPF10K30 I/O pins and can be used as
desired.
Description
Table 4. Supported Components (Part 1 of 2)
ComponentManufacturer Part NumberQuantitySchematic Reference
(1) Refer to the Altera FTP site for up-to-date PCI prototype board schematics at
ftp.altera.com/pub/megacore/pci/board/.
Altera Corporation 11
FLEX 10K PCI Prototype Board Data Sheet
Board Options
The PCI prototype board schematics illustrate optional items and
configuration modes.Tables 5 through 8 list video DAC, clock device,
SRAM, and configuration options for the board.
Table 5. Video DAC Options
Board Setup Brooktree
BT121KPJ50
FLEX 10K device drives
monitor,
Video DAC drives monitor Mount Mount Mount Mount Mount
CY7C179-8JC,
CY7C179-10JC 32 K × 18 K 10.5 210
CY7C1032-8JC 64 K × 18 K 8.5 280
CY7C1032-10JC 64 K × 18 K 10.5 280
Note (1)
32 K × 18 K 8.5225
Maximum Access Time
(ns)
Maximum Operating
Current (mA)
12 Altera Corporation
Table 8. Configuration Options
FLEX 10K PCI Prototype Board Data Sheet
Configuration EPC1 BitBlaster or
Description
ByteBlaster Cable
Configuration
EPROM,
BitBlaster or
ByteBlaster cable
Notes to tables:
(1) This configuration is the default board setting.
(2) By default, the clock device is not mounted. Users can select a pin-compatible clock device of a different frequency.
Note (1)
References
Mounted Disconnected To configure the EPF10K30 device with a serial
Configuration EPROM, disconnect the BitBlaster or
ByteBlaster download cable and mount the programmed
EPC1 device in the socket.
Removed Connected To configure the EPF10K30 in-circuit via the standard
parallel port using the MAX+PLUS
EPC1 device, and connect the BitBlaster or ByteBlaster
download cable.
®
II software, remove the
Refer to the following Altera documents for more information:
■ PCI Master/Target MegaCore Function with DMA Data Sheet
■ Application Note 86 (Implementing the pci_a Master/Target in
FLEX 10K devices)
■ FLEX 10K Embedded Programmable Logic Family Data Sheet
■ ByteBlaster Parallel Port Download Cable Data Sheet
■ BitBlaster Serial Download Cable Data Sheet
■ Configuration EPROMs for FLEX Devices Data Sheet
Other references include:
■ PCI-SIG. PCI Local Bus Specification, Revision 2.1, Portland,
Oregon: PCI Special Interest Group, June 1995.
■ Brooktree Corporation. Brooktree Graphics and Imaging
Product Databook. San Diego, California: Brooktree
Corporation, 1990.
■ Cypress Semiconductor. Cypress Data Book. San Jose, California:
Cypress Semiconductor Corporation, May 1995.
Altera Corporation 13
FLEX 10K PCI Prototype Board Data Sheet
Altera, MAX, MAX+PLUS, MAX+PLUS II, FLEX, FLEX 10K, EPF10K30, BitBlaster, ByteBlaster, ByteBlasterMV,
EPC1, and MegaCore are trademarks and/or service marks of Altera Corporation in the United States and other
countries. Altera acknowledges the trademarks of other organizations for their respective products or services
®
mentioned in this document, specifically: AMP is a trademark of AMP, Incorporated. Brooktree is a registered
101 Innovation Drive
San Jose, CA 95134
(408) 544-7000
http://www.altera.com
Applications Hotline:
(800) 800-EPLD
Customer Marketing:
(408) 544-7104
Literature Services:
(888) 3-ALTERA
lit_req@altera.com
trademark of Brooktree Corporation. Cypress is a trademark of Cypress Semiconductor Corporation. Murata is
a trademark of Murata Electronics North America, Inc. ROHM is a trademark of ROHM Electronics. Grayhill
is a trademark of Grayhill, Inc. Dialight is a trademark of Dialight Corporation. Molex is a trademark of Molex,
Inc. Dale is a trademark of Dale Electronics. EPSON is a trademark of SEIKO EPSON Corporation. Texas
Instruments is a trademark of Texas Instruments, Inc. Altera products are protected under numerous U.S. and
foreign patents and pending applications, maskwork rights, and copyrights. Altera warrants performance of its
semiconductor products to current specifications in accordance with AlteraÕs standard warranty, but reserves
the right to make changes to any products and services at any time without notice. Altera assumes no
responsibility or liability arising out of the application or use of any information, product, or
service described herein except as expressly agreed to in writing by Altera Corporation.
Altera customers are advised to obtain the latest version of device specifications before
relying on any published information and before placing orders for products or services.
Copyright 1998 Altera Corporation. All rights reserved.
16Altera Corporation
Printed on Recycled Paper.
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