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CY62137CV25
Datasheet (CYPRESS)
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Datasheet CY62137CV25, CY62137CV30, CY62137CV33 Datasheet (CYPRESS)

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查询CY62137CV供应商
Features
• Very high speed: 55 ns and 70 ns
—CY62137CV30: 2.7V–3.3V —CY62137CV33: 3.0V–3.6V —CY62137CV: 2.7V–3.6V
• Pin-compatible with the CY62137V
• Ultra-low active power —Typical active current: 1.5 mA @ f = 1 MHz —Typical active current: 5.5 mA @ f = f
speed)
• Low and ultra-low standby power
• Easy memory expansion with CE
and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Packages offered in a 48-ball FBGA
Functional Description
[1]
The CY62137CV25/30/33 and CY62137CV are high-perfor­mance CMOS static RAMs organized as 128K words by 16 bits. These devic es feature advanced circuit de sign to pro vide ultra-low active current. This is ideal for providing More Battery
max
(70-ns
CY62137CV25/30/33 MoBL
CY62137CV MoBL
2M (128K x 16) Static RAM
Life™ (MoBL®) in portable applications such as cellular tele­phones. The devices also has an automatic power-down fea­ture that significantly reduces power consumption by 80% when addresses are not toggling. The device can also be put into standby m ode reduci ng power con sumption by more tha n 99% when deselected (CE HIGH). The input/output pins (I/O in a high-impedance state when: deselected (CE puts are dis abled (OE HIGH), both Byte High Enable and Byte Low Enable a r e d is a bled ( B HE operation (CE
LOW, and WE LOW).
Writing to the device is accomplished by taking Chip Enable
) and Write Enable (WE) inputs LOW. If Byte Low Enable
(CE (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A through A16). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A
Reading from the device is accomplished by taking Chip Enable (CE Write Enable (WE
) and Output Enable (OE) LOW while forcing the
) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O LOW , then d ata f rom memory will a ppear on I/O the truth table at the back of this data sheet for a complete description of read and write modes.
HIGH or both BLE and BHE are
through I/O15) are plac ed
0
HIGH), out-
, BLE HIGH), or during a write
through A16).
0
to I/O7. If Byte High Enable (BHE) is
0
to I/O15. See
8
® ®
0
Logic Block Diagram
10
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
Note:
1. For best practice recommendations, please refer to the Cypress applic a tion note “System Design Guidelines” on http://www.cypress.com.
DATA IN DRIVERS
ROW DECODER
COLUMN DECODER
11
A
Power- down Circuit
128K x 16
RAM Array 2048 x 1024
14
A12A13A
– I/O
I/O
0
7
SENSE AMPS
15
16
A
A
CE
BHE BLE
I/O8 – I/O
BHE WE CE OE BLE
15
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 Document #: 38-05201 Rev. *D Revised September 20, 2002
Page 2
CY62137CV25/30/33 MoBL
CY62137CV MoBL
® ®
Pin Configuration
[2, 3]
FBGA (Top View)
4
5
6
A
A
1
A
4
A
6
A
7
A
16
A
15
A
13
A
10
CE
I/O
I/O
I/O
I/O
WE
A
NC
2
I/O
I/O
1
V
CC
3
V
SS
4
I/O
5
I/O
NC
11
A
B
0
C
2
D
E
F
6
G
7
H
A
A
A
NC
A
A
A
3
0
3
5
14
12
9
Static Discharge Voltage.......................................... > 2001V
Maximum Ratings
1
BLE
I/O
I/O
V
SS
V
CC
I/O
I/O
NC
2
OE
BHE
8
I/O
10
9
I/O
11
DNU
I/O
12
I/O
13
14
NC
15
A
8
(per MIL-STD-883, Method 3015)
(Above which the useful life may be impaired. For user guide­lines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage to Ground Potential –0.5V to V DC Voltage Applied to Outputs
in High-Z State DC Input Voltage
[4]
....................................–0.5V to VCC + 0.3V
[4]
....................................−0.5V to VCC + 0.3V
CCMAX
+ 0.5V
Latch-up Current................................................... > 200 mA
Operating Range
Device Range
CY62137CV25 Industrial –40°C to +85°C 2.2V to 2.7V CY62137CV30 2.7V to 3.3V CY62137CV33 3.0V to 3.6V CY62137CV 2.7V to 3.6V
Ambient
Temperature T
A
Output Current into Outputs (LOW).............................20 mA
Product Portfolio
Power Dissipation
Operating, ICC (mA)
V
Range (V)
Product
CC
V
CC(min.)VCC(typ.)
[5]
V
CC(max.)
Speed
(ns)
Typ.
[5]
Max. Typ.
max
[5]
Max. Typ.
CY62137CV25LL 2.2 2.5 2.7 55 1.5 3 7 15 2 10
70 1.5 3 5.5 12
CY62137CV30LL 2.7 3.0 3.3 55 1.5 3 7 15 2 10
70 1.5 3 5.5 12
CY62137CV33LL 3.0 3.3 3.6 55 1.5 3 7 15 5 15
70 1.5 3 5.5 12 CY62137CVLL 2.7V 3.3 3.6 70 1.5 3 5.5 12 5 15 CY62137CVSL 2.7V 3.3 3.6 70 1.5 3 5.5 12 1 5
Standby, I
[5]
SB2
Max.
V
CC
(µA)f = 1 MHz f = f
Notes:
2. NC pins are not connected to the die.
3. E3 (DNU) can be left as NC or V
4. V
5. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
= –2.0V for pulse durations less than 20 ns.
IL(min.)
to ensure proper application.
SS
= V
CC
CC(typ.)
, TA = 25°C.
Document #: 38-05201 Rev. *D Page 2 of 13
Page 3
Electrical Characteristics Ov er the Op erat ing Range
Parameter Description Test Conditions
V V V
V I
IX
I
OZ
I
CC
I
SB1
I
SB2
OH OL IH
IL
Output HIGH Voltage IOH = –0.1 mA VCC = 2.2V 2.0 2.0 V Output LOW Voltage IOL = 0.1 mA VCC = 2.2V 0.4 0.4 V Input HIGH Voltage 1.8 VCC +
Input LOW Voltage –0.3 0.6 –0.3 0.6 V Input Leakage Current GND < VI < V Output Leakage
GND < VO < VCC, Output Disabled –1 +1 –1 +1 µA
CC
Current VCC Operating Supply
Current
Automatic CE Power-down Current— CMOS Inputs
Automatic CE Power-down Current— CMOS Inputs
f = f f = 1 MHz 1.5 3 1.5 3
MAX
= 1/t
RC
VCC = 2.7V I
OUT
CMOS Levels
CE > VCC – 0.2V V
> VCC – 0.2V or VIN < 0.2V,
IN
f = f
(Address and Data Only),
max
f=0 (OE
, WE, BHE, and BLE)
CE > VCC – 0.2V
> VCC – 0.2V or VIN < 0.2V,
V
IN
f = 0, VCC = 2.7V
= 0 mA
CY62137CV25/30/33 MoBL
CY62137CV MoBL
CY62137CV25-55 CY62137CV25-70
[5]
Max. Min. Typ.
1.8 VCC +
0.3V
–1 +1 –1 +1 µA
7 15 5.5 12 mA
2 10 2 10 µA
[5]
Max.
UnitMin. Typ.
V
0.3V
® ®
Parameter Description Test Conditions
V V V
V I
IX
I
OZ
I
CC
I
SB1
I
SB2
OH OL IH
IL
Output HIGH Voltage IOH = –1.0 mA VCC = 2.7V 2.4 2.4 V Output LOW Voltage IOL = 2.1 mA VCC = 2.7V 0.4 0.4 V Input HIGH Voltage 2.2 VCC +
Input LOW Voltage –0.3 0.8 –0.3 0.8 V Input Leakage Current GND < VI < V Output Leakage
GND < VO < VCC, Output Disabled –1 +1 –1 +1 µA
CC
Current VCC Operating Supply
Current
Automatic CE Power-down Current— CMOS Inputs
Automatic CE Power-down Current— CMOS Inputs
f = f f = 1 MHz 1.5 3 1.5 3
MAX
= 1/t
RC
VCC = 3.3V
= 0 mA
I
OUT
CMOS Levels
CE > VCC – 0.2V V
> VCC – 0.2V or VIN < 0.2V,
IN
f = f
(Address and Data Only),
max
f=0 (OE
, WE, BHE, and BLE)
CE > VCC – 0.2V VIN > VCC – 0.2V or VIN < 0.2V,
CC
= 3.3V
f = 0, V
Electrical Characteristics Ov er the Op erat ing Range
Parameter Description Test Conditions
V
OH
V
OL
Output HIGH Voltage IOH = –1.0 mA VCC = 3.0V 2.4 2.4 V
VCC = 2.7V 2.4 V
Output LOW Voltage IOL = 2.1 mA VCC = 3.0V 0.4 0.4 V
VCC = 2.7V 0.4 V
CY62137CV30-55 CY62137CV30-70
[5]
Max. Min. Typ.
2.2 VCC +
0.3V
[5]
Max.
UnitMin. Typ.
V
0.3V
–1 +1 –1 +1 µA
7 15 5.5 12 mA
2 10 2 10 µA
CY62137CV33-70
CY62137CV33-55
[5]
Max. Min. Typ.
CY62137CV-70
[5]
Max.
UnitMin. Typ.
Document #: 38-05201 Rev. *D Page 3 of 13
Page 4
Electrical Characteristics Ov er the Op erat ing Range (continued)
Parameter Description Test Conditions
V
IH
V
IL
I
IX
I
OZ
I
CC
I
SB1
I
SB2
Capacitance
C
IN
C
OUT
Input HIGH Voltage 2.2 VCC +
Input LOW Voltage –0.3 0.8 –0.3 0.8 V Input Leakage Current GND < VI < V
CC
Output Leakage Current GND < VO < VCC, Output Dis-
abled
VCC Operating Supply Current f = f
f = 1 MHz 1.5 3 1.5 3
MAX
= 1/t
RCVCC
I
OUT
CMOS
= 3.6V
= 0 mA
Levels
Automatic CE Power-down Current —CMOS Inputs
Automatic CE Power-down Current —CMOS Inputs
[6]
CE > VCC – 0.2V V
> VCC – 0.2V or VIN < 0.2V,
IN
f = f
(Address and Data Onl y),
max
f=0 (OE
, WE, BHE, and BLE)
CE > VCC – 0.2V VIN > VCC – 0.2V or VIN <
0.2V,
CC
= 3.6V
f = 0, V
Parameter Description Test Conditions Max. Unit
Input Capacitance TA = 25°C, f = 1 MHz,
= V
V
CC
Output Capacitance 8 pF
CC(typ.)
CY62137CV25/30/33 MoBL
CY62137CV MoBL
CY62137CV33-55
[5]
Max. Min. Typ.
0.3V
–1 +1 –1 +1 µA –1 +1 –1 +1 µA
7 15 5.5 12 mA
5 15 5 15 µA
LL 5 15 5 15 SL 1 5
CY62137CV33-70
CY62137CV-70
[5]
Max.
2.2 VCC +
0.3V
6 pF
® ®
UnitMin. Typ.
V
Thermal Resistance
Parameter Description T est Condit ions BGA Unit
Θ
Θ
Thermal Resistance
JA
(Junction to Ambient) Thermal Resistance
JC
(Junction to Case)
[6]
[6]
Still Air, soldered on a 3 x 4.5 inch, two-layer printed circuit board
55 °C/W
16 °C/W
AC Test Loads and Waveforms
30 pF
SCOPE
R1
VCC Typ
R2
Equivalent to: THÉ VENIN EQUIVALENT
GND
Rise TIme: 1 V/ns Fall Time: 1 V/ns
OUTPUT V
10%
ALL INPUT PULSES
90%
R
TH
TH
90%
10%
8000 645 645 Ω
1.20 1.75 1.75 V
V
CC
OUTPUT
INCLUDING
JIG AND
Parameters 2.5V 3.0V 3.3V Unit
R1 16600 1105 1216 Ω R2 15400 1550 1374 Ω
R
TH
V
Note:
6. Tested initially and after any design or process changes that may affect these parameters.
TH
Document #: 38-05201 Rev. *D Page 4 of 13
Page 5
CY62137CV25/30/33 MoBL
CY62137CV MoBL
Data Retention Characte ristics (Over the Operating Range)
Parameter Description Conditions Min. Typ.
V
DR
I
CCDR
[6]
t
CDR
[7]
t
R
Data Retention Waveform
VCC for Data Retention 1.5 V Data Retention Current VCC= 1.5V
CE
> VCC – 0.2V,
V
> VCC – 0.2V or VIN < 0.2V
IN
LL 1 6 SL 4
Chip Deselect to Data Retention Time 0 ns Operation Recovery Time t
[8]
RC
[5]
Max. Unit
ccmax
® ®
V
µA
ns
V
V
CC
CC(min.)
t
CDR
VDR> 1.5 V
V
CC(min.)
t
R
CE or
BHE.BLE
DATA RETENTION MODE
Switching Characteristics Over the Operating Range
[9]
55 ns 70 ns
Parameter Description
Read Cycle
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
LZOE
t
HZOE
t
LZCE
t
HZCE
t
PU
t
PD
t
DBE
[11]
t
LZBE
t
HZBE
Write Cycle
t
WC
t
SCE
Notes:
7. Full-device AC operation requires linear V
8. BHE
9. T est conditions assume signal transition time of 5 ns or less, timing reference levels of V specified I
10. At any given temperature and voltage condition, t any given device.
11. If both byte enables are toggled together this value is 10 ns.
12. t
HZOE
13. The internal write time of the memory is defined by the overlap of WE of these signals can terminate a write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal that terminates
the write.
[13]
.BLE is the AND of both BHE and BLE. Chip can be deselected by either disabling the chip enable signals or by disabling both BHE and BLE.
and 30-pF load capacitance.
OL/IOH
, t
, t
HZBE
, and t
HZCE
Read Cycle Time 55 70 ns Address to Data Valid 55 70 ns Data Hold from Address Change 10 10 ns CE LOW to Data Valid 55 70 ns OE LOW to Data Valid 25 35 ns OE LOW to Low-Z OE HIGH to High-Z CE LOW to Low-Z CE HIGH to High-Z
[10]
[10, 12]
[10]
[10, 12]
5 5 ns
20 25 ns
10 10 ns
20 25 ns CE LOW to Power-up 0 0 ns CE HIGH to Power-down 55 70 ns BHE/BLE LOW to Data Valid 55 70 ns BHE/BLE LOW to Low-Z BHE/BLE HIGH to High-Z
[10]
[10, 12]
5 5 ns
20 25 ns
Write Cycle Time 55 70 ns CE LOW to Write End 45 60 ns
ramp from V
CC
HZCE
transitions are measured when the outputs enter a high impedance state.
HZWE
to V
DR
CC(min.)
is less than t
> 100 µs or stable at V
CC(typ.)
, t
LZCE
, CE = VIL, BHE and/or BLE = VIL. All signals must be ACTIVE to initiate a write and any
is less than t
HZBE
LZBE
> 100 µs.
CC(min.)
/2, input pulse levels of 0 to V
, t
is less than t
HZOE
LZOE
, and output loading of the
CC(typ.)
, and t
HZWE
is less than t
UnitMin Max Min Max
LZWE
for
Document #: 38-05201 Rev. *D Page 5 of 13
Page 6
CY62137CV25/30/33 MoBL
CY62137CV MoBL
® ®
Switching Characteristics Over the Operating Range
Parameter Description
t
AW
t
HA
t
SA
t
PWE
t
BW
t
SD
t
HD
t
HZWE
t
LZWE
Address Set-up to Write End 45 60 ns Address Hold from Write End 0 0 ns Address Set-up to Write Start 0 0 ns WE Pulse Width 40 45 ns BHE/BLE Pulse Width 50 60 ns Data Set-up to Write End 25 30 ns Data Hold from Write End 0 0 ns WE LOW to High-Z WE HIGH to Low-Z
[10, 12] [10]
Switching Waveforms
Read Cycle No. 1 (Address Transition Controlled)
ADDRESS
t
OHA
DATA OUT PREVIOUS DATA VALID
[14, 15]
t
AA
[9]
(continued)
t
RC
55 ns 70 ns
UnitMin Max Min Max
20 25 ns
10 10 ns
DATA VALID
Read Cycle No. 2 (OE Controlled)
ADDRESS
CE
OE
BHE/BLE
t
LZBE
DATA OUT
V
CC
SUPPLY
CURRENT
Notes:
14. Device is continuously selected. OE is HIGH for read cycle.
15. WE
16. Address valid prior to or coincident with CE
HIGH IMPEDANCE
t
LZCE
t
PU
, CE = VIL, BHE, BLE = VIL.
[15, 16]
t
ACE
t
DOE
t
t
LZOE
LZOE
t
DBE
50%
, BHE, BLE transition LOW.
t
RC
t
PD
t
HZCE
t
HZOE
t
HZBE
HIGH
IMPEDANCE
DATA VALID
I
50%
CC
I
SB
Document #: 38-05201 Rev. *D Page 6 of 13
Page 7
Switching Waveforms (continued)
Write Cycle No. 1 (WE Controlled)
ADDRESS
CE
[13, 17, 18]
t
SCE
t
WC
CY62137CV25/30/33 MoBL
CY62137CV MoBL
® ®
t
SA
WE
BHE/BLE
OE
DATA I/O
NOTE
19
t
HZOE
Write Cycle No. 2 (CE Controlled)
ADDRESS
CE
WE
[13, 17, 18]
t
SA
t
t
AW
AW
t
WC
t
BW
t
PWE
t
SD
DATA
t
PWE
IN
t
SCE
VALID
t
HA
t
HD
t
HA
t
BHE/BLE
BW
OE
DATA I/O
Notes:
17. Data I/O is high-impedance if OE
18. If C E
19. During this period, the I/Os are in output state and input signals should not be applied.
goes HIGH simultaneous ly with WE HIGH , the output remains in a high- impedance st ate.
NOTE
19
= VIH.
t
HZOE
t
SD
DATA
IN
VALID
t
HD
Document #: 38-05201 Rev. *D Page 7 of 13
Page 8
Switching Waveforms (continued)
Write Cycle No. 3 (WE Controlled, OE LOW)
ADDRESS
CE
BHE/BLE
[18]
t
t
SCE
BW
t
WC
CY62137CV25/30/33 MoBL
CY62137CV MoBL
® ®
t
SA
WE
DATAI/O
NOTE 19
t
HZWE
Write Cycle No. 4 (BHE/BLE Controlled, OE LOW)
ADDRESS
CE
BHE/BLE
t
SA
WE
t
t
AW
AW
[18]
t
SCE
t
PWE
t
WC
t
PWE
t
BW
t
SD
DATAIN VALID
t
HA
t
t
HA
t
LZWE
HD
t
HD
DATA I/O
NOTE 19
t
SD
DATA
IN
VALID
Document #: 38-05201 Rev. *D Page 8 of 13
Page 9
Typical DC and AC Parameters
CY62137CV25/30/33 MoBL
CY62137CV MoBL
® ®
(Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = V
Operating Current vs. Supply Voltage
14.0
12.0
10.0 MoBL
(mA)
8.0
CC
I
6.0
4.0
2.0
0.0
2.2
2.5
2.7
SUPPLY VOLT AGE (V)
,
(f = f
max
55 ns)
,
(f = f
max
70 ns)
(f = 1 MHz)
14.0
12.0
10.0 MoBL
(mA)
8.0
CC
I
6.0
4.0
2.0
0.0
2.7
3.0
3.3
SUPPLY VOLTAGE (V)
(f = f
55 ns)
(f = f
70 ns)
(f = 1 MHz)
14.0
12.0
10.0
max
max
,
,
MoBL
(mA)
8.0
CC
I
6.0
4.0
2.0
0.0
3.0
SUPPLY VOLTAGE (V)
3.3
(f = f
55 ns)
(f = f
70 ns)
(f = 1 MHz)
3.6
max
max
,
,
Standby Current vs. Supply Voltage
12.0
10.0 MoBL
8.0
SB (µA)
I
6.0
4.0
2.0 0
2.2
2.5
SUPPLY VOLTAGE (V)
2.7
12.0
10.0 MoBL
8.0
SB (µA)
I
6.0
4.0
2.0 0
3.0
2.7
SUPPLY VOLTAGE (V)
3.3
12.0 MoBL
10.0
8.0
SB (µA)
I
6.0
4.0
2.0 0
3.3
3.0
SUPPLY VOLT AGE (V)
3.6
Access Time vs. Supply Voltage
, TA = 25°C)
CC(typ.)
.
14.0
12.0
10.0 MoBL
(mA)
8.0
CC
I
6.0
4.0
2.0
0.0
2.7
3.3
SUPPLY VOLTAGE (V)
12.0 MoBL
10.0
8.0
SB (µA)
I
6.0
4.0
2.0 SL
0
2.7
SUPPLY VOLTAGE (V)
LL
(f = f
70 ns)
(f = 1 MHz
3.6
3.3
max
3.6
,
60
MoBL
50 40 30
AA (ns)
20
T
10 0
2.2
2.5
2.7
SUPPLY VOLTAGE (V)
60
MoBL
50 40 30
AA (ns)
20
T
10 0
3.0
2.7
3.3
SUPPLY VOLTAGE (V)
60
MoBL
50 40 30
AA (ns)
20
T
10 0
3.0
3.3
SUPPLY VOLTAGE (V)
3.6
60
MoBL
50 40 30
AA (ns)
20
T
10 0
2.7
3.3
SUPPLY VOLTAGE (V)
3.6
Document #: 38-05201 Rev. *D Page 9 of 13
Page 10
CY62137CV25/30/33 MoBL
CY62137CV MoBL
Truth Table
CE WE OE BHE BLE Inputs/Outputs Mode Power
H X X X X High-Z Deselect/Power-down Standby (ISB) X X X H H High-Z Deselect/Power-down Standby (ISB) L H L L L Data Out (I/OO–I/O15) Read Active (ICC) L H L H L Data Out (I/OO–I/O7);
I/O8–I/O
L H L L H Data Out (I/O8–I/O15);
L H H L L High-Z Output Disabled Active (ICC) L H H H L High-Z Output Disabled Active (ICC) L H H L H High-Z Output Disabled Active (ICC) L L X L L Data In (I/OO–I/O15) Write Active (ICC) L L X H L Data In (I/OO–I/O7);
L L X L H Data In (I/O8–I/O15);
I/O
I/O
I/O
0
8
0
in High-Z
15
–I/O7 in High-Z
–I/O
in High-Z
15
–I/O7 in High-Z
Read Active (ICC)
Read Active (ICC)
Write Active (ICC)
Write Active (ICC)
® ®
Ordering Information
Speed
(ns) Ordering Code
70 CY62137CV25LL-70BAI 2.2–2.7 BA48A 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm) Industrial
CY62137CV25LL-70BVI 2.2–2.7 BV48A 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) CY62137CV30LL-70BAI 2.7–3.3 BA48A 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm) CY62137CV30LL-70BVI 2.7–3.3 BV48A 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) CY62137CV33LL-70BAI 3.0–3.6 BA48A 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm) CY62137CV33LL-70BVI 3.0–3.6 BV48A 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) CY62137CVLL-70BAI 2.7–3.6 BA48A 48-ball Fine Pitch BGA (7 m m x 7 mm x 1.2 mm) CY62137CVLL-70BVI 2.7–3.6 BV48A 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) CY62137CVSL-70BAI 2.7–3.6 BA48A 48-ball Fine Pitch BGA (7 m m x 7 mm x 1.2 mm) CY62137CVSL-70BVI 2.7–3.6 BV4 8A 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm)
55 CY62137CV25LL-55BAI 2.2–2.7 BA48A 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm)
CY62137CV25LL-55BVI 2.2–2.7 BV48A 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) CY62137CV30LL-55BAI 2.7–3.3 BA48A 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm) CY62137CV30LL-55BVI 2.7–3.3 BV48A 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) CY62137CV33LL-55BAI 3.0–3.6 BA48A 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm) CY62137CV33LL-55BVI 3.0–3.6 BV48A 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm)
Voltage
Range (V)
Package
Name Package Type
Operating
Range
Document #: 38-05201 Rev. *D Page 10 of 13
Page 11
Package Diagrams
CY62137CV25/30/33 MoBL
48-ball (7.00 mm x 7.00 mm x 1.2 mm) FBGA BA48A
CY62137CV MoBL
® ®
51-85096-*E
Document #: 38-05201 Rev. *D P age 11 of 13
Page 12
Package Diagrams (continued)
CY62137CV25/30/33 MoBL
48-ball VFBGA (6 x 8 x 1 mm) BV48A
CY62137CV MoBL
® ®
51-85150-*A
MoBL is a registered trademark and More Battery Life is a trademark of Cypress Semiconductor Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders.
Document #: 38-05201 Rev. *D Page 12 of 13
© Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than cir cuitry embodi ed in a Cypress S emiconductor product . Nor does it convey or imply any license un der patent or other righ ts. Cypre ss Semiconductor does not autho rize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
Page 13
CY62137CV25/30/33 MoBL
CY62137CV MoBL
Document History Page
Document Title: CY62137CV25/30/33 MoBL® and CY62137CV MoBL® 2M (128K x 16) Static RAM Document Number: 38-05201
REV. ECN NO. Issue Date
** 112393 02/19/02 GAV New Data Sheet (advance information)
*A 114015 04/25/02 JUI Added BV package diagram
*B 117064 07/12/02 MGN Changed from Preliminary to Final *C 118122 09/10/02 MGN Added new part number: CY62137CV with wider voltage (2.7V – 3.6V).
*D 118761 09/23/02 MGN Improved Typ. I
Orig. of Change Description of Change
Changed from Advance Information to Preliminary
Added new SL power bin for new part number. For T For T For TAA = 70 ns, improved t
Improved Max ICC spec to 15 mA (for 55 ns) and 12 mA (for 70 ns). For T Changed upper spec. for Supply Voltage to Ground Potential to V
= 55 ns, improved t
AA
= 70 ns, improved t
AA
spec to 7 mA (for 55 ns) and 5.5 mA (for 70 ns).
CC
= 55 ns, improved t
AA
min. from 45 ns to 40 ns.
PWE
min. from 50 ns to 45 ns.
PWE
min. from 5 ns to 10 ns.
LZWE
min. from 5 ns to 10 ns.
LZWE
Changed upper spec. for DC Voltage Applied to Outputs in High-Z State and DC Input Voltage to V
+ 0.3V.
CC
CCMAX
® ®
+ 0.5V.
Document #: 38-05201 Rev. *D Page 13 of 13
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