Datasheet CY25901 Datasheet (CYPRESS)

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CY25901

Spread Spectrum Clock Generator

Features

• Supports clock requirements for Spread Spectrum

• 40-MHz Spread Spectrum clock output

• Reference clock output

• Two spread bandwidths: 1% , 3%

• External clock or Cera-Lock input

• 3.3V operation

• 8-pin SOIC package

Ta ble 1. Function Table

SSSEL SSON REFOUT

00XIN= XIN ± 0.35% (0.7% center) = XIN ± 0.5% (1.0% center)
1 0 XIN = XIN ± 1.20% (2.4% center) = XIN ± 1.5% (3.0% center)

X (don’t care) 1 XIN = XIN (No Spread) = XIN (No Spread)

Block Diagram

XIN

Oscillator

XOUT

REFOUT

Description

The CY25901 clock generator provi des a low-elec tromagnetic
interference (EMI) clock output. It features Spread Spectrum
technology, a modulation technique designed specifically for
reducing EMI at the fund amental frequency and it s harmonics.

CLKOUT (Spread Spectrum)

CY25901SC CY25901SC-1

Pin Configuration

CLKOUT

VDD

VSS

XIN

1
2
3
4

8
7
6
5

SSON#
REFOUT
SSSEL
XOUT

SSON

SSSEL

Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-07521 Rev. ** Revised February 18, 2003

PLL

CLKOUT

SSCG

CY25901

Pin Description

Pin No. Name I/O Description

1CLKOUTOSpread Spectrum Clock Output. See Table 1 for frequency selections.
2VDD PWRPower Supply.
3 VSS PWR Common Ground.
4XIN IOscillator Buffer Input. Connect to an external parallel resona nt crystal or externally ge nerated

5XOUT OOscill ator Buffer Output. Connect to an external p arallel resonant cryst al. Do not connect when

6 SSSEL I Spread Spectrum Select Input. See Table 1. internally pulled up.
7REFOUTOBuffered Output of XIN.
8 SSON# I Spread Spectrum Enable Input. When asserted low, Spread Spectrum is enabled.

reference clock.

an externally generated reference clock is applied at XIN.

Internally pulled down.

Spread Spectrum Clock Generator

Spread Spectrum Clock Generator (SSCG) is a frequency
modulation techniqu e used to reduce EMI radiatio n generated
by repetitive digital signals, mainly cl ocks. A clock radiates EM
energy at its fundamental frequency as well as its harmonics.
Spread Spectrum distributes this energy over a small
frequency bandwidth, and decreasing the peak value of

Figure 1. Modulation Frequency Profile

0

-10

-20

-30

-40

dBm

-50

-60

-70

-80
38 38 39 39 40 41 41 42 43

Frequ ency( MHz)

radiated energy over the spectrum . This technique is achieved
by modulating the clock around or below the center of its
reference frequency by a certain percentage (which also
determine s the energy distribution bandwidth).

The SSCG function is enabled when SSON pin is set to low.
Resulting in a spread ban dwidth tha t is center spread, amount
as selected by SSSEL (see Table 1).

Spread S pec t rum

SS-ON
SS-OFF

Figure 2. Spread Spectrum

Document #: 38-07521 Rev. ** Page 2 of 5

CY25901

Absolute Maximum Ratings

Parameter Description Condition Min. Max. Unit

V

DD

V

IN

T

S

T

A

T

J

ESD

HBM

UL–94 Flammability Rating @1/8 in. V–0
MSL Moisture Sensitivity Level 1

DC Specifications

Parameter Description Condition Min. Typ. Max. Unit

V

DD

V

IL

V

IH

VthXIN XIN Threshold Voltage XIN 0.3*VDDC 0.5*VDDC 0.7*VDDC V
I

DD

I

IL

I

IH

V

OL

V

OH

C

IN

C

X

PU/PD Pull-up/Pull-down Resist anc e

Core Supply Voltage –0.5 4.6 V
Input Voltage Relative to V

SS

–0.5 VDD+0.5 VDC
Temperature, Storage Non Functional –65 150 °C
Temperature, Operating Ambient Functional –10 85 °C
Temperature, Junction Functional – 150 °C
ESD Protection (Human Body Model) MIL-STD-883, Method 3015 2000 – V

Operating Voltage 3.3V @ ±10% 2.97 3.3 3.63 V
Input Low Voltage
Input High Voltage

Dynamic Supply Current V

[1]

[1]

SSON# and SSSEL ––0.8 V
Inputs 2.2 ––V

= 3.3V and CL = 0 – 20 25 mA

DD

Input Low Current SSSEL = VSS –55 –30 – µA
Input High Current SSON = V
Output Low Voltage I
Output High Voltage I

= 4.0 mA ––0.4 V

OL

= –4.0 mA 2.4 ––V

OH

DD

– 30 55 µA

Input Capacitance SSON# and SSSEL Inputs – 510pF
XIN, XOUT Capacitance

[2]

XIN and XOUT – 5 – pF

[1]

SSON# and SSSEL Inputs 50 100 200 kΩ

AC Specifications

[3]

Parameter Description Condition Min. Typ. Max. Unit

F

IR

E

RXIN

T

DCXIN

T

R

T

F

Input Frequency Range 36 40 44 MHz
XIN Edge Rate XIN driven by external clock – 1 – V/nS
XIN Duty Cycle XIN driven by external clock 40 50 60 %

[4]

[4]

REFOUT, CLKOUT ––3ns
REFOUT, CLKOUT ––3ns

Outputs Rise Time

Outputs Fall Time
BW%1 CY25901SC, Spread % SSON=0,SSSEL = 0 0.5 0.7 0.9 %
BW%2 CY25901SC, Spread % SSON=0,SSSEL = 1 1.7 2.4 3.1 %
BW%3 CY25901SC–1, Spread % SSON=0,SSSEL = 0 0.7 1 1.3 %
BW%4 CY25901SC–1, Spread % SSON=0,SSSEL = 1 2.1 3 3.9 %

[5]

[5]

All output clocks ––3ms
CL = 15pF 45 50 55 %

[5]

CL = 15pF – 110 200 ps

[5]

CL = 15pF – 110 200 ps

T
T
T
T

PU
DC
CCJ
CCJ

Power up to Stable Output

CLKOUT Duty Cycle

REFOUT Cycle to Cycle jitter

CLKOUT Cycle to Cycle jitter
Fmod Frequency Modulation Rate SSON# = GND Internally pulled down – 31 – kHz

Notes:

1. SSSEL has internal pull-up and SSON has pull-down resistors.

2. In applications if a crystal is used for the input reference clock, refer to crystal manufacturer’s specifications for the required crystal load capacitor value.

3. Parameters are guaranteed by design and characterization. Not 100% tested in production. All parameters specified with fully loaded outputs. All outputs
loaded with 15 pF.

4. Measured between 0.2*VDD and 0.8*VDD Volts.

5. Triggering is done at 1.5V VDDC.

Document #: 38-07521 Rev. ** Page 3 of 5

Application Schematic

CY25901

0.1µF

R1

CLKOUT

1

VDD

2

VSS

3

XIN XOUT

4

CL1 CL2

REFOUT

XTAL

SSON#

SSSEL

8

R2

7

6

5

CLKOUT

VDD(3.3V) REFOUT

Figure 3. Application Schematic

Use crystal or cera-lock filter manufacturer’s recommended
values for CL1 and CL2 load capacitors. 0.1-µF bypass
capacitor for power pins should always be used and placed
close to their V
resistors for impedance matching.

pin. R1 and R2 are series termination

DD

Ordering Information

Part Number Package Type Production Flow

CY25901SC–1 8-pin SOIC Commercial, –10°C to +85°C
CY25901SC–1T 8-pin SOIC – Tape and Reel Commercial, –10°C to +85°C
CY25901SC 8-pin SOIC Commercial, –10°C to +85°C
CY25901SCT 8-pin SOIC –Tape and Reel Commercial, –10°C to +85°C

Package Drawing and Dimensions

8-lead (150-Mil) SOIC S8

51-85066-A

All product and company names mentioned in this document are the trademarks of their respective holders.

Document #: 38-07521 Rev. ** Page 4 of 5

© Cypress Semiconductor Corporation, 2003. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than cir cuitry embodi ed in a Cypress S emiconductor product . Nor does it convey or imply any license un der patent or other righ ts. Cypre ss Semiconductor does not autho rize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.

Document History Page

Document Title: CY25901 Spread Spectrum Clock Generator
Document Number: 38-07521

REV. ECN NO. Issue Date

** 124075 02/19/03 RGL New Data Sheet

Orig. of

Change Description of Change

CY25901

Document #: 38-07521 Rev. ** Page 5 of 5