Page 1
CMOS 8-bit Single Chip Microcomputer
Description
The CXP87700 is a CMOS 8-bit single chip
microcomputer of piggyback/evaluator combined
type, which is developed for evaluating the function
of the CXP87740/87748.
Features
• A wide instruction set (213 instructions) which
covers various types of data
– 16-bit operation/multiplication and division/boolean
bit operation instructions
• Minimum instruction cycle 333ns at 12MHz operation (3.0 to 5.5V)
250ns at 16MHz operation (4.5 to 5.5V)
• Applicable EPROM LCC type 27C256, LCC type 27C512
(Maximum 48Kbytes are available)
• Incorporated RAM capacity 1344bytes
• Peripheral functions
– A/D converter 8-bit, 12-channel, successive approximation method
(Conversion time of 20µs/16MHz)
– Serial interface Incorporated 8-bit, 8-stage FIFO
(auto transfer for 1 to 8bytes), 1-channel
8-bit clock synchronous 1-channel
– Timer 8-bit timer
8-bit timer/counter
19-bit time base timer
32kHz timer/counter
– High precision timing pattern generator PPG 19-pin, 32-stage programmable
RTG 5-pin, 2-channel
– PWM/DA gate output PWM output 12-bit, 2-channel
(repetitive frequency 62.5kHz/16MHz)
DA gate pulse output 12-bit, 4-channel
– Servo input control Capstan FG, drum FG/PG, CTL input
– VSYNC separator
– FRC capture unit Incorporated 26-bit and 8-stage FIFO
– PWM output 14-bit, 1-channel
– VISS/VASS circuit Pulse duty auto detection circuit
– Remote control receiving circuit 8-bit pulse measuring counter 6-stage FIFO
• Interruption 21 factors, 15 vectors, multi-interruption possible
• Standby mode Sleep/stop
• Package 100-pin ceramic PQFP
Note) Mask option depends on the type of the CXP87700. Refer to the Products List for details.
Structure
Silicon gate CMOS IC
– 1 –
E93X14B81-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXP87700
100 pin PQFP (Ceramic)
Piggyback/
evaluator type
QFP supported
LQFP supported
Page 2
– 2 –
CXP87700
Pin Assignment in Piggyback Mode (QFP package)
Note) 1. NC (Pin 90) is always connected to VDD.
2. VSS (Pins 41 and 88) are both connected to GND.
3. MP (Pin 39) is always connected to GND.
PB5/PPO13
PB4/PPO12
PB3/PPO11
PB2/PPO10
PB1/PPO9
PB0/PPO8
PC7/RTO7
PC6/RTO6
PC5/RTO5
PC4/RTO4
PC3/RTO3
PC2/PPO18
PC1/PPO17
PC0PPO16
PJ7
PJ6
PJ5
PJ4
PJ3
PJ2
PJ1
PJ0
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
PI6/SO1
PI7/SI1
PE0/INT0
PE1/EC/INT2
PE2/PWM0
PE3/PWM1
PE4/DAA0
PE5/DAA1
PE6/DAB0
PE7/DAB1
PG0/CFG
PG1/DFG
PG2/DPG
PG3/PBCTL
PG4/SYNC0
PG5/SYNC1
PG6/EXI0
PG7/EXI1
AN0
AN1
AN2
AN3
PF0/AN4
PF1/AN5
PF2/AN6
PF3/AN7
AV
DD
AVREF
AVss
PF4/AN8
PH7
PH6
PH5
PH4
PH3
PH2
PH1
PH0
MP
RST
Vss
XTAL
EXTAL
CS0
SI0
SO0
SCK0
PF7/AN11
PF6/AN10
PF5/AN9
PB6/PPO14
PB7/PPO15
PA0/PPO0
PA1/PPO1
PA2/PPO2
PA3/PPO3
PA4/PPO4
PA5/PPO5
PA6/PPO6
PA7/PPO7
NC
V
DD
Vss
TX
TEX
PI1/RMC
PI2/PWM
PI3/TO/DDO/ADJ
PI4/INT1/NMI
PI5/SCK1
A8
A9
A11
NC
OE
A10
CE
D7
D6
A6
A5
A4
A3
A2
A1
A0
NC
D0
A7
A12
A15
NC
V
DD
A14
A13
D1
D2
GND
NC
D3
D4
D5
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
1
40
39
38
37
36
35
34
31
32
33
41
42
43
44
45
46
47
48
50
51
52
53
54
55
56
57
58
59
60
70
69
68
67
63
64
65
66
61
62
71
72
73
74
75
76
77
78
79
80
81
82
83
84
88
87
86
85
89
90
100
99
98
97
96
95
94
91
92
93
49
Page 3
– 3 –
CXP87700
Pin Assignment in Piggyback Mode (LQFP package)
Note) 1. NC (Pin 88) is always connected to VDD.
2. VSS (Pins 39 and 86) are both connected to GND.
3. MP (Pin 37) is always connected to GND.
PE1/EC/INT2
PE2/PWM0
PE3/PWM1
PE4/DAA0
PE5/DAA1
PE6/DAB0
PE7/DAB1
PG0/CFG
PG1/DFG
PG2/DPG
PG3/PBCTL
PG4/SYNC0
PG5/SYNC1
PG6/EXI0
PG7/EXI1
AN0
AN1
AN2
AN3
PF0/AN4
PF1/AN5
PF2/AN6
PF3/AN7
AVDD
AVREF
PB3/PPO11
PB2/PPO10
PB1/PPO9
PB0/PPO8
PC7/RTO7
PC6/RTO6
PC5/RTO5
PC4/RTO4
PC3/RTO3
PC2/PPO18
PC1/PPO17
PC0PPO16
PJ7
PJ6
PJ5
PJ4
PJ3
PJ2
PJ1
PJ0
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
PH7
PH6
PH5
PH4
PH3
PH2
PH1
PH0
MP
RST
Vss
XTAL
EXTAL
CS0
SI0
SO0
SCK0
PF7/AN11
PF6/AN10
PF5/AN9
PF4/AN8
AVss
PB4/PPO12
PB5/PPO13
PB6/PPO14
PB7/PPO15
PA0/PPO0
PA1/PPO1
PA2/PPO2
PA3/PPO3
PA4/PPO4
PA5/PPO5
PA6/PPO6
PA7/PPO7
NC
V
DD
Vss
TX
TEX
PI1/RMC
PI2/PWM
PI3/TO/DDO/ADJ
PI4/INT1/NMI
PI5/SCK1
PI6/SO1
PI7/SI1
PE0/INT0
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1
51
52
53
54
55
56
57
58
59
60
70
69
68
67
63
64
65
66
61
62
71
72
73
74
75
76
77
78
79
80
81
82
83
84
88
87
86
85
89
90
100
99
98
97
96
95
94
91
92
93
2
3
4
5
6
7
8
9
10
11
12
13
14
1
15
16
17
18
19
20
21
22
23
24
25
26
27
28
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
D0
D1
D2
GND
VDD
A14
A13
A8
A9
A11
OE
A10
CE
D7
D6
D5
D4
D3
26
27
28
29
30
33
50
40
39
38
37
36
35
34
31
32
41 42
43
44
45
46
47
48
49
Page 4
– 4 –
CXP87700
Pin Assignment in Evaluator Mode (QFP package)
Note) 1. NC (Pin 90) is always connected to VDD.
2. VSS (Pins 41 and 88) are both connected to GND.
3. MP (Pin 39) is always connected to GND.
PB5/PPO13
PB4/PPO12
PB3/PPO11
PB2/PPO10
PB1/PPO9
PB0/PPO8
PC7/RTO7
PC6/RTO6
PC5/RTO5
PC4/RTO4
PC3/RTO3
PC2/PPO18
PC1/PPO17
PC0PPO16
PJ7
PJ6
PJ5
PJ4
PJ3
PJ2
PJ1
PJ0
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
PI6/SO1
PI7/SI1
PE0/INT0
PE1/EC/INT2
PE2/PWM0
PE3/PWM1
PE4/DAA0
PE5/DAA1
PE6/DAB0
PE7/DAB1
PG0/CFG
PG1/DFG
PG2/DPG
PG3/PBCTL
PG4/SYNC0
PG5/SYNC1
PG6/EXI0
PG7/EXI1
AN0
AN1
AN2
AN3
PF0/AN4
PF1/AN5
PF2/AN6
PF3/AN7
AV
DD
AVREF
AVss
PF4/AN8
PH7
PH6
PH5
PH4
PH3
PH2
PH1
PH0
MP
RST
Vss
XTAL
EXTAL
CS0
SI0
SO0
SCK0
PF7/AN11
PF6/AN10
PF5/AN9
PB6/PPO14
PB7/PPO15
PA0/PPO0
PA1/PPO1
PA2/PPO2
PA3/PPO3
PA4/PPO4
PA5/PPO5
PA6/PPO6
PA7/PPO7
NC
V
DD
Vss
TX
TEX
PI1/RMC
PI2/PWM
PI3/TO/DDO/ADJ
PI4/INT1/NMI
PI5/SCK1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
1
40
39
38
37
36
35
34
31
32
33
41
42
43
44
45
46
47
48
50
51
52
53
54
55
56
57
58
59
60
70
69
68
67
63
64
65
66
61
62
71
72
73
74
75
76
77
78
79
80
81
82
83
84
88
87
86
85
89
90
100
99
98
97
96
95
94
91
92
93
49
A8
A9
A11
NC
HALT
A10
E/P
I/T
MON
A6/D6
A5/D5
A4/D4
A3/D3
A2/D2
A1/D1
A0/D0
NC
RD
A7/D7
A12
A15
NC
V
DD
A14
A13
WR
SYNC
GND
NC
C2
C1
RST
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
Page 5
– 5 –
CXP87700
Pin Assignment in Evaluator Mode (LQFP package)
Note) 1. NC (Pin 88) is always connected to VDD.
2. VSS (Pins 39 and 86) are both connected to GND.
3. MP (Pin 37) is always connected to GND.
PE1/EC/INT2
PE2/PWM0
PE3/PWM1
PE4/DAA0
PE5/DAA1
PE6/DAB0
PE7/DAB1
PG0/CFG
PG1/DFG
PG2/DPG
PG3/PBCTL
PG4/SYNC0
PG5/SYNC1
PG6/EXI0
PG7/EXI1
AN0
AN1
AN2
AN3
PF0/AN4
PF1/AN5
PF2/AN6
PF3/AN7
AVDD
AVREF
PB3/PPO11
PB2/PPO10
PB1/PPO9
PB0/PPO8
PC7/RTO7
PC6/RTO6
PC5/RTO5
PC4/RTO4
PC3/RTO3
PC2/PPO18
PC1/PPO17
PC0PPO16
PJ7
PJ6
PJ5
PJ4
PJ3
PJ2
PJ1
PJ0
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
PH7
PH6
PH5
PH4
PH3
PH2
PH1
PH0
MP
RST
Vss
XTAL
EXTAL
CS0
SI0
SO0
SCK0
PF7/AN11
PF6/AN10
PF5/AN9
PF4/AN8
AVss
PB4/PPO12
PB5/PPO13
PB6/PPO14
PB7/PPO15
PA0/PPO0
PA1/PPO1
PA2/PPO2
PA3/PPO3
PA4/PPO4
PA5/PPO5
PA6/PPO6
PA7/PPO7
NC
V
DD
Vss
TX
TEX
PI1/RMC
PI2/PWM
PI3/TO/DDO/ADJ
PI4/INT1/NMI
PI5/SCK1
PI6/SO1
PI7/SI1
PE0/INT0
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1
51
52
53
54
55
56
57
58
59
60
70
69
68
67
63
64
65
66
61
62
71
72
73
74
75
76
77
78
79
80
81
82
83
84
88
87
86
85
89
90
100
99
98
97
96
95
94
91
92
93
26
27 28
29
30
33
50
40
39
38
37
36
35
34
31
32
41 42
43
44
45
46
47
48
49
2
3
4
5
6
7
8
9
10
11
12
13
14
1
15
16
17
18
19
20
21
22
23
24
25
26
27
28
A15
A12
A7/D7
A6/D6
A5/D5
A4/D4
A3/D3
A2/D2
A1/D1
A0/D0
RD
WR
SYNC
GND
V
DD
A14
A13
A8
A9
A11
HALT
A10
E/P
I/T
MON
RST
C1
C2
Page 6
– 6 –
CXP87700
EPROM Read Timing
(Ta = –20 to +75°C, VDD = 3.0 to 5.5V, Vss = 0V reference)
Address → data
hold time
Address → data
input delay time
Item Symbol Pin Min. Max. Unit
tIH
tACC
A0 to A15
D0 to D7
A0 to A15
D0 to D7
0
100
∗1
75
∗2
ns
ns
tACC tIH
0.8VDD
0.8VDD
0.2VDD
0.2VDD
Input data
Address data
A0 to A15
D0 to D7
Products
Package
Pull-up resistance for reset pin
Power on reset circuit
Input circuit format
∗1
Mask
Optional item
100-pin plastic QFP/LQFP
Existent/Non-existent
Non-existent
CMOS schmitt/TTL schmitt
TTL schmitt
Existent
Non-existent
CMOS schmitt
CXP87748
40Kbytes 48Kbytes
27C512 × 1
27C256 × 2
Piggyback/evaluator product
CXP87700-U01Q
CXP87700-U01R
CXP87700-U02R
100-pin ceramic
PQFP
EPROM 48Kbytes
CXP87740
∗1
On PG4/SYNC0 pin and PG5/SYNC1 pin, the input circuit format can be selected to every pin.
Products List
∗1
At 12MHz operation (VDD = 4.5 to 5.5V)
∗2
At 12MHz operation (VDD = 3.0 to 5.5V), At 16MHz operation (VDD = 4.5 to 5.5V)
ROM capacitance
Page 7
– 7 –
CXP87700
Pin 1 index
Pin 1 marking
LCC type EPROM
Pin 1 marking
Piggyback mode Piggyback/evaluator product
Evaluator mode
CPU probe
Note)
Note) Evaluation cap should be
connected to CPU probe.
Piggyback mode/evaluator mode can be switched as shown below
EPROM adaptor
Pin 1 marking
CPU probe for LQFP
Pin 1 index
U02R used
U01R used
For lower address For upper address
LCC type EPROM
for low voltage
Pin 1 marking
(27C256 only)
Lower address Upper address
Address
Lower
Upper
Memory space EPROM (27C256)
4000
H to 7FFFH 4000H to 7FFFH
8000H to FFFFH
0000H to 7FFFH
(27C512 only)
EPROM adaptor
Pin 1 marking
Page 8
– 8 –
CXP87700
Package Outline Unit: mm
SONY CODE
EIAJ CODE
JEDEC CODE
PACKAGE STRUCTURE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE WEIGHT
CERAMIC
GOLD PLATING
42 ALLOY
10.44 MAX
0.50 ± 0.25
0.15 – 0.02
+ 0.05
3.57 ± 0.36
18.7
16.3 ± 0.2
100 81
31 50
80
51
1
30
9.48
11.66
15.58 ± 0.2
24.7
22.3 ± 0.25
6.0
4.5
0.3 1.27 ± 0.13
12.02
14.22
18.12 ± 0.2
PIN NO. 1 INDEX
INDEX
PQFP-100C-L01
AQFP100-C-0000-A
100PIN PQFP (CERAMIC)
81
80
51
1
30
100
50 31
0.3 ± 0.08
0.65 ± 0.05
PIN No. 1 INDEX
0.7
1.0
1.3 ± 0.3
0.45
5.7g
SONY CODE
EIAJ CODE
JEDEC CODE
PACKAGE STRUCTURE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE WEIGHT
CERAMIC
GOLD PLATING
42 ALLOY
2.2g
PQFP-100C-L02
AQFP100-C-1414-A
100PIN PQFP (CERAMIC)
16.0 ± 0.4
14.0 ± 0.2
12.8 ± 0.2
251
5175
50
26
76
100
INDEX
0.18 – 0.03
+ 0.08
0.5 ± 0.05
12.0 ± 0.15
1.5
3.2 ± 0.2
0.2 – 0.13
+ 0.15
0.127 – 0.02
+ 0.05
3.32
6.9
0.18 – 0.03
+ 0.08
0.5 ± 0.05
12.0 ± 0.15
12.4
INDEX
0.8 ± 0.2
Loading...