Datasheet CXD2306Q Datasheet (Sony)

—1—

E92X12D01

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

Absolute Maximum Ratings (Ta=25 °C)

• Supply voltage AVDD, DVDD 7V

• Input voltage (All pins) VIN VDD + 0.5 to VSS – 0.5 V

• Output voltage IOUT 0 to 15 mA

• Storage temperature Tstg –55 to +150 °C

Recommended Operating Conditions

• Supply voltage AVDD, AVSS 5.0 ± 0.25 V DVDD, DVSS 5.0 ± 0.25 V

• Reference input voltage VREF 0.5 to 2.0 V

• Clock pulse width tPW1, tPW0 5.6 (min.) ns

• Operating temperature topr –20 to +85 °C

Description

The CXD2306Q is a 1-ch 10-bit 80MSPS D/A converter for fine monitor and video, and is ideal for high definition TVs and high resolution displays.

Features

• 10-bit resolution

• Maximum conversion rate 80MSPS

• Differential linearity error ±0.5 LSB

• Low power consumption 150 mW(max.)

(When 80MSPS 200 Ω load, 2 Vp-p is output)

• Single 5 V power supply

• Built-in independent constant-voltage source

• Stand-by function

Structure

Silicon gate CMOS IC

10-bit 80MSPS 1ch D/A Converter

32 pin QFP (Plastic)

CXD2306Q

For the availability of this product, please contact the sales office.

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CXD2306Q

Block Diagram and Pin Configuration

Pin Configuration

17

18

19

20

21

22

23

24

25

CURRENT CELLS

(FOR FULL SCALE)

4LSB'S

CURRENT

CELLS

6MSB'S

CURRENT

CELLS

BIAS VOLTAGE

GENERATOR

BAND GAP

REFERENCE

CLOCK

GENERATOR

DECODER

LACHES

2

3

4 5

6

7

9

10

11

13

14

27

28

30 31 32

1

15

(LSB) D0

D1 D2 D3 D4 D5 D6 D7 D8

(MSB) D9

DV

DD

BLK

DV

DD

DVSS DVSS

CLK

VB CE

IO

AV

SS

IO

VG

AVDD

SREF

IREF

VREF

AV

DD

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

1

27

15

17

25

to to

NC

DVss

VB

DV

DD

NC

CE

BLK

CLK

AVss

NC

DVss

DV

DD

D0 (LSB)

D1

D2

IO

VG

AV

DD

NC

D3

D4

D5

D6

D7

D8

D9 (MSB)

NC

Digital section Analog section

IREF

SREF

VREF

—3—

CXD2306Q

Pin Description and Equivalent Circuit

30 to 32

1 to 7

8, 12,16, 26, 29

9

10

11

13, 28

14

15, 27

17

19

22

D0 to D9

NC

CLK

BLK

CE

DVDD

VB

DVSS

IREF

VREF

VG

I

—

I

—

O

—

O

I

O

Pin No. Symbol I/O Equivalent circuit Description

7

30

DVDD

DVSS

to

10

9

DV

DD

DVSS

11

14

DVDD

DVSS

19

22

17

AVDD

AVSS

Digital input. 30 pin D0 (LSB) to 7 pin D9 (MSB)

NC pin

Clock input

Blanking input. This is synchronized with the clock input signal. No signal (0 V output) at high and output state at low. Chip enable input. This is not synchronized with the clock input signal. No signal (0 V output) at high makes power consumption minimum. Digital power supply

Connect a capacitor of approximately

0.1 µF.

Digital ground Reference current output.

Connect resistance “RIR” which is 16 times output resistance “R”.

Reference voltage input. Sets output full scale value.

Connect a capacitor of approximately

0.1 µF.

—4—

CXD2306Q

18

20, 21

23

24

25

SREF

AVDD

IO

AVSS

O

—

O

—

Pin No. Symbol I/O Equivalent circuit Description

18

AVSS

AVDD

23

24

AVDD

AVSS AVDD

AVSS

Independent constant-voltage source output pin using band gap reference. Stable voltage independent of the fluctuation for supply voltage can be get by connecting to VREF. See Application Circuit 2 for details.

Analog power supply

Inverted current output. Connect to GND normally.

Current output. Output can be retrieved by connecting resistance. The standard is 200 Ω.

Analog ground

tPW1

tPW0

ts

th

ts

th

ts

th

tPD

CLK

DATA

D/A OUT

1.5V

0%

50%

100%

I/O Correspondence Table

(When 2.00 V output full-scale voltage)

MSB LSB

1 1 1 1 1 1 1 1 1 1

:

1 0 0 0 0 0 0 0 0 0

:

0 0 0 0 0 0 0 0 0 0

2.0 V

1.0 V 0 V

Input code

Output

voltage

Description of Operation Timing Chart

—5—

CXD2306Q

Electrical Characteristics

(FCLK=80 MHz, AVDD=DVDD=5 V, ROUT=200 Ω, VREF=2.0 V, RIR=3.3 kΩ, Ta=25 °C)

Electrical Characteristics Measurement Circuit

Analog Input Resistance

Measurement Circuit

Digital Input Current

CXD2306Q

+5.25V

AVDD, DVDD

AVSS, DVSS

V

A

}

Item

Resolution Conversion speed Integral non-linearity error

Differential non-linearity error Precision guaranteed output voltage range Output full-scale voltage Output full-scale current Output offset voltage Glitch energy Differential gain Differential phase

Supply current Analog input resistance

Input capacitance Output capacitance

Digital input voltage

Digital input current SREF output voltage

Setup time Hold time Propagation delay time CE enable time ∗

1

CE disable time ∗

1

Symbol

n FCLK EL

ED VOC VFS

IFS VOS GE DG DP IDD ISTB RIN CI Co VIH VIL IIH IIL VSR ts th tPD tE tD

Measurement conditions

AVDD=DVDD=4.75 to 5.25 V Ta=–20 to +85 °C

Endpoint

When D0 to D9= “0000000000” input

ROUT=100 Ω, 1 Vp-p output

CE=L CE=H VREF

IO AVDD=DVDD=4.75 to 5.25 V Ta=–20 to +75 °C AVDD=DVDD=4.75 to 5.25 V Ta=–20 to +75 °C

CE=H→L CE=L→H

Min.

0

–2.0 –0.5

1.8

9.0

1

2.15

–5

1.0

5.0

1.0

Typ.

10

1.92

9.6

50

2.5

1.3

50

10

1 1

Max.

80

2.0

0.5

2.0

2.0 10

1

30

1

9

0.85 5

1.3

2 2

Unit

bit

MSPS

LSB LSB

V

V mA mV

pV•s

%

deg

mA MΩ

pF pF

V

µA

V

ns ns

ns ms ms

∗1When the external capacitor for the VG pin is 0.1 µF.

—6—

CXD2306Q

Maximum Conversion Rate Measurement Circuit

9

7

30 31

10 11 14

17

19

22

24

10bit

COUNTER

with

LATCH

D0 (LSB)

CLK BLK CE VB

D9 (MSB)

IO

VG

V

REF

IREF

0.1µ

2V

3.3k

AVss

5k

AV

DD

200

OSCILLOSCOPE

0.1µ

•

CLK

80MHz (max)

SQUARE

WAVE

DC Characteristics Measurement Circuit

9

7

30

31

10 11 14

17

19

22

24

CONTROLLER

D0 (LSB)

CLK BLK CE VB

D9 (MSB)

IO

VG

VREF

IREF

0.1µ

2V

3.3k

AVss

5k

AV

DD

200

DVM

0.1µ

•

CLK

80MHz

SQUARE

WAVE

Propagation Delay Time Measurement Circuit

9

7

30

31

10 11 14

17

19

22

24

D0 (LSB)

CLK BLK CE VB

D9 (MSB)

IO

VG

V

REF

IREF

0.1µ

2V

3.3k

AVss

5k

AV

DD

200

OSCILLOSCOPE

0.1µ

FREQUENCY

DEMULTIPLIER

•

CLK

10MHz

SQUARE

WAVE

7

30 31

17

19

22

24

10bit

COUNTER

with

LATCH

D0 (LSB)

CLK BLK CE VB

D9 (MSB)

IO

VG

VREF

IREF

0.1µ

2V

3.3k

AVss

5k

AV

DD

200

OSCILLOSCOPE

0.1µ

DELAY

CONTROLLER

10 11 14

9

DELAY

CONTROLLER

•

CLK

1MHz

SQUARE

WAVE

Setup Time Hold Time Measurement Circuit Glitch Energy

}

—7—

CXD2306Q

Application Circuit 1

AVss

NC

DVss

DVDD

NC

D0

D1

D2

NC

DVss

VB

DV

DD

NC

CE

BLK

CLK

2

3

4

5

6

7

8

1

25

26

27

28

29

30

31

32

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24 IO IO VG AV

DD AVDD SREF

D3 D4 D5 D6 D7 D8 D9 NC

C

R1

C

R3

R4

R2

AVDD

AVSS

DVDD

DVSS

Clock input

• When 5.0V supply voltage (DV

DD and AVDD)

• Digital input from Pins 30 to 32 and Pins 1 to 7

• Pin 18 is left open when using normally

• R1 = 200Ω

• R2 = 3.3kΩ (RIR)

• R3 = 3.0kΩ

• R4 = 2.0kΩ

• C = 0.1µF

VREF IREF

Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.

—8—

CXD2306Q

Application Circuit 2

AVss

NC

DVss

DVDD

NC

D0

D1

D2

NC

DVss

VB

DV

DD

NC

CE

BLK

CLK

2

3

4

5

6

7

8

1

25

26

27

28

29

30

31

32

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24 IO IO VG AV

DD AVDD VREF SREF IREF

D3 D4 D5 D6 D7 D8 D9 NC

C

R1

C

R2

Clock input

AVDD

AVSS

DVDD

DVSS

• When 5.0V supply voltage (DVDD and AVDD)

• Digital input from Pins 30 to 32 and Pins 1 to 7

• R1 = 200Ω

• R2 = 2.0kΩ

• C = 0.1µF

Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.

—9—

CXD2306Q

Notes on Operation

• Selecting the Output Resistance

CXD2306Q is a current output type D/A converter. To create the output voltage, connect the resistor to the current output pin IO. Specifications: Output full-scale voltage VFS = 1.8 to 2.0 [V]

Output full-scale current IFS = 10 or less [mA] Calculate the output resistance from VFS = IFS × ROUT. Connect a resistance sixteen times the output resistance to the reference current pin IREF. In some cases, as this value may not exist, a similar value can be used instead. Note that the VFS will be the following.

VFS = VREF × 16 ROUT/RIR VREF is the voltage set at the VREF pin, ROUT is the resistor to be connected to the current output pin IO and RIR is the resistor to be connected to the IREF. Power consumption can be reduced by increasing the resistance, but this will on the contrary increase the glitch energy and data settling time. Set the best values according to the purpose of use.

• Correlation between Data and Clock For CXD2306Q to display the desired performance as a D/A converter, the data transmitted from outside and the clock must be synchronized properly. Adjust the setup time (ts) and hold time (th) as specified in “Electrical Characteristics”.

• Power supply and ground Separate the analog and digital signals around the device to reduce noise effects. Bypass the power supply pin to each ground with a 0.1 µF ceramics capacitor as near as possible to the pin for both the digital and analog signals.

• Latch up Analog and digital power supply must be able to share the same power supply of the board. This is to prevent latch up caused by potential difference between the two pins when the power is turned on.

• SREF The SREF is an independent regulated voltage source. By connecting it to the VREF, stable output amplitudes that do not depend on fluctuations in the power supply can be obtained. In this case, as VFS = VSR × 16ROUT/RIR, set the VFS according to RIR. Where VSR is the output voltage of SREF. Do not use this pin as the reference power supply for other IC because this pin is for the exclusive use of the CXD2306Q.

• IO pin The IO pin is the inverted current output pin described in the Pin Description. The sum of the currents output from the IO pin and the IO pin becomes the constant value for any input data. However, the performances such as the linearity error of the IO pin output current is not guaranteed.

—10—

CXD2306Q

+5V

C

AV

SS

DVSS

AVSS DVSS

AVDD DVDD

CXD2306Q

C

DV

DD

DIGITAL IC

20 21

28

15

27

25

13

Latch Up Prevention

The CXD2306Q is a CMOS IC which requires latch up precautions. Latch up is mainly generated by the lag in the voltage rising time of AVDD (Pin 20 and 21) and DVDD (Pin 11 and 28), when power supply is ON.

1. Correct usage a. When analog and digital supplies are from different sources

b. When analog and digital supplies are from a common source

(i)

(ii)

AVDD

+5V

AV

SS

DVSS

AVSS DVSS

AVDD DVDD

CXD2306Q

C

DV

DD

DIGITAL IC

20

21

28

15

27

25

13

C

+5V

AVSS

DVSS

AVSS DVSS

AVDD DVDD

CXD2306Q

C

DV

DD

DIGITAL IC

20 21

28

15

27

25

13

C

+5V

—11—

CXD2306Q

2. Example when latch up easily occurs

a. When analog and digital supplies are from different sources

b. When analog and digital supplies are from common source

(i)

(ii)

AVDD

+5V

AV

SS

DVSS

AVSS DVSS

AVDD DVDD

CXD2306Q

DV

DD

DIGITAL IC

20 21

28

15

27

25

13

C C

+5V

C

AV

SS

DVSS

AVSS DVSS

AVDD DVDD

CXD2306Q

DVDD

DIGITAL IC

AVDD

20 21

28

15

27

25

13

C

+5V

AV

SS

DVSS

AVSS DVSS

AVDD DVDD

CXD2306Q

DV

DD

DIGITAL IC

AVDD

20 21

28

15

27

25

13

C

—12—

CXD2306Q

2.0

1.0

2.01.0

Fig. 1. Reference voltage vs. Output full-scale voltage

Output full-scale voltage V

FS

[V]

Reference voltage VREF [V]

100

50

200100

Fig. 2. Glitch energy vs. Output resistance

Glitch energy GE [pV•s]

Output resistance ROUT [Ω]

1.90

1.85

75–25

Fig. 3. Ambient temperature vs. Output full-scale voltage

Output full-scale voltage [V]

Ambient temperature Ta [°C]

0 25 50

0

30

20

401

Fig. 4. Output frequency vs. Supply current

Supply current I

DD

[mA]

Output frequency FO [MHz]

10 20 30

0

1.14

1.10

75–25

Fig. 5. Ambient temperature vs. SREF output voltage

SREF output voltage V

SR

[V]

Ambient temperature Ta [°C]

0 25 50

0

∆V = 0.26mV/°C

∆V = 0.34mV/°C

0 0

Standard masurement conditions and description

• AV

DD=DVDD=5V

• VREF=2.0V

• ROUT=200Ω

• RIR=3.3kΩ

• Ta=25°C

• Input data in Fig. 4=all 0, rectangular wave of all 1, clock freq.=80MHz.

RIR 16ROUT

≈

SONY CODE EIAJ CODE JEDEC CODE

PACKAGE MATERIAL

LEAD TREATMENT

LEAD MATERIAL

PACKAGE MASS

EPOXY RESIN SOLDER PLATING 42 ALLOY

32PIN QFP (PLASTIC)

9.0 ± 0.2

7.0 – 0.1

1.5 – 0.15

(8.0)

0.1 – 0.1

+ 0.2

+ 0.35

+ 0.3

0.50

0.127 – 0.05

+ 0.1

0° to 10°

0.8

0.3 – 0.1

+ 0.15

1

8

9

32

16

1724

25

M

0.24

0.2g

QFP-32P-L01

QFP032-P-0707

0.1

Package Outline Unit : mm

CXD2306Q

—13—