Datasheet CXA3221N Datasheet (Sony)

Page 1
RX Gain Control Amplifier
For the availability of this product, please contact the sales office.
Description
CXA3221N is an RX gain control amplifier suitable
for CDMA cellular/PCS phone.
• Wide gain control range
• Linear gain slope
• Wideband operation (50MHz to 300MHz)
• Very small package (8 Pin SSOP)
• Low voltage operation
• Power save function included
Absolute Maximum Ratings
• Supply voltage VCC 6V
•Operating temperature Topr –55 to +125 °C
• Storage temperature Tstg –65 to +150 °C
• Supply voltage range –0.3 to 6 V
• Logic input voltage –0.3 to VCC + 0.3V
• Signal input voltage –0.3 to VCC + 0.3V
•
Differental signal input voltage
0 to 2.5 V
CXA3221N
8 pin SSOP (Plastic)
Operating Condition
Supply voltage VCC 2.7 to 3.8 V
Applications
CDMA cellular/PCS phone
Structure
Bipolar silicon monolithic IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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E97809-PS
Page 2
Block Diagram
CXA3221N
IF Input for CDMA
Gain control
Supply Voltage
Ground
Power Save
CDMA IN
CDMA INX
GCTL
VCC
GND
PSV
Bias Driver
OUT
OUTX
IF Output
Pin Configuration
GND
CDMA IN
CDMA INX
PSV
8
1
2
3
4
GCTL
V
CC
7
OUTX
6
OUT
5
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Page 3
Pin Description
CXA3221N
Pin No.
1
Symbol
GND
2 CDMA IN
CDMA INX
3
4 PSV
Pin voltage
TYP (V)
0
1.15
1.15
—
Equivalent circuit Description
Ground.
2k2k
Differential input pins for received CDMA IF signal.
GND
2
3
VCC1
Power save function pin.
4
135k
High: Active Low: Power save
5 OUT
OUTX
6
7
VCC
8 GCTL
—
—
3.0
—
5
12.3k 12.3k
8
GND
6
460460
VCC
Differential output pins for received CDMA IF signal. Open collector output.
GND
Positive power supply.
CC1
8k8k
V
Gain control pin.
– 3 –
6k6k
GND
Page 4
Electrical Characteristics
CXA3221N
DC Characteristics
Parameter Symbol Conditions Min. Unit Current consumption 1 Current consumption 2 Input current pin 8H Input current pin 8L Input current pin 16H Input current pin 16L PSV high voltage PSV low voltage
AC Characteristics
Parameter Symbol Conditions Min. Operating frequency
range
ICC1 ICC2 IpsvH IpsvL IgctlH IgctlL VpsH VpsL
Fr
Vpsv = 3.0V, Vgctl = 1.5V, Pin 7 Vpsv = 0 V, Vgctl = 1.5V, Pin 7 Vpsv = 3.0V Vpsv = 0 V Vgctl = 3.0V Vgctl = 0.5V Pin 4 Pin 4
(VCC = 3.0V, Ta = 27°C)
Typ.
Max.
10.2
7
18
5
15 40
mA
1
–15
µA
1
–1
2.5 V
0.5
(VCC = 3.0V, Ta = 27°C)
50
Typ.
Max.
300
Unit
MHz
Gain 2.4 Gain 1.5 Gain 0.6 Gain slope
Input level 3rd order intercept point
Noise Figure
∗1
Adjust GCTL voltage, and set the overall gain to 40dB.
G2.4 G1.5 G0.6 GCLIN
IIP3
NF
f = 210.38MHz, Vgctl = 2.4V Vgctl = 1.5V Vgctl = 0.6V Gain at Vgctl = 2.0V – Gain at Vgctl = 1.0V G = 40dB
f1 = 209.38MHz, f2 = 211.38MHz Measure of 210.38MHz
G = 40dB Measure of 210.38MHz
∗1
∗1
42 –7
–59
58
–42
46 –3
–55
61
–38
5
50
1
–51
64
8
dB
dB/V
dBm
dB
– 4 –
Page 5
Measurement Circuit
CXA3221N
CDMA INPUT
Application Circuit
GND
1
GCTL
8
1k
V8
A8
0.01µ
180n
∗1
1000p
1000p
2
∗
A4
CDMA IN
2
CDMA INX
3
PSV
4
V
CC
OUTX
OUT
7
3
3
∗
∗
150n
150n
6
A7
0.01µ
∗1
1.6k
5
∗
1
TOKO, Inc. B5FL 616DS-1135
∗
2
Coilcraft, Inc. 0805HS-181TKBC
∗
3
Coilcraft, Inc. 0805HS-151TKBC
OUTPUT
VCC
CDMA RX IF INPUT
∗
1000p
∗
1000p
Active
Sleep
GND
1
CDMA IN
2
CDMA INX
3
PSV
4
GCTL
CC
V
OUTX
OUT
0.01µ
1k
8
100p
7
0.01µ
6
∗
5
Gain Control Voltage
1000p
RX IF OUTPUT
1000p
∗
∗
Must be adjusting values to result a best impedance matching between BPF filter and this IC.
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
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Page 6
CXA3221N
Design Reference Values
Single ended measurement (VCC = 3.0V, Ta = 27°C)
Item Input resistance Input capacitance
Symbol Rin Cin
Conditions
Typ.
2.7
1.3
Unit
kΩ pF
f = 210.38MHz, Vgctl = 1.5V
Output resistance Output capacitance
Rout Cout
5.9
0.73
kΩ pF
Notes on Operation
1) This IC is a wideband amplifier with wide gain control range. The decouping capacitors between GND Pin and VCC Pin should be as close to the IC as possible.
2) The resistors connected to Pins 5 and 6 should be as close to the IC as possible.
3) This IC assumes the excellent characteristics when the differential input impedance between Pins 2 and 3 is 500Ω. Refer to the Measurement Circuit for the external element settings, etc.
4) Pay attention to handling this IC because its electrostatic discharge strength is weak.
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Page 7
CXA3221N
60
VCC = 3.0V
40
20
0
–20
Power gain [dB]
–40
–60
–80
0
25
20
Sensitivity
T = –40°C T = 27°C T = 85°C
0.5 1 1.5 2 2.5 3 Vgctl [V]
Noise Figure
VCC = 3.0V
0
–10
–20
–30
IIP3 [dBm]
–40
–50
–60
–80
6
4
IIP3
VCC = 3.0V
T = –40°C T = 27°C T = 85°C
–40
–60 –20 0 20 40 60
Power gain [dB]
Gain Error from Room Temp
VCC = 3.0V
15
10
Noise figure [dB]
5
0
–10
0 2030405060
T = –40°C T = 27°C T = 85°C
10
Power gain [dB]
2
0
Gain error [dB]
–2
–4
–6
–80
–60 –40 –20
Power gain [dB]
T = –40°C T = 85°C
0204060
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Page 8
Package Outline Unit: mm
∗3.0 ± 0.1
8PIN SSOP (PLASTIC)
+ 0.2
1.25 – 0.1
CXA3221N
+ 0.08
0.24 – 0.07
B
0.24 – 0.07
1
+ 0.08
(0.22)
58
0.1
A
∗4.4 ± 0.1
6.4 ± 0.2
4
0.65
0.25
0.13
M
0.1 ± 0.05
0.6 ± 0.15
(0.5)
0° to 10°
+ 0.025
(0.15)
DETAIL
0.17 – 0.015
A
DETAIL B
NOTE: Dimension “∗” does not include mold protrusion.
SONY CODE EIAJ CODE
JEDEC CODE
SSOP-8P-L01
SSOP008-P-0044
PACKAGE STRUCTURE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL PACKAGE MASS
EPOXY RESIN
SOLDER / PALLADIUM
COPPER ALLOY
0.04g
PLATING
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