Datasheet CXA3001N Datasheet (Sony)

CXA3001N

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RX Gain Control Amplifier

Description

CXA3001N is an RX gain control amplifier for

CDMA cellular mobile phone.

Features

• Wide gain control range

• Linear gain slope

• Noise figure Typ. 6dB at Gain = 45dB

• Output IP3 Typ. +2dBm at Gain = 40dB

• 2 input ports

• Power save function included

Absolute Maximum Ratings

• Supply voltage VCC 6V

•Operating temperature Topr –40 to +85 °C

• Storage temperature Tstg –65 to +150 °C

• Allowable power dissipation PD 420 mW

• Supply voltage range –0.3 to 6 V

• Logic input voltage –0.3 to VCC +0.3 V

• Signal input voltage –0.3 to VCC +0.3 V

• Differential signal input voltage 0 to 2.5 V

24 pin SSOP (Plastic)

Operating Conditions

Supply voltage 3.1 to 3.8 V

Applications

• CDMA cellular mobile phone

• CDMA & AMPS cellular phone

Structure

Bipolar sillicon monolithic IC

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

– 1 –

E95711-PP

Block Diagram

CXA3001N

IF Input

for CDMA

IF Input

for FM

Input Select

Gain Control

Supply Voltage

Ground

Power Save

CDMAIN

CDMAINX

FMIN

FMINX

MODE

GCTL

VCC1, 2

GND1, 2

PSV

SWITCH

SWITCH

Bias
Driver

CXA3001N

OUT

OUTX

BP1

BP2

IF Output

to External
Capacitor

– 2 –

Pin Configuration

CXA3001N

CC1

V

GND1

NC

NC

NC

FMIN

NC

1

2

3

4

5

6

CXA3001N

7

8

9

10

MODE PSV

CDMAIN

CDMAINX

23

22

20

19

18

17

16

15

24

21

GCTL

NC

NC

NC

OUTX

NC

OUT

NC

CC2

V

11

FMINX

12

BP1 BP2

14

13

GND2

– 3 –

Pin Description

CXA3001N

Pin
No.

Symbol

1 MODE

Pin voltage

Typ. (V)

Equivalent circuit Description

VCC1

30k

1

Input select pin.
CDMAIN for High.
FMIN for Low.

GND1

2VCC1 3.6 Positive power supply.
3 GND1 0 Ground.
4

6

N.C.

8

No connection.

10

5 CDMAIN

1.2

2k2k

Differential input pins for
received CDMA IF signal.

7 CDMAINX 1.2

9

FMIN

11 FMINX

1.2

1.2

12 BP1

2.4

13 BP2

14

GND2 0

15 VCC2

3.6

16 N.C.

19

12

GND1

5

7

2k2k

Differential input pins for
received FM IF signal.

GND1

9

11

VCC2

Connected to GND with
capacitor 0.01µF.

17

Ground for output stage.

20k

20k

Positive power supply for
output stage.

No connection.

13

17 OUT 1.7

19 OUTX 1.7

Differential output pins for
received IF signal.

GND2

– 4 –

CXA3001N

Pin
No.

Symbol

Pin voltage

Typ. (V)

Equivalent circuit Description

18
20

N.C. No connection.

21
22

VCC1

23

GCTL

23

GND1

VCC1

Gain control pin with a ripple
filter.

Power save function pin.

24 PSV

24

40k

High: Active
Low: Power save

GND1

– 5 –

CXA3001N

Electrical Characteristics
DC characteristics (VCC = 3.6V, Ta = 25°C)

Parameter Symbol Conditions Min. Typ. Max. Unit

Current consumption 1

ICC1

VGCTL = 1.5V, Pin 2

10

14

19

mA

Current consumption 2
Current consumption 3
Current consumption 4
Input current pin 1H
Input current pin 1L

ICC2
ICC3
ICC4
IMODE H
IMODE L

VGCTL = 1.5V, Pin 15
VPSV = 0.5V, Pin 2
VPSV = 0.5V, Pin 15
VMODE = 3V
VMODE = 0.5V

4.7

–20

6.6

9.0
1
1

10

µA

Input current pin 23H
Input current pin 23L
Input current pin 24H
Input current pin 24L
MODE high voltage
MODE low voltage

IGCTL H
IGCTL L
IPSV H
IPSV L
VMH
VML

VGCTL = 3V
VGCTL = 0.5V
VPSV = 3V
VPSV = 0.5V
Pin 1
Pin 1

10

–10

10

–10

3

0.5

V

PSV high voltage
PSV low voltage

VPSH
VPSL

Pin 24
Pin 24

3

0.5

AC characteristics (VCC = 3.6V, Ta = 25°C)

Parameter Symbol Conditions Min. Typ. Max. Unit

Operating frequency range
Gain CDMA2.3

Gain CDMA1.5

Gain CDMA0.7
CDMA Gain slope
Gain FM2.3

Gain FM1.5

Gain FM0.7
FM Gain slope

Input level
3rd order intercept point

FR
GCDMA2.3

GCDMA1.5

GCDMA0.7
GCLIN
GFM2.3

GFM1.5

GFM0.7
GFMLIN

IIP3

VMODE = "H" f = 85.38MHz
VGCTL = 2.3V Level = –50dBm

VMODE = "H"
VGCTL = 1.5V Level = –30dBm

VMODE = "H"
VGCTL = 0.7V Level = –10dBm

VMODE = "H" VGCTL = 1 to 2V
VMODE = "L" f = 85.38MHz

VGCTL = 2.3V Level = –50dBm
VMODE = "L"

VGCTL = 1.5V Level = –30dBm
VMODE = "L"

VGCTL = 0.7V Level = –10dBm
VMODE = "L" VGCTL = 1 to 2V
VMODE = "H"

GCDMA = 40dB

∗

F1 = 86.38MHz
F2 = 87.38MHz
Measure of 85.38MHz

10
37

–7.5

–55

57
37

–7.5

–55

57

–42

41

–3

–49

60
41

–3

–49

60

–38

100

46

1.5

–44

63
46

1.5

–44

63

MHz

dB

dB/V

dB

dB/V

dBm

VMODE = "H"

Noise Figure

NF

GCDMA = 40dB
Used 1MHz BPF
Measure of 85.38MHz

∗

Adjust GCTL voltage, and set the overall gain to 40dB.

∗

– 6 –

6.5

9.5

dB

Measurement Circuit

CXA3001N

CDMA

INPUT

FM
INPUT

1 : 3

1 : 3

V5

V7

V9

V11

V12

V2

A2

1

V

680n

680n

10k

10k
10k

10k

1k

A1

0.01µ

1000p

1.2k

1000p

1000p

1.2k

1000p

0.01µ

MODE PSV

1

CC1

V

2

GND1

3

NC

4

CDMAIN

5

NC

6

CDMAINX

7

NC

8

FMIN

9

NC

10

FMINX

11

BP1 BP2

12

GCTL

NC

NC

NC

OUTX

NC

OUT

NC

CC2

V

GND2

18

17

24

23

22

21

20

19

16

15

14

13

0.01µ

220

220

0.01µ

0.01µ

A24

1k

V24

A23

10k

1000p

1000p

10k

A15

V13

V231k

V19

3 : 1

OUTPUT

V17

V15

– 7 –

Application Circuit

CXA3001N

CDMA RX IF
INPUT

FM RX IF
INPUT

CDMA RX
BPF

FM RX
BPF

CDMA

FM

0.01µ

1000p

∗∗

1000p
1000p

∗∗

1000p

0.01µ

1

2
3
4

5
6
7
8
9

10
11
12

0.1µ

CXA3001

1µ

24
23
22

21
20
19
18
17
16
15
14
13

220

220

0.01µ

0.01µ

1k

0.01µ

Active
Sleep

RX IF
BPF

CC

V

Gain Control
Voltage

RX IF
OUTPUT

∗

Must be adjusting values to result a best impedance matching between BPF filter and this IC.

Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.

– 8 –

CXA3001N

Design Reference Values

Single ended measurement (VCC = 3.6V, Ta = 25°C)

Item Symbol Conditions Typ. Unit
Input resistance
Input capacitance
Output resistance

RIN
CIN
ROUT

f = 85.38MHz, VGCTL = 1.5V

900

9

30

Ω

pF

Ω

Notes on Operation

1) This IC is a wideband amplifier with wide gain control range. Separate Pin 3 (GND1) and Pin 14 (GND2) to
prevent interference between input and output. Furthermore, the decoupling capacitors between Pins 2
and 3, Pins 14 and 15 should be as close to the IC as possible.

2) The resistors connected to Pins 17 and 19 should be as close to the IC as possible.

3) This IC assumes the excellent characteristics when the differential input impedance between Pins 5 and 7,
Pins 9 and 11 is 500Ω. Refer to the Measurement Circuit for the external element settings, etc.

4) Connect the capacitors, which are connected to Pins 12 and 13, to Pin 14 (GND2).

5) Pay attention to handling this IC because its electrostatic discharge strength is weak.

– 9 –

CXA3001N

60

40

20

0

Power gain [dB]

–20

–40

Sensitivity

VCC = 3.6V

T = –40deg
T = 25deg
T = 85deg

–60

0.5

0 1 1.5 2 2.5 3 3.5

VGCTL [V]

IIP3

0

–10

–20

–30

IIP3 [dBm]

–40

Ta = –40deg

–50

–60

Ta = 25deg
Ta = 85deg

–40–60 0–20 4020

VCC = 3.6V

60

Power gain [dB]

– 10 –

CXA3001N

Noise Figure

50

Ta = –40deg

40

30

20

Noise figure [dB]

10

0

–60 60

–40 –20 0 20 40

Power gain [dB]

Ta = 25deg
Ta = 85deg

Gain Error from Room Temp.

6

VCC = 3.6V

VCC = 3.6V

4

2

0

Gain error [dB]

–2

–4

–6

–60 –40 –20 0 20 40 60

Ta = –40deg
Ta = 85deg

Power gain [dB]

– 11 –

Package Outline Unit: mm

CXA3001N

24PIN SSOP (PLASTIC) 275mil

∗7.8 ± 0.1

24

1

+ 0.1

0.22 – 0.05

NOTE : ∗NOT INCLUDE MOLD FINS.

SONY CODE
EIAJ CODE

JEDEC CODE

SSOP-24P-L01
A SIMILAR TO SSOP024-P-0300

13

5.6 ± 0.1

12

0.65 ± 0.12

+ 0.2

1.25 – 0.1

0.10

A

7.6 ± 0.2

+ 0.05

0.15 – 0.02

PACKAGE STRUCTURE

PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE WEIGHT

0.1 ± 0.1

0.5 ± 0.2

0° to 10°

DETAIL A

EPOXY / PHENOL RESIN

SOLDER PLATING
42 ALLOY

– 12 –