Datasheet CXA1870S Datasheet (Sony)

—1—

E95431-TE

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

Absolute Maximum Ratings (Ta=25 °C)

• Supply voltage VCC 12 V

• Operating temperature Topr –20 to +75 °C

• Storage temperature Tstg –65 to +150 °C

• Allowable power dissipation

PD 1.73 W

Recommended Operating Conditions

Supply voltage VCC 9±0.5 V

Description

The CXA1870S is a bipolar IC which integrates the NTSC color TV luminance signal processing, chroma signal processing, sync signal processing, and RGB signal processing onto a single chip.

Features

• I2C bus compatible. Various types of adjustments

and user controls performed with two bus lines

SCL and SDA.

• H and V oscillation frequencies made non-

adjusting with a countdown system.

• Non-adjusting Y system filters (chroma trap, delay

line)

• Built-in V picture distortion correction circuit

• Built-in delay line aperture compensation

• Auto cut-off function for automatic CRT cut-off

adjustment and compensation for changes with

time

• Multiple inputs Composite video: 2 systems (Built-in 2-input, 1-output video switch) Y/C separation input: 1 system On screen display input: 1 system

Applications

• Color TV

Structure

Bipolar silicon monolithic IC

Color TV Y/C/Jungle

42 pin SDIP (Plastic)

CXA1870S

For the availability of this product, please contact the sales office.

—2—

CXA1870S

Block Diagram

COLOR

2f

H

ABL

H PHASE

BOUTGOUTROUT

Y IN

V1 IN V2 IN

C IN

V

CC

TRAP SW

TOT SW

COLOR

SUB HUE

OSD

DRIVE

G DRIVE

B DRIVE

IK

G CUTOFF

B CUTOFF

DC TRAN

SHARPNESS

AFC HLOCK

NR

REF

GAMMA

C MODE

HV COMP

V SHIFT

V SIZE

V LIN

S CORR

V OFF

ABL

PMUTE

R OFF

G OFF

B OFF

SCL

SDA

IREF

H SYNC

REG

AFC

CERA

XRAY

HD

J GND

V SYNC

V PLS

VOSC

VD

ABL IN

ABL LPF

V LPF

V HOLD

HP

H S/S OUT

V BIAS

PICTURE

BRIGHT

SUB BRIGHT

DY COL

AXIS

HUE

SUB COLOR

PRE OVER

BLUE

BLACK

APC

X'TAL

A PED

V GND

IK

R S/H

G S/H

B S/H

OSD BLK

OSD R

OSD G

OSD B

XRAY

LIMIT

RGB LIM

KILLER

I

2

C BUS

DECODER

IREF

REGU

LATOR

H.SYNC

SEP

PHASE

DET.

32fHVCO

1/32

PHASE

DET

PHASE

SHIFT

H.DRIVE

XRAY

VEX

V.SYNC

SEP

V COUNT

DOWN

VOSC

V COMPENSATION

V ZOOMING

BLK

16

18

20

DC

SHIFT

DYNAMIC

COLOR

OSD

MIX

PIC

TURE

RGB

SW

YM

Y/C MIX

CLAMP

AUTO

PEDESTAL

CLAMP

NR

SHARP

NESS

DELAY

TRAP

BUS

CONT

SUB CONT

0/6DB AMP

SW

GAIN

IN

SW

DELAY

AKB

TIMING

CLAMP

OSD BLK

AXIS

CHROMA

DET.

PHASE

SHIFT

3.58M

VCO

LPF

HUE

12

13

14

10

19

17

15

11

21

8

1

2

PHASE

DET.

COLOR

KILLER

TOT

ACC

DET.

3

7

4

6

22

9

31

29

32

26

24

25

23

38

37

36

35

40

34

39

33

30

41

5

27

42

28

SW OUT

—3—

CXA1870S

Pin Configuration

V2 IN

V BIAS

SDA

SCL

V SYNC

H SYNC

H S/S OUT

REG

IREF

AFC

CERA

J GND

HP

XRAY

HD

V PLS

V LPF

V OSC

ABL LPF

VD

ABL IN

X'TAL

V

CC

APC

V1 IN

A PED

Y IN

C IN

V GND

OSD BLK

OSD R

OSD G

OSD B

R S/H

R OUT

G S/H

G OUT

B S/H

B OUT

IK

V HOLD

SW OUT

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21 22

23

24

25

26

27

29

30

31

32

33

35

36

37

38

39

40

41

42

28

34

—4—

CXA1870S

Pin Description

No.

1

2

3

4

22

5

Symbol

X'TAL

APC

VCC

V1 IN V2 IN

V HOLD

voltage

2.6 V

5 V

9 V

2 V

0.7 V

Description

Connect a 3.58 MHz crystal oscillator.

APC lag-lead filter CR connection pin.

Power supply pin.

Video switch input pins. Sync tip clamping is performed, so input via capacitors.

Peak hold pin for V sync separation. Connect a capacitor.

500

4k

1

VCC

1.2k 25k

1.2k

2

VCC

150

1k

55k

50k

5

VCC

150

4

22

VCC

Equivalent circuit

—5—

CXA1870S

No.

6

7

8

9

10

Symbol

SW OUT

Y IN

A PED

C IN

V GND

voltage

—

3.5 V

—

Description

Video switch output pin.

Y signal input pin. Input via a capacitor. Standard input level: 2 Vp-p

Auto pedestal (black elongation) black peak hold pin. Connect a capacitor.

Chroma signal input pin. Standard input level (burst level): 570 mVp-p

Video system (Y/C/RGB) GND pin.

2k

30k

12k

25k

500

6

VCC

VCC VCC

50k

1.2k

7

VCC

6k

30k

9

VCC

16k

20k

1.2k

8

VCC

VCC VCC VCC

Equivalent circuit

—6—

CXA1870S

Pin No.

11

12 13 14

15 17 19

16 18 20

Symbol

OSD BLK

OSD R

OSD G

OSD B

R S/H G S/H B S/H

R OUT G OUT B OUT

voltage

—

Description

Blanking signal input pin for OSD RGB input. 0 to 1 V: Blanking not performed. 2 to 3 V: Signal from Y IN/C IN

lowered by –6 dB.

4 to 6 V: R, G and B outputs

become lower than black level.

Digital R, G and B signal input pins for on screen display. 0 to 1 V: No OSD display. 2 to 3 V: OSD level = 46 IRE

(33 IRE)

4 to 6 V: OSD level = 92 IRE

(65 IRE) Figures in parentheses are for when the I2C OSD register is set to 0.

Sample-and-hold pins for R, G and B AKB (Auto Kinetic Bias). Connect to GND via capacitors.

R, G and B output pins.

40k

15k

2k

60k

30k

2k60k

30k

2k

60k

11

30k

2k

VCC

12 13 14

VCC

1.2k

15 17 19

VCC

150

5k

16 18 20

VCC

VCC VCC

Equivalent circuit

—7—

CXA1870S

Pin No.

21

23

24

25

26

Symbol

IK

ABL IN

VD

ABL LPF

V OSC

Description

Inputs the signal obtained by converting the CRT beam current (Ik) into voltage. Connect to an emitter follower via a capacitor.

ABL voltage input pin.

Vertical deflection sawtooth wave output pin.

ABL signal LPF pin. Connect a capacitor.

Connect a capacitor to generate the V sawtooth wave.

150

21

V

CC

VCC

150

10k

30k

23

V

CC

5k

3k

15k

24k

24

VCC

24k

100k

25

VCC

100

26

VCC

voltage

—

Equivalent circuit

—8—

CXA1870S

Pin No.

27

28

29

30

31

32

Symbol

V LPF

V PLS

HD

XRAY

HP

J GND

Description

Connect a capacitor to hold the AGC voltage which maintains the V sawtooth wave at a constant amplitude.

V pulse output pin. A negative polarity pulse 3 to 3.5 H width is output from this pin. High level: 4.5 V Low level: 0 V

H drive output pin. This pin is output at the open collector.

X-ray protection circuit input pin. When a pulse with a width of 7 V or more is input, HD output becomes low and R, G and B outputs are blanked. This status is maintained until the power supply is turned off. Vilmax = 2.4 V Vihmin = 3.0 V

H pulse input pin. Inputs a 3 to 5 Vp-p signal via a capacitor.

Jungle system (H/V) GND pin.

VCC

27

VCC

20k

29

19k

30k

40k

30k

63k

27k

30

VCC

VCC VCC

VCC

10k

60k

V

CC

VCC

31

74k

18k

28

VCC

voltage

5 V

—

3.3 V

(at no

signal)

—

Equivalent circuit

—9—

CXA1870S

Pin No.

33

34

35

36

37 38

Symbol

CERA

AFC

IREF

REG

SCL

SDA

Description

Connect a 32 fh (503.5 kHz) ceramic oscillator.

AFC lag-lead filter CR connection pin.

Connect a 15 kΩ resistor between this pin and GND.

Regulator pin for voltage generated internally from VCC. Connect a capacitor for stabilization.

I2C bus SCL (Serial Clock) and SDA (Serial Data) pins. Vilmax = 1.5 V Vihmin = 3 V Volmax = 0.4 V

VCC

10k

28k

V

CC

VCC

330

33

VCC

40k

1.2k

V

CC

VCC

34

150

20k

35

VCC

1.2k

40k

4p

36

50µA

VCC

4k

37 38

VCC

voltage

2.3 V

3.2 V

2.6 V

7 V

—

Equivalent circuit

—10—

CXA1870S

Pin No.

39

40

41

42

Symbol

H S/S OUT

H SYNC

V SYNC

V BIAS

Description

H sync separation pulse output. A positive polarity pulse is output from this pin. High level: 4.6 V Low level: 0 V

H sync separation input pin. Inputs a 2 Vp-p video signal via a capacitor and resistor.

V sync separation input pin. Inputs a 2 Vp-p video signal via a capacitor and resistor.

The V oscillator reference voltage is output from this pin.

23k

1.2k

39

V

CC

VCC

150

14k

24k

20k

40

10µA

V

CC

VCC

150

10k

26k

31k

10k

20k

41

20µA

30k

4k

20k

42

V

CC

VCC

voltage

—

2.6 V

3.4 V

3.8 V

Equivalent circuit

—11—

CXA1870S

Electrical Characteristics

Setting conditions

• Ta = 25 °C VCC = 9 V

• I2C bus register should be set to “I2C Bus Register Initial Settings”.

Measurement

conditions

Video In: Sig-H2,H3 AFC: 0 Video In: Sig-H6 AFC: 0 Video In: Sig-H7 AFC: 0 Video In: Sig-H6 AFC: 1 Video In: Sig-H7 AFC: 1 Video In: Sig-H6 AFC: 2 Video In: Sig-H7 AFC: 2

Video In: Sig-H1

Video In: Sig-H1 Video In: Sig-Y11

HPHASE: F Video In: Sig-Y11 HPHASE: 7 Video In: Sig-Y11 HPHASE: 0

Video In: Sig-Y11

No.

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16 17

Item

Horizontal free running frequency Horizontal sync pull-in range

AFC gain 1

AFC gain 2

AFC gain 3

HD output pulse width HD output high level HD output low level Horizontal phase operating range 1 Horizontal phase operating range 2 Horizontal phase operating range 3 HP blanking delay time 1

HP blanking delay time 2

HSS OUT high level HSS OUT low level Overvoltage protection circuit VHT

H system items

Symbol

Hfree

∆H

AFCmax

AFCcen

AFCmin

HD, W

HD, H

HD, L

HPHmax

HPHcen

HPHmin

HPBLK1

HPBLK2

HSS, H

HSS, L

XVTH

Measurement method

Check that I2C register HLOCK is 1.

AFCmax=t1-t2

AFCcen=t1-t2

AFCmin=t1-t2

t1: Video In: Time from fall of Sig-H6 to rise of Pin 31.

t2: Video In: Time from fall of Sig-H7 to rise of Pin 31.

Check that HD appears at 2.4 V and disappears at 2.8 V.

Measurement

pin 29

31

29

20 31

39

30

HSS,H

HSS,L

HPBLK1

HPBLK2

Pin 20

Pin 31

HPH

Pin 20

Pin 31

HD,H

HD,L

HD,W

No.

1

Item

Current consumption 1

Symbol

ICC1

Measurement

conditions

Measurement

3

Measurement method

Measure the VCC pin inflow current.

Min.53Typ.80Max.

110

Unit

mA

Min.

15.60

–400

0.12

—

0.75

24

8.7

0.5

–4.3

–1.5

1.3

—

4

0

2.4

Typ.

15.78

—

0.3

0.5

1.2

26

9

0.8

–3.3

–0.5

2.3

100

4.6

0.1

2.6

Max.

15.96

400

0.48

—

1.75

28

—

1.1

–2.3

0.5

3.3

—

5

0.5

2.8

Unit

kHz

µs

V

µs

ns

V

—12—

CXA1870S

V system items

Measurement

conditions

Video In: Sig-V1

V SHIFT: F

V SHIFT: 0

V SHIFT: 1F

V SIZE: 0

V SIZE: 3F

S CORR: 0

S CORR: F

V LIN: 0

V LIN: F

HV COMP: 0, Pin 23: 6 V HV COMP: 7, Pin 23: 6 V HV COMP: 0, Pin 23: 0 V HV COMP: 7, Pin 23: 0 V

Item

VBias

V PLS high level

V PLS low level VD output

center voltage V SHIFT variable range 1 V SHIFT variable range 2 V SIZE variable range 1 V SIZE variable range 2

S CORR variable range 1

S CORR variable range 2

V LIN variable range 1

V LIN variable range 2

V zooming 1

V zooming 2

Symbol

V

Bias

VPLS, H

VPLS, L

VDcen

VSHIFT–

VSHIFT+

VSIZE–

VSIZE+

∆ Sa

∆ Sc

∆ La

∆ Lc

∆VZ1

∆VZ2

Vb

Vb-VDcen

Vc-Va

Vc-Va Vsa=Va

Vsc=Vc Va-Vsa

Vc-Vsc Vla=Va

Vlc=Vc Va-Vla

Vc-Vlc Vsmin=

Vc-Va Vsmax= Vc-Va Vsmin(Vc-Va) Vsmax(Vc-Va)

Measurement

pin 42

28

24

Video In: Sig-V1

Vc

Vb

Va

GND

VTRIG

0.1ms

8.75ms

16.57ms

Pin 24

VPLS, L

VPLS, H

Measurement method

Measure the pin voltage.

No.

18

19

20

21

22

23

24

25

26

27

28

29

30

31

Unit

V

mV

V

mV

Max.

5

0.5

3.05

–115

140

1.2

1.8

85

–15

140

110

15

100

Typ.

3.8

4.5

0.1

2.9

–125

120

1.1

1.65

65

–35

120

90

3

80

Min.

4

0

2.75

–140

110

0.9

1.5

45

–55

90

60

0

60

—13—

CXA1870S

Measurement

conditions

Video In: Sig-Y1

SUBCONT: F

SUBCONT: 0

TRAP SW: 0

TRAP SW: 1 SHARP

NESS: F SHARP NESS: 7 SHARP NESS: 0

Video In: Sig-Y4,

Y6

DC TRAN: 0

DC TRAN: 7

Pin 8: 3 V

Pin 8: 5 V

Pin 8: 3 V

Pin 8: OPEN

NR: 1

NR: 0

SW GAIN: 1

SW GAIN: 0

No.

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

Item

R output level Sub-contrast

variable range 1 Sub-contrast variable range 2

Trap attenuation

Sharpness characteristics 1 Sharpness characteristics 2 Sharpness characteristics 3

RGB output frequency response

DC transmission rate 1

DC transmission rate 2

Auto pedestal operation 1

Auto pedestal operation 2

NR operation

SW gain 1

SW gain 2

Y system items

Symbol

VR

Gsc, max

Gsc, min

ATTtrap

Gsh,

max

Gsh, cen

Gsh, min

Gfreq

Gdt1

Gdt2

Vdp1

Vdp2

Gnr

Gsw1

Gsw2

20log

Vsc1

VR

20log

Vsc2

VR

20log

Vtr2 Vtr1

20log

Vs2 Vs1

20log

Vf2 Vf1

Vdw-Vdb

Vdpp

Vdw-Vdb

Vdpp

Voff-Von

20log

Von Voff

20log

Vout

Vin

Measurement

16

16 18 20

16

4, 22

6

Video In: Sig-Y1

Video In: Sig-Y2

Video In: Sig-Y4

Video In: Sig-Y5

VR

Vsc1

Vsc2

Vtr1

Vtr2

Vs1

(Sig-Y4)

Vs2

(Sig-Y5)

Vf1

(Sig-Y4)

Vf2

(Sig-Y6)

Vdpp

Vdw

Vdb

Vdpp

Vdw

Vdb

Voff

Von

Voff

Von

Voff

Von

Vin

(Pins 4 and 22)

Vout

(Pin 6)

Measurement method Min.

—

2.2

–3.8

—

5.5

1.5

–7.5

–6

96

73

280

120

–5.5

5.5

–0.5

Typ.

2.5

2.7

–33

–30

7.0

2.5

–5.5

–3.5

99

78

340

170

–4

6

0

Max.

—

3.2

–2.8

–20

8.5

4.5

–4.5

0

100

85

400

220

–2.5

6.5

0.5

Unit

V

dB

%

mV

dB

Video In: Sig-Y3 Video In: Sig-Y1 Video In: Sig-H1 Video In: Sig-Y3 Video In: Sig-Y1 Video In: Sig-H1

Video In: Sig-H1

Video In: Sig-Y10

Video In: Sig-Y7

Video In: Sig-Y1

—14—

CXA1870S

Measurement

conditions Video-In: Sig-H1 C In: Sig-C1, C2 Video-In: Sig-H1 COLOR: 3F SUBCOLOR: F Video-In: Sig-H1 C In: Sig-C3 COLOR: 3F SUBCOLOR: F

COLOR: 3F

COLOR: 0 SUB COLOR

: F SUB COLOR : 0

HUE: 3F

HUE: 0

SUB HUE: F

SUB HUE:0

AXIS: 0

AXIS: 1

Measurement method

Check that the burst frequency is changed to 3579545 ±400 Hz and pulled in.

No.

47

48

49

50 51

52

53

54

55

56

57

58

59

60

61

62

63

64

65

66

67

Item

APC pull-in range 1

Carrier leak

Residual carrier level

Color output level Color variable range 1 Color variable range 2 Sub-color variable range 1 Sub-color variable range 2 Hue variable range 1 Hue variable range 2 Hue variable range 3 Sub-hue variable range 1 Sub-hue variable range 2

Detective axis R1

Detective axis G1 Detective output ratio R1 Detective output ratio G1

Detective axis R2

Detective axis G2

Detective output ratio R2 Detective output ratio G2

C system items

Symbol

∆ f, apc1

Vcl

Vrcl

Vco, cen

Gco,

max

Gco, min

Gsc, max

Gcs, min

ø cen

ø max

ø min

ø s, max

ø s, min

ø r1

ø g1

Gr1

Gg1

ø r2

ø g2

Gr2

Gg2

20log

Vco1 Vco0

20log

Vco2 Vco0

20log

Vsc1 Vco0

20log

Vsc2 Vco0

tan

–1

Vc1-Vc2 Vc4-Vc3

90° + tan

–1

Vr2 Vr1

270° – tan

–1

Vg2 Vg1

Vx VBW

GcomaxVRW

Vx VBW GcomaxVGW 90° + tan–1Vr2

Vr1 270° – tan–1Vg2

Vg1

Vx VBW

GcomaxVRW

Vx VBW

GcomaxVGW

Measurement

pin 20

20

16

18

16

18

16

18

16

18

f=3.58MHz

Vcl

Vrcl

3.58 MHz

component

7.16 MHz

component

and

∆V1

∆V2

Vr1

Vr2

Vg1

Vg2

Vco

f=100kHz

Vco0

Vco1

Vco2

Vsc1

Vsc2

Vc2

Vc1

Vc4

Vc3

During Sig-C4

During Sig-C3

Vx

f=100kHz

Vrg

Vgg

∆V1

∆V2

Vr1

Vr2

Vg1

Vg2

Video In : Sig-H1, C In :Sig-C5

Video In: Sig-H1, C In : Sig-C3,

-C4

Video In : Sig-H1, C In : Sig-C4

-C3

Video In :Sig-H1, C In : Sig-C5

Video In :Sig-H1, C In : Sig-C4,

-C3

Video In :Sig-H1, C In : Sig-C5

Vx

f=100kHz

Vrg

Vgg

Min.

–400

—

0.6

5.4

—

2.1

–5.4

–10

–56

20

–24

7

89

233

0.7

0.26

105

245

0.7

0.26

Typ.

—

0.9

6.0

–50

2.7

–3.7

0

–46

30

–18

13

96

240

0.8

0.3

112

252

0.8

0.3

Max.

400

50

200

1.2

6.6

–40

3.3

–2.0

10

–36

40

–12

19

103

247

0.9

0.34

119

259

0.9

0.34

Unit

Hz

mV

V

dB

deg

—

deg

—

—15—

CXA1870S

Measurement

conditions Video In: Sig-H1

Video In: Sig-H1 C In:Sig-C8, -C9

TOT SW: 1

VIdeo-In: Sig-H1

TOT SW: 0

VIdeo-In: Sig-H1

C In:

Sig-C6

C In:

Sig-C7

No.

68

69

70

71

72

73

74

Item

ACC characteristics 1 ACC characteristics 2

Killer point

Chroma frequency response 1-1 Chroma frequency response 1-2 Chroma frequency response 2-1 Chroma frequency response 2-2

Symbol

Gacc1

Gacc2

KP

Gcf1–

Gcf1+

Gcf2–

Gcf2+

20log

Vacl

Vco0

20log

Vac2 Vco0

20log

Vx

Vref

Vref= Vx (Sig-C5)

Measurement

20

f=100kHz

Vac1

Vac2

Vx

Check that output disappears at -38 dB and appears at -30 dB.

Measurement

conditions

G DRIVE : 1F B DRIVE : 1F G DRIVE : 0 B DRIVE : 0

PICTURE : 0

DY COL : 0

GAMMA

: 0/7

OSD : 0

OSD : 1

No.

75

76

77

78

79

80

81

82

83

84

85

Item

Drive variable range 1

Drive variable range 2

Picture variable range

Dynamic color operation R Dynamic color operation B Gamma characteristics 1 (50 IRE) Gamma characteristics 2 (100 IRE)

OSD level 1

OSD level 2

OSD level 3

OSD level 4

Symbol

Gdr1

Gdr2

Gpic

Gdy, r

Gdy, b

GAM1

GAM2

Vosd1

Vosd2

Vosd3

Vosd4

20log

Vdr1

Vr0

20log

Vdr2

Vr0

20log

Vr1 Vr0

Vdyr

× 100

Vr0 Vdyb

× 100

Vb0

RGB system items

Video In : Sig-H1, Y In : Sig-R1

Video In : Sig-H1 Y In : SigR1

Video In : Sig-H1, Y In : SigR1

Video In : Sig-Y1 OSD BLK : Sig-R3

Vg1 (GAMMA: 7)

–Vg1 (GAMMA: 0)

Vg2 (GAMMA: 0)

Vg2 (GAMMA: 7)

–Vg2 (GAMMA: 0)

Vg2 (GAMMA: 0)

Vr0

Vdr1

Vdr2

Vr1

Vdyr

Vdyb

Vg1

Vg2

V1

VOSD1(3) VOSD2(4)

Measurement method

C In: Sig-C5

-C11

C In: Sig-C10

C In: Sig-C5

-C11

C In: Sig-C10

Min.

–1.0

–3

–38

—

–2.3

–2.7

Typ.

0.1

–1

–34

–3

–1

—

Max.

1.0

0

–30

—

0.2

Unit

dB

Measurement method

Min.

0.7

–5.2

–15.7

94.5

104

10

–8

55

23

82

36

Typ.

1.5

–4.5

–14.7

97

106

18

0

65

33

92

46

Max.

2.2

–3.3

–13.7

98.5

108

26

8

75

43

102

56

Unit

dB

%

IRE

VOSD

× 100

V1

V1=100IRE

Measurement

16, 18

20

18 20

16 18 20

16

20

16 18 20

—16—

CXA1870S

Item

OSD BLK black variation

OSD BLK attenuation

ABL threshold

ABL gain 1

ABL black level 1

ABL gain 2

ABL black level 2 Blanking level Ik clamp level

Ik R level Ik variable

range 1 Ik variable range 2

RGB output DC range 1

RGB output DC range 2

Bright center -R Bright center -G, B Bright variable range 1-R Bright variable range 1-G, B Bright variable range 2-R Bright variable range 2-G, B Sub-bright variable range 1-R Sub-bright variable range 1-G, B Sub-bright variable range 2-R Sub-bright variable range 2-G, B

No.

86

87

88

89

90

91

92 93 94

95

96

97

98

99

100 101 102 103 104 105

106

107

108

109

Symbol

∆ Vosd

Gosd

Vth, abl

Gabl1

Vabl1

Gabl2

Vabl2

Vblk

Vlk, clp

Vlk, r

Vlk, max

Vlk, min

Vref,

max

Vref,

min

Vbcen, r

Vbcen, gb

Vbrt1, r

Vbrt1, gb

Vbrt2, r

Vbrt2, bg

Vsbrt1, r

Vsbrt1, gb

Vsbrt2, r

Vsbrt2, gb

VD– VOSDBLK

20log

V2 V1

Measurement

pin 16

18 20

16 18 20

16

21

16 18 20

16 18 20 16 18 20 16 18 20 16

18 20 16

18 20

Vref

REFP

Vsig

Vlk,b

Vlk,g Vlk,r

Vlk,clp

B

G VIK

Vb

Vp

Video In: Sig-Y1

OSD BLK: Sig-R2 (5V)

OSD BLK: Sig-R2 (3V)

ABL: 3

ABL: 0

16, 18, 20

Measure the R, G and B blanking levels.

VD

VOSDBLK

V2

V1

Vary the voltage applied to Pin 23 and measure the voltage at which picture ABL operates.

Measurement

conditions

Measurement method Min.

–150

–7

1.1

–3.4

100

–8.8

–100

0

1.25

0.76

0.2

–0.64

3.2

0.45

–0.5

–0.46

0.3

0.27 –0.38 –0.36

0.3

0.27

–0.38

–0.36

Typ.

190

–6

1.2

–2.4

200

–6.8

0

0.2

1.35

0.86

0.35

–0.54

3.5

0.85

–0.4

–0.36

0.35

0.32 –0.33 –0.31

0.35

0.32

–0.33

–0.34

Max.

410

–5

1.3

–1.4

300

–4.8

100

0.4

1.45

0.96

0.4

–0.44

4.0

1.25

–0.3

–0.26

0.4

0.37 –0.28 –0.26

0.4

0.37

–0.28

–0.26

Unit

mV

dB

V

dB

mV

dB

mV

V V

V

V V V V V V

V

Video In: Sig-Y1

20log Vp, 5V

Vp, 9V Vb, 5VVb, 9V 20log Vp, 5V

Vp, 9V Vb, 5VVb, 9V

Video In: Sig-Y1

Pin 25: 9 V/5 V

G CUTOFF: F B CUTOFF: F G CUTOFF: 0 B CUTOFF: 0 Vsh: 4.6V (Pins 15, 17 and 19) Vsh: 8V (Pins 15, 17 and 19) BRIGHT: 1F

BRIGHT: 3F

BRIGHT: 0

SUB BRIGHT: 3F

SUB BRIGHT: 0

Video In: Sig-V1

Vlkg, b-Vlk, r

Vref

Vsig-Vref

Vsig (BRIGHT: 1F) –Vsig

—17—

CXA1870S

I2C bus system items

Item

High level input voltage

Low level input voltage

High level input current

Low level input current Low level output voltage

During current inflow of 3 mA to SDA (Pin 38) SDA inflow current

Input capacitance

SCL clock frequency Time the bus must be free before a new

transmission can start Hold time start condition

The Low period of the clock

The High period of the clock

Set up time for start condition

Hold time data

Set-up time data

Rise time of both SDA and SCL lines

Fall time of both SDA and SCL lines

Set-up time for stop condition

No.

110

111

112

113

114

115

116

117

118

119

120

121

122

123

124

125

126

127

Symbol

Vih

Vil

lih

lil

Vol

lol

Ci

fscl

tbuf

thd;sta

tlow

thigh

tsu;sta

thd;dat

tsu;dat

tr

tf

tsu;sto

Min.

3.0

0

—

0

3

—

0

4.7

4.0

4.7

4.0

4.7

5

250

—

4.7

Typ.

—

Max.

5.0

1.5

10

0.4

—

10

100

—

300

—

Unit

V

µA

V

mA

pF

kHz

µs

ns

µs

—18—

CXA1870S

Signals Used for Measurements

H system

4.8µs

0.57V

61.98µs

4.65µs

0.57V

65.215µs

4.96µs

0.57V

59.759µs

4.51µs

0.57V

67.870µs

5.13µs

0.57V

62.563µs

4.73µs

0.57V

SIG-H1

SIG-H2

SIG-H3

SIG-H4

SIG-H5

SIG-H6

SIG-H7

64.583µs

4.88µs

0.57V

63.556µs

f

H=15.734kHz

fH+400Hz

f

H–400Hz

f

H+1kHz

f

H–1kHz

f

H+250Hz

f

H–250Hz

—19—

CXA1870S

Vsync 3H

1H=63.556µs

4.8µs 2.5µs

SIG-v1

Equalizing pulse 3H Equalizing pulse 3H

Equalizing pulse interval 1/2H

Vsync interval 1/2H

f

V=fH / 262

V system

—20—

CXA1870S

4.8µs

9.5µs1.7µs

1.7µs 9.5µs 26µs

4.8µs 0.57V

1.43V

0.7V

f = 3.58MHz

f = 100kHz

f = 3MHz

SIG-Y1

SIG-Y2

SIG-Y3

SIG-Y4

SIG-Y5

0.57V

1.43V

Y system

—21—

CXA1870S

0.7V

0.28V

1.4V

0.7V

0.14V

SIG-Y6

SIG-Y7

SIG-Y8

SIG-Y9

SIG-Y10

SIG-Y11

f = 8MHz

f = 5 MHz

f = 5MHz

f = 9 MHz

63.556µs

4.8µs 0.57V

9.8µs6.6µs

1.43V

—22—

CXA1870S

63.556µs

4.8µs

0.57V

1.7µs

0.5µs

SIG-H1

SIG-C2

SIG-C3

SIG-C5

SIG-C1

SIG-C4

SIG-C6

3µs

35.5µs

fsc+400Hz

0.5Vp-p

fsc+100kHz, 0.1Vp-p

0.5Vp-p

fsc+100kHz, 0.1Vp-p

fsc–400Hz

0.5Vp-p

fsc+100kHz, 0.5Vp-pfsc

0.5Vp-p

fsc0°

35.5µs

0.5Vp-p

fsc0°

fsc+180°, 0.3Vp-p

fsc

1Vp-p

fsc+100kHz, 1.0Vp-p

fsc–90°, 0.3Vp-p

fsc+0°, 0.3Vp-p

fsc+90°, 0.3Vp-p

fH = 15.734kHz

0dB

6dB

C system

—23—

CXA1870S

SIG-C10

SIG-C11

SIG-C7

SIG-H1

63.556µs

4.8µs

0.57V

1.7µs 0.5µs

SIG-C9

SIG-C8

0.5Vp-p

fsc+500kHz, 0.1Vp-p

fsc

0.5Vp-p

fsc–500kHz, 0.1Vp-p

fsc

3µs

50mVp-p

fsc+100kHz, 50mVp-p

fsc

5mVp-p

fsc+100kHz, 5mVp-p

fsc

32mVp-p

fsc+100kHz, 32mVp-p

fsc

–20dB

–30dB

–40dB

fH = 15.734kHz

—24—

CXA1870S

SIG-R1

0.7Vp-p

1.43Vp-p

SIG-R2

3V or 5V

SIG-R3

5V

2.5V

RGB system

—25—

CXA1870S

Measurement Method I2C Bus Register Initial Settings

Register name PICTURE

RGB LIM HUE IN SW COLOR SW GAIN BRIGHT NR ON SHARPNESS SUB CONT SUB HUE SUB COLOR SUB BRIGHT TRAP ON TOT ON PIX ON R ON G ON B ON PRE OVER AXIS

No. of

bits

6 2 6 1 6 1 6 1 4 4 4 4 6 1 1 1 1 1 1 3 1

Initial

setting

3FH

3H

1FH

0H

1FH

0H

1FH

0H 7H 7H 7H 7H

1FH

0H 0H 1H 1H 1H 1H 0H 0H

Description

Maximum value Maximum value Center point V1 IN selected Center point 0 dB gain Center point NR OFF Center point Center point Center point Center point Center point TRAP OFF TOT OFF Picture mute OFF R output ON G output ON B output ON Minimum value JAPAN detective axis

Register name BLACK

DYCOL OFF REF ABL BLUE OSD G DRIVE DC TRAN B DRIVE GAMMA G CUTOFF B CUTOFF H PHASE V ON V EX OFF AFC V SHIFT HV COMP V SIZE C MODE V LIN SCORR

No. of

bits

1 1 2 2 1 1 5 3 5 3 4 4 4 1 1 2 5 3 6 1 4 4

Initial

setting

0H 1H 1H 0H 0H 0H

FH

0H

FH

0H 7H 7H 7H 1H 1H 1H

FH

3H

1FH

0H 7H 7H

Description

BLACK OFF DY COL OFF Center point Minimum value BLUE OFF Luminance level small Center point Minimum value Center point Correction OFF Center point Center point Center point VD output ON V sync elongation OFF Center point Center point Center point Center point Countdown ON Center point Center point

—26—

CXA1870S

Electrical Characteristics Measurement Circuit

VIDEO IN

VCC 9V

12p

470p

0.47µ

15k

47µ

0.01µ

330k

0.47µ

0.22µ

4.7µ

0.1µ

4.7µ

0.1µ film

X RAY 0V

2.2k

15k

0.01µ

5.6k

2.2µ

4700p560

0.22µ

V2 IN

V BIAS

SDA

SCL

V SYNC

H SYNC

H S/S OUT

REG

IREF

AFC

CERA

J GND

HP

XRAY

HD

V PLS

V LPF

V OSC

ABL LPF

VD

ABL IN

X'TAL

V

CC

APC

V1 IN

A PED

Y IN

C IN

V GND

OSD BLK

OSD R

OSD G

OSD B

R S/H

R OUT

G S/H

G OUT

B S/H

B OUT

IK

V HOLD

SW OUT

4.7µ

2.2k

C IN

3/5 V

6.7V

0.1µ

10µ

9/5 V

HP

GEN.

CXA1870S

∗

2

I

C

0/6V

500 kHz ceramic oscillator

0.22µ film

220k

10k

100p

3.3k

330 1µ

1

2

3

4

5

8

9

10

11

12

13

14

15

16

17

18

19

20

21

6

7

22

23

24

25

26

27

28

32

33

34

35

36

37

38

39

41

42

40

31

30

29

∗Pin 15, 17, 19 and 21 switches are ON only for

electrical characteristic measurements No. 93 to 96.

CRT

DRIVE

2.2K

—27—

CXA1870S

Reference Circuit

+9V

1.1k

110k

1.1k 110k 1.1k 110k 68k

2SC 2785

2SA 1175

2SA1175

GND

2SC 2785

1k 470 1k 470 1k 470

47k

100

to IK of the IC

from Pins R, G and B OUT of the IC

CRT Drive Circuit

+9V

470p

68 k

1µ

3.3k

HD

10k

6.8k

Pulse width 12 µs

0.022µ HP

Delay 10µs

1000 p

1 2 3 4 5 6 7 8

910111213141516

4538

10k

HP Gen

—28—

CXA1870S

Application Circuit

+9V

12p

3.58MHz X'TAL

470p

0.47µ 15k

47µ

0.01µ

330k

0.47µ

0.22µ

4.7µ

10k 47p

47k

0.47µ

100

1.5k

1µ

4.7µ

0.22µ film

0.1µ film

100p

1µ

10k

1µ

2.2k

15k

0.01µ

5.6k

2.2µ

560

0.22µ

220

0.22µ

220

V2 IN

V BIAS

SDA

SCL

V SYNC

H SYNC

H S/S OUT

REG

IREF

AFC

CERA

J GND

HP

XRAY

HD

V PLS

V LPF

V OSC

ABL LPF

VD

ABL IN

X'TAL

V

CC

APC

V1 IN

A PED

Y IN

C IN

V GND

OSD BLK

OSD R

OSD G

OSD B

R S/H

R OUT

G S/H

G OUT

B S/H

B OUT

IK

V HOLD

SW OUT

220

4.7µ

1µ

4700 p

2

I

C

2.2k

Composite video 1 input

0.1µ film

Ik input

0.1µ film

H SYNC SEP output

500 kHz ceramic oscillator

H drive output

V pulse output

ABL input

220k

330

100p

3.3k

10k

220

X-ray protection circuit input

H pulse input OSD inputs

RGB outputs

2.2k

1

2

3

4

5

6

7

8

10

15

17

19

21

14

13

12

11

18

16

20

9

22

23

24

25

26

27

28

32

33

34

35

36

42

40

41

31

30

29

37

38

39

Composite Video 2 input

V drive output

Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.

—29—

CXA1870S

Description of Operation

1. Synchronizing and picture distortion correction systems The video signals (2 Vp-p standard) input to Pins 40 and 41 are led to the horizontal and vertical sync separation circuits for sync separation. The horizontal sync signal is output from Pin 39 with positive polarity. This horizontal sync signal is compared with the signal obtained by 1/32 frequency dividing the 32 fH VCO output using the ceramic oscillator (frequency: 503.5 kHz) to detect a phase difference. The error voltage resulting from the phase difference is applied to the H oscillator after attenuating the medium and high frequency components by a lag-lead filter. The phase of the H oscillator output is compared and shifted to match the phase of the H deflection pulse (flyback pulse) input from Pin 31, and then output from Pin 29. After the vertical sync signal is synchronized to the input signal by the V countdown system, a sawtooth wave is generated by charging and discharging the capacitor attached externally to Pin 26. AGC is performed to ensure that the amplitude of the sawtooth wave is maintained constant regardless of the vertical frequency of the input, after which the sawtooth wave passes through the picture distortion correction circuit and is output from Pin 24. Note that there is no need to adjust the free running frequency for either the H or V oscillator. When voltage of 3 V or more is applied to Pin 30, the H drive output is held at low level. A time constant circuit is included to protect against overvoltages, and H drive is output normally when high voltage input continues for less than 7 V cycles. To release holddown, the IC must be turned off and then started up again.

Note)

When the external capacitance at Pin 27 is used with 0.1 µF below of recommended value, VD output at Pin 24 may be unstable. When changing capacitance value, use it more than 0.047 µF.

2. Y/C system The Y/C system has the following three input systems.

Composite video input (1 Vp-p/2 Vp-p) 2 systems (The gain can be switched between 0 and 6 dB

for both systems.)

Y/C separation input (2 Vp-p) 1 system

The Y signal (specified input level 2 Vp-p) input to Pin 7 is passed through the sub-contrast control, chroma trap (or delay line), delay line, sharpness control, noise reduction, clamp and auto pedestal circuits. The signal is then mixed with the color difference signal, passed through the clamp and Y/C MIX circuits again, and input to the RGB interface system block. Since a built-in chroma trap is provided, the video signal can be directly input. Trap frequency adjustment is not necessary as a dummy filter is provided inside the IC and feedback is applied using the 3.58 MHz signal generated by a crystal oscillator for reference. When the chroma trap is off, the Y system frequency response is approximately 8 MHz, –3 dB for R, G and B outputs. Sharpness control is delay line type with a variable PRE/OVER ratio. Dynamic picture control consists of pulling in the signal below 40 IRE to the black side so that the signal black peak held by Pin 8 becomes the pedestal level. The chroma signal (specified input level, burst 570 mVp-p, or video signal 2 Vp-p) input to Pin 9 is passed through the ACC, TOT, color control (saturation control) and killer detection circuits, after which the burst locked VCO oscillation output is detected as the carrier. (The detective output LPF is a quadruple.)

—30—

CXA1870S

The signal is then separated into color difference signals R-Y, B-Y and G-Y by the matrix circuit, passed through the Y/C MIX circuit, and input together with the Y signal to the RGB interface system block. The detective axis (Japan/US) can be switched by the I2C bus register.

3. RGB interface system YS/YM switching is performed according to the amplitude of the OSD RGB input blanking signal input from Pin 11.

0 to 1.5 V TV (Y/C input)

1.5 to 3.5 V TV –6 dB

3.5 to 5.5 V Black The R, G and B signals of the Y/C system pass through the RGB switch (BLUE and BLACK ON/OFF) and receive picture control. These signals are mixed with the digital R, G and B signals (specified input level 0 to 5 V DC) input from Pins 12, 13 and 14, passed through the dynamic color, gamma correction, bright control, drive adjustment (R channel is fixed, G and B channels are variable.), cut-off adjustment (R channel is fixed, G and B channels are variable.) and auto cut-off DC level shift circuits, and then output from Pins 16, 18 and 20 as the R, G and B signals. The RGB output amplitude has a limit voltage whose setting value can be controlled with the I2C bus register. The digital R, G and B signals are mainly used for on screen display of channels, etc. and the display level can be set with the I2C bus register. The signal input to Pin 23 (ABL IN) is compared with the internal reference voltage and is then integrated by the capacitor connected to Pin 25 (ABL LPF) for picture and brightness control. Picture ABL mode and combined picture ABL and brightness ABL mode can be switched with the I2C bus register.

Note)

When the digital R, G and B signals and OSDBLK signal are not used, connect Pins 11, 12, 13 and 14 to GND.

Auto cut-off

For white balance, drive control (gain control between R, G and B outputs) and cut-off control (black side DC level control) are involved. This IC uses the I2C bus register for drive control. For cut-off control, a loop is formed between the IC and CRT to achieve auto cut-off control. This auto cut-off arrangement makes it possible to compensate for CRT changes with time. To absorb the CRT variance, the cut-off voltages of the G and B outputs are adjusted by the I2C bus register. The auto cut-off loop is configured as described below.

(1) R, G and B reference pulses for auto cut-off, shifted 1H each in the order mentioned, are added to

the top of the picture. (2) The IK of each of the R, G and B outputs is converted to a voltage and input to Pin 21. (3) The voltage input to Pin 21 is compared with the reference voltage in the IC to change the DC level

of the reference pulses.

The loop mentioned above determines the shift level of the R, G and B outputs and lets the capacitances connected to Pins 15, 17 and 19 hold the DC shift level during the 1 V period. If the voltage at any one of Pins 15, 17 or 19 is less than 4.2 V, the status register IK (bit 6) becomes “1”. Use this information to blank the R, G and B outputs with the I2C bus register. The positions of the reference pulses can be changed by the I2C bus register.

—31—

CXA1870S

Definition of I2C Bus Registers

Slave addresses

88H: Slave receiver 89H: Slave transmitter

Register table

• All registers are set to 0 when the IC power is turned on.

• “X” indicates “don’t care”; “∗” indicates undefined.

Control registers

bit 3 bit 2 bit 1 bit 0

RGB LIM

∗ IN SW ∗ SW GAIN ∗ NR ON

SUB CONT

SUB COLOR

TRAP ON TOT ON

PRE OVER AXIS

ABL BLUE OSD

DC TRAN

GAMMA

B CUTOFF

V ON VEX OFF AFC

HV COMP

0 C MODE

S CORR

bit 7 bit 6 bit 5 bit 4

PICTURE

HUE

COLOR

BRIGHT

SHARPNESS

SUB HUE

SUB BRIGHT PIX ON R ON G ON B ON BLACK DY COL OFF REF

G DRIVE

B DRIVE

G CUTOFF

H PHASE

VSHIFT

V SIZE

V LIN

Sub Address

XXXX0000 XXXX0001 XXXX0010 XXXX0011 XXXX0100 XXXX0101 XXXX0110 XXXX0111 XXXX1000 XXXX1001 XXXX1010 XXXX1011 XXXX1100 XXXX1101 XXXX1110 XXXX1111

bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit0

H LOCK IK KILLER XRAY 0 0 0 0

Status register

—32—

CXA1870S

Description of I2C Bus Registers

PICTURE (6): Picture control

0 = Minimum 63 = Maximum

RGB LIM (2): RGB output amplitude limiter voltage control

0 = Limited at 4.9 V (with a black level of 2 V) 1 = Limited at 5.1 V (with a black level of 2 V) 2 = Limited at 5.3 V (with a black level of 2 V) 3 = Limited at 5.5 V (with a black level of 2 V)

HUE (6): Hue control

0 = Skin color nearer to red 63 = Skin color nearer to green

IN SW (1): Input selector switch

0 = V1 IN 1 = V2 IN

COLOR (6): Color control

0 = Minimum 63 = Maximum

SW GAIN (1): Switch output gain switching

0 = SW GAIN 0 dB 1 = SW GAIN 6 dB

BRIGHT (6): Brightness control

0 = Minimum 63 = Maximum

NR ON (1): Y signal noise reduction ON/OFF

0 = OFF 1 = ON

SHARPNESS (4): Sharpness control

0 = Minimum 15 = Maximum

SUB CONT (4): Sub-contrast control

0 = Minimum 15 = Maximum

Sub Address

0000

Sub Address

0001

Sub Address

0010

Sub Address

0011

Sub Address

0100

—33—

CXA1870S

SUB HUE (4): Hue center control

0 = Skin color nearer to red 15 = Skin color nearer to green

SUB COLOR (4): Color center control

0 = Minimum 15 = Maximum

SUB BRIGHT (6): Sub-bright control

0 = Minimum 63 = Maximum

TRAP ON (1): Chroma trap in Y system ON/OFF

0 = OFF 1 = ON

TOT ON (1): Chroma TOT filter ON/OFF

0 = OFF 1 = ON

PIX ON (1): Picture mute ON/OFF

0 = Picture mute (Auto cut-off reference pulse also muted.) 1 = Picture mute released.

R ON (1): R OUT ON/OFF

0 = R OUT OFF 1 = R OUT ON

G ON (1): G OUT ON/OFF

0 = G OUT OFF 1 = G OUT ON

B ON (1): B OUT ON/OFF

0 = B OUT OFF 1 = B OUT ON

PRE OVER (3): Sets the sharpness preshoot and overshoot ratio.

0 = Pre Shoot 100 %, Over Shoot 0 % 7 = Pre Shoot 25 %, Over Shoot 75 %

AXIS (1): Detective axis switching

0 = JAPAN 1 = USA

Sub Address

0101

Sub Address

0110

Sub Address

0111

—34—

CXA1870S

BLACK (1): Blanks the Y IN/C IN signals and sets the R, G and B outputs to black level.

0 = OFF 1 = ON

DY COL OFF (1): Dynamic color ON/OFF

0 = Dynamic color ON 1 = Dynamic color OFF

REF (2): Switches the auto cut-off reference pulse position.

0 = B-18H G-19H R-20H 1 = B-20H G-21H R-22H 2 = B-22H G-23H R-24H 3 = B-24H G-25H R-26H

ABL (2): ABL mode setting

0 = Picture ABL mode (including protective bright ABL) 1 = Combined picture ABL and bright ABL mode (bright ABL low) 2 = Combined picture ABL and bright ABL mode (bright ABL medium) 3 = Combined picture ABL and bright ABL mode (bright ABL high)

BLUE (1) On screen display B IN ON/OFF. Setting to ON turns the entire screen blue.

0 = OFF 1 = ON

OSD (1): On screen display luminance setting

0 = Level small 1 = Level large

G DRIVE (5): G OUT drive control

0 = Minimum 31 = Maximum

DC TRAN (3): DC transmission ratio setting

0 = Maximum (100 %) 7 = Minimum(75 %)

B DRIVE (5): B OUT drive control

0 = Minimum 31 = Maximum

GAMMA (3): γ correction value setting

0 = Correction OFF 7 = Maximum correction

Sub Address

1000

Sub Address

1001

Sub Address

1010

—35—

CXA1870S

G CUTOFF (4): G OUT cut-off voltage control

0 = Minimum 15 = Maximum

B CUTOFF (4): B OUT cut-off voltage control

0 = Minimum 15 = Maximum

H PHASE (4): Horizontal position control

0 = Screen shifted to right 15 = Screen shifted to left

V ON (1): VD output ON/OFF

0 = VD output stopped. (Picture mute applied simultaneously. Auto cut-off

reference pulse also muted.)

1 = VD output

V EX OFF (1): V sync elongation ON/OFF

0 = V sync elongation ON 1 = V sync elongation OFF

AFC (2): AFC loop gain switching

0 = AFC loop gain large 1 = AFC loop gain medium 2 = AFC loop gain small 3 = AFC loop open, free running mode

V SHIFT (5): Vertical position control

0 = Rise 31 = Lower

HV COMP (3): Vertical correction amount setting for high voltage fluctuations

0 = Correction amount minimum 7 = Correction amount maximum

V SIZE (6): Vertical amplitude control

0 = V size minimum 63 = V size maximum

C MODE (1): V countdown system mode switching

0 = Non-standard signal mode, standard signal mode and no signal mode

switched automatically.

1 = Fixed to non-standard signal mode (wide V sync window mode).

Sub Address

1011

Sub Address

1100

Sub Address

1101

Sub Address

1110

—36—

CXA1870S

V LIN (4): Vertical linearity control

0 = Top of screen compressed, bottom of screen expanded. 15 = Top of screen expanded, bottom of screen compressed.

S CORR (4): Vertical S correction control

0 = S correction amount minimum 15 = S correction amount maximum

Sub Address

1111

H LOCK (1): Returns whether the H oscillator of the IC and the signal input to H SYNC are locked.

0 = Not locked 1 = Locked

IK (1): Returns the AKB loop stable status by detecting the IK current.

0 = IK current stable for each of R, G and B 1 = IK current unstable

KILLER (1): Returns the color killer ON/OFF status.

0 = OFF 1 = ON

XRAY (1): Returns the X-ray protection status.

0 = OFF (X-ray protection is not functioning.) 1 = ON (X-ray protection is functioning.)

—37—

CXA1870S

1 2 3 4 5 6 7 8

Fig 1. Sharpness characteristics

Attenuation (dB)

0

–2.0

–4.0

–6.0

2.0

4.0

6.0

8.0

0

Fig 2. Chroma frequency characteristics

(dB)

–6.0

–8.0

–10.0

–4.0

–2.0

0

2.0

–800 –600 –400 –200 0 200 400 600 800

1 2 3 4 5 6 7 8

Fig 3. Trap F0 frequency characteristics

Attenuation (dB)

0

–30

0

–20

–10

TRAPSW = 0 TRAPSW = 1

10 20 30 40 50 60

Fig 4. Auto pedestal characteristics

Output amplitude (black to white) (Vp-p)

0.5

0

1.0

Frequency

(MHz)

Input

amplitude

(IRE)

Fig 5. Gamma characteristics

Output amplitude (Vp-p)

Input

amplitude

(IRE)

20 40 60 80 1000

2.0

1.0

GAMMA = 7 GAMMA = 3 GAMMA = 0

SHARPNESS = F SHARPNESS = 7 SHARPNESS = 0

TOT SW = 1

TOT SW = 0

∆fsc (kHz)

fsc = 3.58MHz

Input

frequency

(MHz)

Input: IRE changed at Full Flat Output: R OUT

DYCOL= AKB=OFF GAMMA=DCTRAN=0

—38—

CXA1870S

Fig 7. Cutoff control characteristics

IK level (Vp-p)

0.5

1.0

0 5 A F

1.3

VD-output amplitude (Vp-p)

1.35

1.4

8 10 18 20 28 30

1.0

Fig 9. Picture control data (HEX)

Output amplitude (black to white) (Vp-p)

0

2.0

2 4 6 8 10

Fig 8. HV COMP characteristics

0

7 F

Fig 6. G, B drive characteristics

Output amplitude (black to white) (Vp-p)

0

3.0

G, B

drive data

(HEX)

17 1F

2.5

2.0

1.5

Rch = 0.86 Vp-p

3.0

38 3F

ABL IN

Applied

voltage (V)

Variable range 14.7dB

Gch = Bch = –4.5dB

Gch = Bch = +1.5dB

Input: Y IN 1.4Vp-p (black to white) Output: adjust to be 2.5Vp-p at R OUT

DYCOL = AKB = OFF DCTRAN = 0

–8.3dB

+3.0dB

Input: Y IN all black AKB = ON Output: IK (Pin 21)

G, B

cutoff data

(HEX)

Output: VD (Pin 24) HV COMP = 7

Input: YIN 1.4Vp-p (black to white) Output: ROUT

SUBCONT = 7 DYCOL = AKB = OFF

DCTRAN = 0

—39—

CXA1870S

Fig 11. ABL characteristics (bright)

Output black level (V)

1.2

1.8

0

1.0

Output level (Vp-p)

2.0

3.0

1.0 2.0 3.0 4.0 5.0

1.0

Fig 13. OSD-BLK voltage

Output amplitude (black to white) (Vp-p)

0

2.0

1 2 3 4 5

Fig 12. OSD RGB I/O characteristics

0

1 2

Fig 10. ABL characteristics (picture)

Output amplitude (white to black) (Vp-p)

0

2.5

3 4

2.0

1.5

1.0

3.0

6

5 6 7 8 9

0.5

ABL-FIL

applied voltage (V)

1 2 3 4 5 6 7 8 9

1.4

1.6

ABL3

ABL0

ABL3

OSDR

applied voltage (V)

OSD = 1

OSD = 0

OSD-BLK

applied voltage (V)

Input YIN 2.0Vp-p R OUT

PIC = 3F SUBCONT = 7

DCTRANT = 0 AKB = OFF

ABL0

ABL-FIL

applied voltage (V)

Input OSDR Output ROUT

100IRE = 2.5Vp-p

Input YIN 1.4Vp-p (black to white) Output R

OUT

PIC = 3F SUBCONT = 7 AKB = OFF

–5.7dB

Package Outline Unit : mm

CXA1870S

42PIN SDIP (PLASTIC)

+ 0.4

37.8

– 0.1

42

1

1.778

0.5 ± 0.1

0.9 ± 0.15

Two kinds of package surface:

1.All mat surface type.

2.Center part is mirror surface.

SONY CODE

EIAJ CODE

JEDEC CODE

SDIP-42P-02 SDIP042-P-0600

22

– 0.1

+ 0.3

13.0

15.24 ± 0.25

21

– 0.1

+ 0.4

0.5 MIN

4.6

3.0 MIN

PACKAGE STRUCTURE

PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL

PACKAGE MASS

– 0.05

+ 0.1

0.25

EPOXY RESIN SOLDER PLATING 42/COPPER ALLOY

4.4g

0° to 15°

—40—