Page 1
1
Features
■ Low Quiescent Current
■ Adjustable Output:
5V to 12V
■ for Sleep Mode
Control
■ 100mA Output Current
Capability
■ Fault Protection
+60V Load Dump
-15V Reverse Voltage
Short Circuit
Thermal Shutdown
■ Low Reverse Current
(Output to Input)
ENABLE
Package Options
CS8271
CS8271
Description
The CS8271 is an adjustable micropower voltage regulator with very
low quiescent current (60µA typical
at 100µA load). The output supplies
100mA of load current with a maximum dropout voltage of only
600mV. Control logic includes
. The combination of low
quiescent current, outstanding regulator performance and control
logic makes the CS8271 ideal for
any battery operated equipment.
The logic level compatible
pin allows the user to put the regu-
lator into a shutdown mode where it
draws only 50µA of quiescent current.
The regulator is protected against
reverse battery, short circuit, over
voltage, and over temperature conditions. The device can withstand
60V load dump transients making it
suitable for use in automotive environments.
The CS8271 is pin compatible with
the National Semiconductor
LM2931.
ENABLE
ENABLE
Block Diagram
1
V
OUT
Gnd
NC
Adj
V
IN
NC
NC
ENABLE
Other Packages: Consult factory for
16L SO Batwing, 5L TO-220 and D
2
PAK.
8L SOIC & PDIP
Adjustable Micropower Low Dropout
Linear Regulator with
ENABLE
A Company
¨
Rev. 3/26/97
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
V
ENABLE
Input
V
IN
Current Source
(Circuit Bias)
Over
Voltage
Shutdown
OUT
Current Limit
Thermal
Shutdown
Bandgap
Reference
+ -
Error
Amplifier
Sense
Adj
Gnd
Page 2
2
Power Dissipation.............................................................................................................................................Internally Limited
Transient Input Voltage ..................................................................................................................................................-50V, 60V
Reverse Battery..........................................................................................................................................................................-15V
Output Current .................................................................................................................................................Internally Limited
ESD Susceptibility (Human Body Model)..............................................................................................................................2kV
Junction Temperature .............................................................................................................................................-40¡C to 150¡C
Storage Temperature...............................................................................................................................................-55¡C to 150¡C
Lead Temperature Soldering
Wave Solder (through hole styles only) .....................................................................................10 sec. max, 260¡C peak
Reflow (SMD styles only) ......................................................................................60 sec. max above 183¡C, 230¡C peak
Adj and Enable Output ..................................................................................................................................................-0.3V, 10V
V
OUT
...........................................................................................................................................................................-0.3V, 20V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Absolute Maximum Ratings
Electrical Characteristics: V
OUT
+ 1V ² VIN² 30V, 5V ² V
OUT
² 12V, I
OUT
= 10mA, -40¡ ² TA ² 125¡, -40¡ ² TJ ² 150¡,
V
ENABLE
= 0V; unless otherwise specified.
CS8271
■ Output Voltage
Dropout Voltage I
OUT
= 100µA, V
DROP
= (VINÐ V
OUT
) 100 150 mV
I
OUT
= 100mA, V
DROP
= (VINÐ V
OUT
) 400 600 mV
Load Regulation Measure V
OUT
when 0.1 1.0 %V
OUT
I
OUT
= 100µA, 100mA.
LD
REG
= ABS (ÆV
OUT
)
Line Regulation I
OUT
= 1mA. Measure V
OUT
0.1 0.5 %V
OUT
when VIN= V
OUT
+ 1V, 30V.
LN
REG
= ABS (ÆV
OUT
)
Quiescent Current, (IQ)V
IN
= 6V, I
OUT
= 100µA, 55 120 µA
Active Mode V
OUT
setup for 5V. IQ= IVIN- I
OUT
VIN= 13V, I
OUT
= 100µA, 130 200 µA
V
OUT
setup for 12V. IQ= IVIN- 100µA
VIN= 30V, I
OUT
= 100µA, 150 450 µA
V
OUT
setup for 5V, IQ= IVIN- 100µA
VIN= 30V, I
OUT
= 100µA, 200 500 µA
V
OUT
setup for 12V, IQ= IVIN- 100µA
I
OUT
= 50mA, IQ= IVIN- 50mA 4 7 mA
I
OUT
= 100mA, IQ= IVIN- 100mA 12 21 mA
Quiescent Current, (IQ)V
IN
= 6V, ENABLE = 2.5V, 20 50 µA
Sleep Mode I
QSLEEP
= IV
IN
VIN= 30V, ENABLE = 2.5V, 75 350 µA
I
QSLEEP
= IV
IN
Ripple Rejection f=120Hz, (Note 1) 60 75 dB
Current Limit V
OUT
= V
OUT
- 500mV, I
LIM
= IV
OUT
105 200 300 mA
Short Circuit Output Current V
OUT
=0V, I
SHRT
= IV
OUT
15 100 215 mA
Thermal Limit (Note 1) 150 180 210 ¡C
Overvoltage Shutdown Adjust VINfrom 28V to 40V 30 34 38 V
until V
OUT
²1V
Reverse Current VIN=0V, I
REV
= IV
OUT
, V
OUT
= 13.2V 100 200 µA
Page 3
3
CS8271
Package Pin Description
PACKAGE PIN # PIN SYMBOL FUNCTION
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Electrical Characteristics: V
OUT
+ 1V ² VIN² 30V, 5V ² V
OUT
² 12V, I
OUT
= 10mA, -40¡ ² TA ² 125¡, -40¡ ² TJ ² 150¡,
V
ENABLE
= 0V; unless otherwise specified.
The output voltage of the CS8271 is adjustable to any value
between the reference voltage on the Adj pin, (1.272V Typ.)
and the maximum input voltage minus the dropout voltage.
To adjust the output voltage, a pair of external resistors R1
and R2 are connected as shown in Figure 1.
The equation for the output voltage is
V
OUT
= V
REF
x+ I
Adj
x R1
where V
ref
is the typical reference voltage and I
Adj
is the
adjust pin bias current. This is usually 500nA maximum.
Figure 1: Output Voltage Adjustment.
)
R1 + R2
R2
(
Output Voltage Adjustment
Circuit Description
8L SOIC & PDIP
1V
OUT
100mA output; adjustable from 5V to 12V.
2 Gnd Ground.
3, 6, 7 NC No Connection.
4 Adj Resistor divider from V
OUT
to Adj, sets output voltage.
5 Logic level switch, when HIGH, regulator is in sleep mode.
8V
IN
Input voltage.
ENABLE
■
Enable Threshold 1.15 2.0 2.6 V
Enable Input Current V
ENABLE
= 2.6V 10 20 µA
V
ENABLE
= 5V 35 50 µA
■ Adjustment Pin R1: Feedback resistor between V
OUT
and Adjust, R2: Adjust resistor to ground.
Reference Voltage 100µA ² I
OU T
² 100mA 1.246 1.272 1.297 V
Adjustment Pin Current
I
Adj
= -
20 500 nA
Note 1: Guaranteed by design, not 100% tested in production.
(V
OUT
- V
REF
)
R1
V
REF
R2
ENABLE
CS8271
V
OUT
Adj
V
OUT
R
1
V
REF
R
2
Page 4
4
CS8271
The output compensation capacitor C
OUT
, determines
three main characteristics of a linear regulator: start-up
delay, load transient response and loop stability.
The selection of a capacitor value and type should be
based on cost, availability, size and temperature constraints. A tantalum or aluminum electrolytic capacitor is
best, since a film or ceramic capacitor with almost zero
ESR, can cause instability. The aluminum electrolytic
capacitor is the least expensive solution, but, if the circuit
operates at low temperatures (-25¡C to -40¡C), both the
value and ESR of the capacitor will vary considerably. The
capacitor manufacturers data sheet usually provide this
information.
The value for the output compensation capacitor C
OUT
shown in Figure 3 should work for most applications, but it
is not necessarily the least expensive or the optimal solution.
Figure 3: Test and application circuit showing an output compensation
capacitor.
To determine an acceptable value for C
OUT
for a particular
application, start with a tantalum capacitor of the recommended value and work towards a less expensive alternative part.
Step 1: Place the completed circuit with a tantalum capacitor of the recommended value in an environmental chamber at the lowest specified operating temperature. Monitor
the outputs on the oscilloscope. A decade box connected in
series with the capacitor will simulate the higher ESR of an
aluminum capacitor. (Leave the decade box outside the
chamber, the small resistance added by the longer leads is
negligible)
Step 2: With the input voltage at its maximum value,
increase the load current slowly from zero to full load
while observing the output for any oscillations. If no oscillations are observed, the capacitor is large enough to
ensure a stable design under steady state conditions.
Step 3: Increase the ESR of the capacitor from zero using
the decade box and vary the load current until oscillations
appear. Record the values of load current and ESR that
cause the greatest oscillation. This represents the worst
case load conditions for the regulator at low temperature.
Step 4: Maintain the worst case load conditions set in step
3 and vary the input voltage until the oscillations increase.
This point represents the worst case input voltage conditions.
Step 5: If the capacitor is adequate, repeat steps 3 and 4
with the next smaller valued capacitor. (A smaller capacitor will usually cost less and occupy less board space.) If
the capacitor oscillates within the range of expected operating conditions, repeat steps 3 and 4 with the next larger
standard capacitor value.
Selecting the Right Capacitor Value
Application Notes
The output stage is protected against overvoltage, short
circuit and thermal runaway conditions (Figure 2).
If the input voltage rises above 30V (e.g. load dump), the
output shuts down. This response protects the internal circuitry and enables the IC to survive unexpected voltage
transients up to 60V in magnitude.
Short circuit protection limits the amount of current the
output transistor can supply. In the case of a CS8271 under
a short circuit condition, the output transistor current is
limited to 100mA.
Figure 2: Typical Circuit Waveforms for Output Stage Protection.
Should the junction temperature of the power device exceed
180ûC (typ) the power transistor is turned off. Thermal shutdown is an effective means to prevent die overheating since
the power transistor is the principle heat source in the IC.
The switches the output transistor. When the
voltage on the pin exceeds 2.0V typ, the output
pass transistor turns off, leaving a high impedance facing
the load. The IC will remain in Sleep mode, drawing only
20µA (typ), until the voltage on the pin drops
below the threshold.
ENABLE
ENABLE
ENABLE
ENABLE
ENABLE
Output Stage Protection
Circuit Description: continued
V
IN
V
OUT
I
OUT
> 30V
Load
Dump
Short
Circuit
Thermal
Shutdown
V
IN
C
IN
0.1mF
CS8271
ENABLE
V
OUT
R
RST
Adj
C
R
Adj
L
(optional)
C
OUT
10mF
Page 5
5
Application Diagram
CS8271
Adj
CS8271
V
OUT
R
2
R
1
C2**
10mF
V
OUT
V
IN
Gnd
C1*
0.1mF
V
ref
ENABLE
C1* Required if regulator is away from power supply filter.
C
2
** Required for output stability.
V
OUT
= V
ref
x+ I
Adj
x R1
)
R1 + R2
R2
(
Step 6: Test the load transient response by switching in
various loads at several frequencies to simulate its real
work environment. Vary the ESR to reduce ringing.
Step 7: Remove the unit from the environmental chamber
and heat the IC with a heat gun. Vary the load current as
instructed in step 5 to test for any oscillations.
Once the minimum capacitor value with the maximum
ESR is found, a safety factor should be added to allow for
the tolerance of the capacitor and any variations in regulator performance. Most good quality aluminum electrolytic
capacitors have a tolerance of ±20% so the minimum value
found should be increased by at least 50% to allow for this
tolerance plus the variation which will occur at low temperatures. The ESR of the capacitor should be less than
50% of the maximum allowable ESR found in step 3 above.
Capacitance on the Adjust pin combined with the feedback resistors R1 and R2 can affect loop stability and
should also be considered. The CS8271 internal circuitry
produces about 5pF to Ground on the Adjust pin. This
capacitance, plus any additional external capacitance on
the Adjust pin will create a pole when combined with the
resistive feedback network. The effect can be significant
when using large values for the feedback resistors to minimize quiescent current.
A capacitor connected from the Adjust pin to Ground provides additional means to compensate the regulator by
creating a pole. Alternately, a capacitor can be connected
from the Adjust pin to V
OUT
to create a zero.
The maximum power dissipation for a single output regulator (Figure 4) is
P
D(max)
={V
IN(max)ÐVOUT(min)
}
I
OUT(max)+VIN(max)IQ
(1)
where
V
IN(max)
is the maximum input voltage,
V
OUT(min)
is the minimum output voltage,
I
OUT(max)
is the maximum output current, for the applica-
tion
IQis the quiescent current the regulator consumes at
I
OUT(max)
.
Figure 4: Single output regulator with key performance parameters
labeled.
Once the value of P
D(max)
is known, the maximum permis-
sible value of R
QJA
can be calculated:
R
QJA
=
(2)
The value of R
QJA
can then be compared with those in
the package section of the data sheet. Those packages with
R
QJA
's less than the calculated value in equation 2 will keep
the die temperature below 150¡C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
150¡C - T
A
P
D
Calculating Power Dissipation
in a Single Output Linear Regulator
Application Notes: continued
I
V
IN
IN
Smart
Regulator
Control
Features
}
I
Q
I
OUT
V
OUT
Page 6
Thermal Data 8L 8L
SOIC PDIP
R
QJC
typ 45 52 ûC/W
R
QJA
typ 165 100 ûC/W
D
Lead Count Metric English
Max Min Max Min
8L SOIC 5.00 4.80 .197 .189
8L PDIP 10.16 9.02 .400 .355
6
CS8271
Rev. 3/26/97
Part Number Description
CS8271YD8 8L SOIC
CS8271YDR8 8L SOIC (tape & reel)
CS8271YN8 8L PDIP
Package Specification
Ordering Information
PACKAGE DIMENSIONS IN mm (INCHES)
PACKAGE THERMAL DATA
© 1999 Cherry Semiconductor Corporation
Cherry Semiconductor Corporation reserves the
right to make changes to the specifications without
notice. Please contact Cherry Semiconductor
Corporation for the latest available information.
Surface Mount Narrow Body (D); 150 mil wide
Plastic DIP (N); 300 mil wide
0.39 (.015)
MIN.
2.54 (.100) BSC
1.77 (.070)
1.14 (.045)
D
Some 8 and 16 lead
packages may have
1/2 lead at the end
of the package.
All specs are the same.
.203 (.008)
.356 (.014)
REF: JEDEC MS-001
3.68 (.145)
2.92 (.115)
8.26 (.325)
7.62 (.300)
7.11 (.280)
6.10 (.240)
.356 (.014)
.558 (.022)
1.27 (.050) BSC
0.51 (.020)
0.33 (.013)
6.20 (.244)
5.80 (.228)
4.00 (.157)
3.80 (.150)
1.57 (.062)
1.37 (.054)
D
0.25 (0.10)
0.10 (.004)
1.75 (.069) MAX
1.27 (.050)
0.40 (.016)
REF: JEDEC MS-012
0.25 (.010)
0.19 (.008)
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