Datasheet CS8161YTVA5, CS8161YTHA5, CS8161YT5, CS8161YDWFR16, CS8161YDWF16 Datasheet (Cherry Semiconductor)
Page 1
1
Features
■ Two regulated outputs
12V ±5.0%; 400mA
5V ±2.0%; 200mA
■ Very low SLEEP mode cur-
rent drain 200nA
■ Fault Protection
Reverse Battery (-15V)
74V Load Dump
-100V Reverse Transient
Short Circuit
Thermal Shutdown
Package Options
TO-220 5 Lead
16 Lead SO Wide
(internally fused leads)
Tab (Gnd)
1
CS8161
CS8161
Description
V
IN
V
OUT
2
Gnd
V
OUT
1
ENABLE
+
-
Bandgap
Reference
+
-
+
-
Thermal
Shutdown
Over Voltage
Shutdown
Anti-saturation
and
Current Limit
Anti-saturation
and
Current Limit
Pre-Regulator
Block Diagram
Absolute Maximum Ratings
Input Voltage
Operating Range .....................................................................Ð15V to 26V
Overvoltage Protection.........................................................................74V
Internal Power Dissipation..................................................Internally Limited
Junction Temperature Range.......................................................Ð40¡C +150¡C
Storage Temperature Range....................................................Ð65¡C to +150¡C
Lead Temperature Soldering
Wave Solder (through hole styles only)..........10 sec. max, 260¡C peak
Reflow (SMD styles only)...........60 sec. max above 183¡C, 230¡C peak
ESD (Human Body Model)...........................................................................2kV
The CS8161 is a 12V/5V dual output linear regulator. The 12V ± 5%
output sources 400mA and the 5V
±2.0% output sources 200mA.
The on board ENABLE function
controls the regulatorÕs two outputs. When the ENABLE pin is
low, the regulator is placed in
SLEEP mode. Both outputs are disabled and the regulator draws only
200nA of quiescent current.
The primary output, V
OUT
1
is protected against overvoltage conditions. Both outputs are protected
against short circuit and thermal
runaway conditions.
The CS8161 is packaged in a 5 lead
TOÐ220 with copper tab. The copper tab can be connected to a heat
sink if necessary. It is also available
in a 16 lead SO wide package.
1V
IN
2V
OUT
1
3 Gnd
4 ENABLE
5V
OUT
2
V
IN
V
OUT(1)
NC
V
OUT(2)
SENSE
1
SENSE
1
NC
NC
NC
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
ENABLE
12V, 5V Low Dropout Dual Regulator
with ENABLE
A Company
¨
Rev. 4/5/99
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
1
Page 2
2
CS8161
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Electrical Characteristics for V
OUT
: 6V ² VIN² 26V, I
OUT
1
= 5mA, I
OUT
2
= 5mA, -40¡C ² TJ² +150ûC,
-40¡C ² TA² +125ûC; unless otherwise specified.
■ Primary Output Stage(V
OUT
1
)
Output Voltage, V
OUT
1
13V²VIN²26V, I
OUT
1
²400mA 11.4 12.0 12.6 V
Dropout Voltage I
OUT
1
=400mA 0.35 0.6 V
Line Regulation 13V²VIN²20V,5mA² I
OUT
<400mA 80 mV
Load Regulation 5mA² I
OUT
1
²400mA, VIN=14V 80 mV
Quiescent Current I
OUT
1
=100mA, No Load on V
OUT
2
812mA
I
OUT
1
=400mA, No Load on V
OUT
2
50 75 mA
Ripple Rejection f=120Hz, I
OUT
=300µA, 42 dB
VIN=15.0VDC, 2V
RMS
Current Limit 0.40 1.0 A
Reverse Polarity V
OUT
1
³-0.6V, 10½ Load -30 -18 V
Input Voltage, DC
Reverse Polarity Input 1% Duty Cycle, t=100ms, V
OUT
³-6V, -80 -50 V
Voltage, Transient 10½ Load
Over-voltage Shutdown 28 34 45 V
Short Circuit Current 700 mA
■ Secondary Output (V
OUT
2
)
Output Voltage, (V
OUT
2
) 6V²VIN²26V, I
OUT
2
²200mA 4.90 5.10 V
Dropout Voltage I
OUT
2
²200mA 0.35 0.60 V
Line Regulation 6V²VIN²26V, 1mA²I
OUT
²200mA 50 mV
Load Regulation 1mA²I
OUT
2
²200mA, 9VIN=14V 50 mV
Quiescent Current I
OUT
2
=50mA 5 10 mA
I
OUT
2
=200mA 20 35 mA
Ripple Rejection f=120Hz; I
OUT
=10mA, 42 dB
VIN=15V, 2V
RMS
Current Limit 200 600 mA
Short Circuit Current 400 mA
■ ENABLE Function (ENABLE)
Input ENABLE Threshold V
OUT
1
Off 1.30 0.80 V
V
OUT
1
On 2.00 1.30 V
Input ENABLE Current V
ENABLE
=5.5V 80 500 µA
V
ENABLE
<0.8V -10 10 µA
■ Other Features
Sleep Mode V
ENABLE
<0.4V 0.2 50 µA
Thermal Shutdown 150 210 ¡C
Quiescent Current in Dropout I
OUT
1
=100mA, I
OUT
2
=50mA 60 mA
Page 3
3
PACKAGE PIN # PIN SYMBOL FUNCTION
Typical Performance Characteristics
Package Pin Description
CS8161
-40 -20 0 20
40
60 80
100
120 140 160
11.750
11.790
11.830
11.870
11.910
11.950
11.990
12.030
12.070
12.110
12.150
Temperature (Deg. C)
Volt 1
VIN = 14V
I
OUT
1
= 5A
Output Voltage vs. Temperature for V
OUT
1
0 50 100 150
200
250 300
350
400 450 500
-40
-35
-30
-25
-20
-15
-10
-5
0
5
10
Output Current (mA)
Line Regulation (mV)
-40°C
125°C
25°C
VIN = 13 - 26V
Line Regulation vs. Output Current for V
OUT
1
0 50 100 150
200
250 300
350
400 450 500
-40
-35
-30
-20
-15
-10
-5
0
5
10
15
Output Current (mA)
Load Regulation (mV)
VIN = 14.0V
125°C
25°C
-40°C
Load Regulation vs. Output Current for V
OUT
1
0 50 100 150
200
250 300
350
400 450 500
0
10
20
30
40
50
60
70
80
90
100
Output Current (mA)
Quiescent Current (mA)
-40°C
125°C
25°C
VIN = 14.0V
No Load on V
OUT
2
Quiescent Current vs. Output Current for V
OUT
1
5 L TO-220 16L SO Wide
13V
IN
Supply voltage, usually direct from battery.
26V
OUT
1
Regulated output 12V, 400mA (typ)
3 4,5,12,13,15,16 Gnd Ground connection.
4 8 ENABLE CMOS compatible input pin; switches outputs on and off. When
ENABLE is high V
OUT
1
and V
OUT
2
are active.
510V
OUT
2
Output 5V, 200mA (typ).
N/A 7 Sense
1
Kelvin connection that allows remote sensing of V
OUT
1
for
improved regulation. If remote sensing is not required, connect
to V
OUT
1
.
N/A 11 Sense
2
Kelvin connection that allows remote sensing of V
OUT
2
for
improved regulation. If remote sensing is not required, connect
to V
OUT
2
.
N/A 1,2,9,14 NC No Connection
Page 4
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CS8161
Typical Performance Characteristics: continued
0
40050
100
500
150
200
250 300
350
450
50
100
150
200
250
300
350
400
450
500
550
600
Output Current (mA)
Dropout Voltage (mV)
VIN = 11V
0
125°C
25°C
-40°C
Dropout Voltage vs. Output Voltage for V
OUT
1
0 50 100 150
200
250 300
350
400 450 500
0
10
20
30
40
50
70
80
90
110
150
Output Current (mA)
Quiescent Current (mA)
-40°C
125°C
25°C
VIN = 11.0V
No Load on V
OUT
2
140
130
120
60
100
Quiescent Current vs Output Current @ Dropout for V
OUT
1
-40 -20 0 20
40
60 80
100
120 140 160
4.975
4.980
4.985
4.990
4.995
5.000
5.005
5.010
5.015
5.020
5.025
Temperature (Deg. C)
Output Voltage
VIN = 14V
I
OUT
= 5mA
Output Voltage vs. Temperature for V
OUT
2
0 25 50 75 250100 125 150 175 200 225
-8
-7
-6
-5
-4
-3
-2
-1
0
1
2
3
Output Current (mA)
Load Regulation (mV)
125°C
25°C
-40°C
VIN = 6 - 26V
Line Regulation vs Output Current for V
OUT
2
0255075
100
125 150
175
200 225 250
-18
-12
-10
-8
-6
-4
-2
2
4
6
8
Output Current (mA)
Load Regulation (mV)
VIN = 14.0V
125°C
25°C
-40°C
0
-14
-16
Load Regulation vs Output Current for V
OUT
2
0255075
100
125 150
175
200 225 250
0
5
10
15
20
25
30
35
40
45
50
Output Current (mA)
Quiescent Current (mA)
-40°C
125°C
25°C
VIN = 14.0V
No Load on V
OUT
1
Quiescent Current vs Output Current for V
OUT
2
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5
Definition of Terms
Dropout Voltage: The input-output voltage differential at
which the circuit ceases to regulate against further
reduction in input voltage. Measured when the
output voltage has dropped 100mV from the nominal value obtained at 14V input, dropout voltage
is dependent upon load current and junction temperature.
Input Voltage: The DC voltage applied to the input termi-
nals with respect to ground.
Input Output Differential: The voltage difference
between the unregulated input voltage and the
regulated output voltage for which the regulator
will operate.
Line Regulation: The change in output voltage for a
change in the input voltage. The measurement is
made under conditions of low dissipation or by
using pulse techniques such that the average chip
temperature is not significantly affected.
Load Regulation: The change in output voltage for a
change in load current at constant chip temperature.
Long Term Stability: Output voltage stability under accel-
erated life-test conditions after 1000 hours with
maximum rated voltage and junction temperature.
Output Noise Voltage: The rms AC voltage at the output,
with constant load and no input ripple, measured
over a specified frequency range.
Quiescent Current: The part of the positive input current
that does not contribute to the positive load current. i.e., the regulator ground lead current.
Ripple Rejection: The ratio of the peak-to-peak input rip-
ple voltage to the peak-to-peak output ripple voltage.
Temperature Stability of V
OUT
: The percentage change in
output voltage for a thermal variation from room
temperature to either temperature extreme.
-40
-20 0 20 40 60 80 100 120 140
1.285
1.290
1.295
1.300
1.305
Temperature (Deg. C)
VIN = 14.0V
ENABLE Voltage
Enable Threshold Voltage vs.
Temperature
CS8161
Typical Performance Characteristics: continued
V
ENABLE
I
ENABLE
0.0
0.0
5.0
25
4.0
3.0
2.0
1.0
5101520
ENABLE Current vs. ENABLE Voltage
12mA ENABLE Current vs.
ENABLE Voltage
0255075
100
125 150
175
200 225 250
0
50
100
150
200
250
350
450
500
600
800
Output Current (mA)
Dropout Voltage (mV)
VIN = 4.0V
No Load on V
OUT
1
750
700
650
300
550
125°C
-40°C
25°C
Dropout Voltage vs. Output Current for V
OUT
2
0
20025
50
250
75
100
125 150
175
225
5
10
15
20
25
30
35
40
45
50
55
60
Output Current (mA)
Quiescent Current (mA)
VIN = 4.0V
0
125°C
25°C
-40°C
Quiescent Current vs. Output Current @ Dropout for V
OUT
2
Cursor ( 1.8500V, 253.9nA.)
Marker ( 1.8500V, 253.9nA.)
100
80
60
ENABLE
I
40
20
0
0
1234
V
(V)
ENABLE
5
Page 6
Since both outputs are controlled by the same ENABLE,
the CS8161 is ideal for applications where a sleep mode is
required. Using the CS8161, a section of circuitry such as a
display and nonessential 5V circuits can be shut down
under microprocessor control to conserve energy.
The example in the Applications Diagram shows an automotive radio application where the display is powered by
the 12V on V
OUT
1
and the Tuner IC is powered by the 5V
on V
OUT
2
. Neither output is required unless both the igni-
tion and the Radio On/Off switch are on.
The output compensation capacitor (Application diagram
C
2
and C3) helps determine three main characteristics of a
linear regulator: start-up delay, load transient response
and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. A tantalum
or aluminum electrolytic capacitor is best, since a film or
ceramic capacitor with almost zero ESR, can cause instability. The aluminum electrolytic capacitor is the least
expensive solution, but, if the circuit operates at low temperatures (-25¡C to -40¡C), both the value and ESR of the
capacitor will vary considerably. The capacitor manufacturers data sheet usually provide this information.
The values for the output capacitors C
2
and C3shown in
the Applications Circuit should work for most applications, however it is not necessarily the best solution.
To determine an acceptable value for C2and C3for a particular application, start with tantalum capacitors of the
recommended value on each output and work towards
less expensive alternative parts for each output in turn.
6
CS8161
NOTES:
* C1 required if regulator is located far from power supply filter.
** C2, C3 required for stability, value may be increased. Capacitor must operate at minimum temperature expected.
Application Diagram
Stability Considerations
V
IN
ENABLE
V
OUT
1
System
Condition
60V
3V
2.4V
12V
0V
Turn
On
Load
Dump
Low V
IN
Line Noise, Etc. V
OUT
1
Short
Circuit
Thermal
Shutdown
V
OUT
1
Turn
Off
5V
0V
14V
5V
2.0V
0.8V
14V
26V
31V
12V 12V
2.4V
12V12V
0V
0V
V
OUT
2
0V
5V
0V 0V
V
OUT
2
Short
Circuit
Typical Circuit Waveform
Application Notes
C1*
0.1 mF
V
IN
CS8161
ENABLE
Gnd
Display
V
OUT
1
+
C2**
22mF
V
OUT
2
+
**
C
3
22mF
Tuner
Page 7
7
Step 1: Place the completed circuit with a tantalum capacitor of the recommended value in an environmental chamber at the lowest specified operating temperature and
monitor the outputs on the oscilloscope. A decade box
connected in series with the capacitor C2will simulate the
higher ESR of an aluminum capacitor. (Leave the decade
box outside the chamber, the small resistance added by
the longer leads is negligible)
Step 2: With the input voltage at its maximum value,
increase the load current slowly from zero to full load
while observing the output for any oscillations. If no oscillations are observed, the capacitor is large enough to
ensure a stable design under steady state conditions.
Step 3: Increase the ESR of the capacitor from zero using
the decade box and vary the load current until oscillations
appear. Record the values of load current and ESR that
cause the greatest oscillation. This represents the worst
case load conditions for the regulator at low temperature.
Step 4: Maintain the worst case load conditions set in step
3 and vary the input voltage until the oscillations increase.
This point represents the worst case input voltage conditions.
Step 5: If the capacitor C2is adequate, repeat steps 3 and 4
with the next smaller valued capacitor. (A smaller capacitor will usually cost less and occupy less board space.) If
the capacitor oscillates within the range of expected operating conditions, repeat steps 3 and 4 with the next larger
standard capacitor value.
Step 6: Test the load transient response by switching in
various loads at several frequencies to simulate its real
work environment. Vary the ESR to reduce ringing.
Step 7: Remove the unit from the environmental chamber
and heat the IC with a heat gun. Vary the load current as
instructed in step 5 to test for any oscillations.
Once the minimum capacitor value with the maximum
ESR is found, a safety factor should be added to allow for
the tolerance of the capacitor and any variations in regulator performance. Most good quality aluminum electrolytic
capacitors have a tolerance of +/-20% so the minimum
value found should be increased by at least 50% to allow
for this tolerance plus the variation which will occur at
low temperatures. The ESR of the capacitor should be less
than 50% of the maximum allowable ESR found in step 3
above. Once the value for C2 is determined, repeat the
steps to determine the appropriate value for C3.
The maximum power dissipation for a dual output regulator (Figure 1) is
P
D(max)
= {V
IN(max)ÐVOUT1(min)}IOUT1(max)
+
{V
IN(max)ÐVOUT2(min)}IOUT2(max)+VIN(max)
IQ (1)
Where
V
IN(max)
is the maximum input voltage,
V
OUT1(min)
is the minimum output voltage from V
OUT
1
,
V
OUT2(min)
is the minimum output voltage from V
OUT
2
,
I
OUT1(max)
is the maximum output current, for the appli-
cation
I
OUT2(max)
is the maximum output current, for the appli-
cation
IQis the quiescent current the regulator consumes at
I
OUT(max)
.
Once the value of P
D(max)
is known, the maximum permis-
sible value of RQJAcan be calculated:
RQJA=
(2)
The value of RQJAcan then be compared with those in
the package section of the data sheet. Those packages
with RQJA's less than the calculated value in equation 2
will keep the die temperature below 150¡C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed
to determine the value of RQJA.
RQJA= RQJC+ RQCS+ RQ
SA
(3)
where
RQJC= the junctionÐtoÐcase thermal resistance,
RQCS= the caseÐtoÐheatsink thermal resistance, and
RQSA= the heatsinkÐtoÐambient thermal resistance.
RQ
JC
appears in the package section of the data sheet. Like
RQJA, it too is a function of package type. RQCSand RQ
SA
are functions of the package type, heatsink and the interface between them. These values appear in heat sink data
sheets of heat sink manufacturers.
150¡C - T
A
P
D
CS8161
Application Notes: continued
Calculating Power Dissipation
in a Dual Output Linear Regulator
Figure 1: Dual output regulator with key performance parameters
labeled.
Heat Sinks
I
V
IN
IN
Smart
Regulator
Control
Features
}
I
Q
I
OUT
I
OUT
1
V
OUT
2
V
OUT
1
2
Page 8
D
Lead Count Metric English
Max Min Max Min
16L SO Wide 10.50 10.10 .413 .398
(internally fused leads)
8
CS8161
Ordering Information
Part Number Description
CS8161YT5 5L TO-220 Straight
CS8161YTVA5 5L TO-220 Vertical
CS8161YTHA5 5L TO-220 Horizontal
CS8161YDWF16 16L SO Wide
CS8161YDWFR16 16L SO Wide (tape & reel)
Rev. 4/5/99
Thermal Data 5L 16L
TO-220 SO Wide
RQ
JC
typ 2.0 18 ûC/W
RQ
JA
typ 50 75 ûC/W
Package Specification
PACKAGE THERMAL DATA
PACKAGE DIMENSIONS IN mm(INCHES)
© 1999 Cherry Semiconductor Corporation
Cherry Semiconductor Corporation reserves the
right to make changes to the specifications without
notice. Please contact Cherry Semiconductor
Corporation for the latest available information.
Surface Mount Wide Body (DW); 300 mil wide
1.27 (.050) BSC
7.60 (.299)
7.40 (.291)
10.65 (.419)
10.00 (.394)
D
0.32 (.013)
0.23 (.009)
1.27 (.050)
0.40 (.016)
REF: JEDEC MS-013
2.49 (.098)
2.24 (.088)
0.51 (.020)
0.33 (.013)
2.65 (.104)
2.35 (.093)
0.30 (.012)
0.10 (.004)
5 Lead TO-220 (T) Straight
2.87 (.113)
2.62 (.103)
6.93(.273)
6.68(.263)
9.78 (.385)
10.54 (.415)
1.02(.040)
0.63(.025)
1.83(.072)
1.57(.062)
0.56 (.022)
0.36 (.014)
2.92 (.115)
2.29 (.090)
1.40 (.055)
1.14 (.045)
4.83 (.190)
4.06 (.160)
6.55 (.258)
5.94 (.234)
14.22 (.560)
13.72 (.540)
1.02 (.040)
0.76 (.030)
3.71 (.146)
3.96 (.156)
14.99 (.590)
14.22 (.560)
5 Lead TO-220 (THA) Horizontal
0.81(.032)
1.70 (.067)
6.81(.268)
1.40 (.055)
1.14 (.045)
5.84 (.230)
6.60 (.260)
6.83 (.269)
0.56 (.022)
0.36 (.014)
10.54 (.415)
9.78 (.385)
6.55 (.258)
5.94 (.234)
3.96 (.156)
3.71 (.146)
1.68
(.066)
TYP
14.99 (.590)
14.22 (.560)
2.77 (.109)
2.29 (.090)
2.92 (.115)
4.83 (.190)
4.06 (.160)
2.87 (.113)
2.62 (.103)
5 Lead TO-220 (TVA) Vertical
1.68
(.066) typ
1.70 (.067)
7.51 (.296)
1.78 (.070)
4.34 (.171)
0.56 (.022)
0.36 (.014)
1.40 (.055)
1.14 (.045)
4.83 (.190)
4.06 (.160)
14.99 (.590)
14.22 (.560)
2.92 (.115)
2.29 (.090)
.94 (.037)
.69 (.027)
8.64 (.340)
7.87 (.310)
6.80 (.268)
10.54 (.415)
9.78 (.385)
2.87 (.113)
2.62 (.103)
6.55 (.258)
5.94 (.234)
3.96 (.156)
3.71 (.146)
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