Page 1
1
Features
■ Two Regulated Outputs
Primary Output 5V
± 5%; 500mA
Secondary Standby 5V
±5%; 10mA
■ Low Dropout Voltage
(0.6V at 0.5A)
■ ON/OFF Control
Option
■ Low Quiescent Drain
(<3mA)
■ RESET Option
■ Protection Features
Reverse Battery
60V Load Dump
-50V Reverse Transient
Short Circuit
Thermal Shutdown
Overvoltage Shutdown
Package Option
5 Lead TO-220
Tab (Gnd)
1
CS8135
5V, 5V Low Dropout Dual Regulator
with /ENABLE
RESET
CS8135
Description
Block Diagram
Absolute Maximum Ratings
Input Voltage
Operating Range.....................................................................-0.5V to 26V
Load Dump ............................................................................................60V
Internal Power Dissipation..................................................Internally Limited
Junction Temperature Range (T
J
)............................................-40¡C to +150¡C
Storage Temperature Range ....................................................-65¡C to +150¡C
Lead Temperature Soldering
Wave Solder (through hole styles only)..........10 sec. max, 260¡C peak
Electrostatic Discharge (Human Body Model) ..........................................2kV
The CS8135 is a low dropout, high current, dual 5V linear regulator. The secondary 5V/10mA output is often used
for powering systems with standby
memory. Quiescent current drain is
less than 3mA when supplying 10mA
loads from the standby regulator.
In automotive applications, the CS8135
and all regulated circuits are protected
from reverse battery installations, as
well as two-battery jumps. During line
transients, such as a 60V load dump,
the 500mA output will automatically
shut down the primary output to protect both internal circuits and the load.
The standby regulator will continue to
power any standby load.
The CS8135 is packaged in a 5 lead
TO-220.
NOTE: The CS8135 is compatible with
the LM2935.
1V
IN
2V
OUT1
3 Gnd
4/
ENABLE
5V
OUT2
RESET
A Company
¨
Rev. 10/21/97
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
V
IN
Bandgap
Reference
Standby Output
+
-
Output
Current
Limit
V
OUT2
RESET/
ENABLE
Gnd
Primary Output
Thermal
Shutdown
+
-
+
-
+
-
Over Voltage
Shutdown
Output
Current
Limit
V
OUT1
Page 2
2
CS8135
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Electrical Characteristics : V
IN
= 14V, I
OUT1
= 5mA, I
OUT2
= 1mA, -40¡C ² TA² 125¡C, -40¡C ² TJ² 150¡C unless otherwise specified
■ Output Stage (V
OUT1
)
Output Voltage, V
OUT1
6V ² VIN² 26V, 5mA ² I
OUT1
² 500mA 4.75 5.00 5.25 V
Dropout Voltage I
OUT
= 500mA 0.35 0.60 V
I
OUT
= 750mA 0.50 V
Line Regulation 6V ² VIN² 26V, I
OUT1
= 5mA 10 50 mV
Load Regulation 5mA ² I
OUT
² 500mA 10 50 mV
Quiescent Current I
OUT1
² 10mA, No Load on Standby 3 7 mA
I
OUT1
= 500mA, No Load on Standby 30 100 mA
I
OUT1
= 750mA, No Load on Standby 60 150 mA
Ripple Rejection f = 120Hz 66 dB
Current Limit 0.75 1.40 A
Maximum Line Transient V
OUT1
² 5.5V 90 V
Reverse Polarity V
OUT1
³ -0.6V, 10½ Load -50 V
Input Voltage, DC
Reverse Polarity Input 1% Duty Cycle, t = 100ms, V
OUT1
³ -6V, -80 V
Voltage, Transient 10½ Load
Output Noise Voltage 10Hz-100kHz 100 µVrms
Long Term Stability 20 mV/khr
Output Impedance 500mA DC and 10mA rms, 200 m½
100Hz-10kHz
Overvoltage Shutdown 30 V
■ Standby Output (V
OUT2
)
Output Voltage (V
OUT2
) 6V ² VIN² 26V, 1mA ² I
OUT1
² 10mA 4.75 5.00 5.25 V
Dropout Voltage I
OUT2
= 10mA 0.3 0.7 V
Tracking V
OUT1-VOUT2
50 200 mV
Line Regulation 6V ² VIN² 26V 4 50 mV
Load Regulation 1mA ² I
OUT1
² 10mA 10 50 mV
Quiescent Current I
OUT
² 10mA, V
OUT
OFF 2 3 mA
Ripple Rejection f = 120Hz 66 dB
Current Limit 25 70 mA
Output Noise Voltage 10Hz-100kHz 300 µV
Long Term Stability 20 mV/khr
Output Impedance 10mA DC and 1mA rms, 100Hz-10kHz 1 ½
■ Function
Output Voltage
Low R1= 20k½, VIN= 4.5V See Test & Application Circuit 0.8 1.1 V
High R1= 20k½, VIN= 14V (page 6) 4.5 5.0 6.0 V
Output Current VIN= 4.5V, in Low State 5 mA
ON/OFF Resistor R1 (±10% Tolerance) 20 30 k½
RESET
RESET
RESET
RESET
Page 3
3
CS8135
Package Lead Description
PACKAGE LEAD # LEAD SYMBOL FUNCTION
Typical Performance Characteristics
TO-220
1V
IN
Supply voltage to IC, usually direct from battery.
2V
OUT1
Regulated output voltage 5V, 500mA (typ) switched.
3 Gnd Ground connection.
4 /ENABLE CMOS compatible output lead, goes low whenever
V
OUT1
becomes unregulated. To use the ENABLE option, con-
nect the lead via a resistor to VIN(see app. notes).
5V
OUT2
STANDBY output 5V, 10mA typ, always on.
RESET
RESET
Dropout Voltage vs. Output Current
Standby Dropout Voltage vs. Output Current
Output Voltage vs. Input Voltage
Standby Output Voltage vs. Input Voltage
Line Transient Response (V
OUT1
)
Line Transient Response (V
OUT2
)
10
TIME (ms)
INPUT VOLTAGE
CHANGE (V)
OUTPUT VOLTAGE
DEVIATION (mV)
5
0
-5
-10
3
2
1
0
0102030405060
20
10
0
-10
-20
3
2
1
0
0 1020 304050 60
TIME (ms)
INPUT VOLTAGE
CHANGE (V)
OUTPUT VOLTAGE
DEVIATION (mV)
I
OUT
1
=500mA
7
6
5
4
3
2
1
0
-1
-2
-40 -20 0 20 40 60
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
RL=500W
7
6
5
4
3
2
1
0
-1
-2
-40 -20 0 20 40 60
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
RL=10W
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
INPUT-OUTPUT DIFFERENTIAL VOLTAGE (V)
OUTPUT CURRENT (mA)
0 5 10 15 20
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
INPUT-OUTPUT DIFFERENTIAL VOLTAGE (V)
OUTPUT CURRENT (mA)
0 200 400 600 800
Page 4
Load Transient Response (V
OUT1
)
Load Transient Response (V
OUT2
)
Quiescent Current vs. Output Current
Quiescent Current vs. Standby Output Current
Maximum Power Dissipation (TO-220)
AMBIENT TEMPERATURE (°C)
POWER DISSIPATION (W)
20
0
18
16
14
12
10
8
6
4
2
0
10 20 30 40 50 60 70 80 90
INFINITE
HEAT SINK
10° C/W HEAT SINK
NO HEAT SINK
STANDBY OUTPUT CURRENT (mA)
QUIESCENT CURRENT (mA)
0
5
4
3
2
1
0
5
10
15
20 25
SWITCH OPEN
V
O
OFF
OUTPUT CURRENT (mA)
QUIESCENT CURRENT (mA)
0
120
100
80
60
40
20
0
200 400 600 800
I
OUT2
=10mA
150
TIME (ms)
STANDBY LOAD
CURRENT (mA)
STANDBY
OUTPUT VOLTAGE
DEVIATION (mV)
100
50
0
-50
-100
-150
20
15
10
5
0
0 10 2030405060
150
TIME (ms)
LOAD
CURRENT (A)
OUTPUT VOLTAGE
DEVIATION (mV)
100
50
0
-50
-100
-150
0.8
0.6
0.4
0.2
0
0 102030405060
4
Typical Performance Characteristics: continued
CS8135
Page 5
V
IN
SWITCH
V
OUT
1
RESET
V
OUT
2
System
Condition
5V
0V
0V
OPEN
14V
5V
5V
60V
31V
3V
2.4V
26V
CLOSED
5V
0V
2.4V
Turn
On
Load
Dump
Low V
IN
Line, Noise, Etc. V
OUT1
Short
Circuit
Thermal
Shutdown
Turn
Off
5V
5V 5V
0V
OPEN
14V
5V
Typical Circuit Waveform
*Reference Test & Application Circuit
The CS8135 is equipped with two outputs. The second output is intended for use in systems requiring standby memory circuits. While the high current regulator output can be
controlled with the lead described below, the standby output remains on under all conditions as long as sufficient input voltage is applied to the IC. Thus, memory and
other circuits powered by this output remain unaffected by
positive line transients, thermal shutdown, etc.
The standby regulator circuit is designed so that the quiescent current to the IC is very low (<3mA) when the other
regulator output is off.
In applications where the standby output is not needed, it
may be disabled by connecting a resistor from the standby
output to the supply voltage. This eliminates the need for
a capacitor on the output to prevent unwanted oscillations. The value of the resistor depends upon the minimum input voltage expected for a given system. Since the
standby output is shunted with an internal diode zener,
the current through the external resistor should be sufficient to bias V
OUT2
up to this point. Approximately 60µA
will suffice, resulting in a 10k½ external resistor for most
applications.
RESET
Standby Output
5
Circuit Description
CS8135
Dropout Voltage
The input-output voltage differential at which the circuit
ceases to regulate against further reduction in input voltage. Measured when the output voltage has dropped
100mV from the nominal value obtained at 14V input,
dropout voltage is dependent upon load current and junction temperature.
Input Voltage
The DC voltage applied to the input with respect to ground.
Input Output Differential
The voltage difference between the unregulated input
voltage and the regulated output voltage for which the
regulator will operate.
Line Regulation
The change in output voltage for a change in the input
voltage. The measurement is made under conditions of
low dissipation or by using pulse techniques such that the
average chip temperature is not significantly affected.
Load Regulation
The change in output voltage for a change in load current
at constant chip temperature.
Long Term Stability
Output voltage stability under accelerated life-test conditions after 1000 hours with maximum rated voltage and
junction temperature.
Output Noise Voltage
The rms AC voltage at the output, with constant load and
no input ripple, measured over a specified frequency
range.
Quiescent Current
The part of the positive input current that does not contribute to the positive load current. i.e., the regulator
ground lead current.
Ripple Rejection
The ratio of the peak-to-peak input ripple voltage to the
peak-to-peak output ripple voltage.
Temperature Stability of VOUT
The percentage change in output voltage for a thermal
variation from room temperature to either temperature
extreme.
Current Limit
Peak current that can be delivered to the output.
Definition of Terms
Page 6
6
CS8135
Application Notes
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: start-up
delay, load transient response and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. A tantalum
or aluminum electrolytic capacitor is best, since a film or
ceramic capacitor with almost zero ESR, can cause instability. The aluminum electrolytic capacitor is the least
expensive solution, but, if the circuit operates at low temperatures (-25¡C to -40¡C), both the value and ESR of the
capacitor will vary considerably. The capacitor manufacturers data sheet usually provides this information.
The value for output capacitor C
2
shown in the test and
applications circuit should work for most applications,
however it is not necessarily the optimized solution.
To determine acceptable values for C2and C3for a particular application, start with a tantalum capacitor of the rec-
Stability Considerations
S1
ON/OFF
RESET
FLAG
R
1
20kW
C1*
0.1 mF
RESET/
ENABLE
V
IN
V
OUT1
Gnd
V
OUT2
C3**
10mF
+
+
10mF
C2 **
CS8135
NOTES:
* C1 required if regulator is located far from power supply filter.
** C2, C3 required for stability.
Test & Application Circuit
Disabling V
OUT2
when it is not needed. C3 is no longer needed.
Unlike the standby regulated output, which must remain
on whenever possible, the high current regulated output is
fault protected against overvoltage and also incorporates
thermal shutdown. If the input voltage rises above approximately 30V (e.g., load dump), this output will automatically shutdown. This protects the internal circuitry and
enables the IC to survive higher voltage transients than
would otherwise be expected. Thermal shutdown is effective against die overheating since the high current output
is the dominant source of power dissipation in the IC.
The function has the ability to serve a dual purpose
if desired. When controlled in the manner shown in the
test circuit (common in automotive systems where
/ENABLE is connected to the ignition switch), the
lead also serves as an output flag that is active low whenever a fault condition is detected with the high current
regulated output. Under normal operating conditions, the
output voltage of this lead is high (5V). This is set by an
internal clamp. If the high current output becomes unregulated for any reason (line transients, short circuit, thermal
shutdown, low input voltage, etc.) the lead switches to the
active low state, and is capable of sinking several milliamps. This output signal can be used to initiate any reset
or start-up procedure that may be required of the system.
The lead can also be driven directly from logic circuits. The only requirement is that the 20k½ pull-up resistor remain in place. This will not affect the logic gate since
the voltage on this lead is limited by the internal clamp to
5V. The signal is sacrificed in this arrangement
since the maximum sink capability of the lead in the active
low state (approximately 5mA), is usually not sufficient to
pull down the active high logic gate. The flag can be
retained if the driving gate is open collector logic.
Controlling ON/OFF Terminal with a typical CMOS or TTL Logic Gate
Reset Pulse on Power-Up (with approximately 300ms delay)
RESET/
ENABLE
Gnd
CS8135
R1
20kW
R2
100kW
4.7 mF
CMOS MM 74CO4
or Equivalent
Delayed
Reset
Out
CS8135
V
IN
R1
20kW
RESET/
ENABLE
RESET
RESET
RESET
RESET
RESET Function
High Current Output
V
Circuit Description: continued
IN
V
OUT
2
R
10kW
+
C
D
V
OUT
2
3
Page 7
7
CS8135
Application Notes: continued
ommended value and work towards a less expensive
alternative part for each output.
Step 1: Place the completed circuit with the tantalum
capacitors of the recommended values in an environmental chamber at the lowest specified operating temperature
and monitor the outputs with an oscilloscope. A decade
box connected in series with capacitor C
2
will simulate the
higher ESR of an aluminum capacitor. Leave the decade
box outside the chamber, the small resistance added by
the longer leads is negligible.
Step 2: With the input voltage at its maximum value,
increase the load current slowly from zero to full load on
the output under observation and look for oscillations on
the output. If no oscillations are observed, the capacitor is
large enough to ensure a stable design under steady state
conditions.
Step 3: Increase the ESR of the capacitor from zero using
the decade box and vary the load current until oscillations
appear. Record the values of load current and ESR that
cause the greatest oscillation. This represents the worst
case load conditions for the output at low temperature.
Step 4: Maintain the worst case load conditions set in step
3 and vary the input voltage until the oscillations increase.
This point represents the worst case input voltage conditions.
Step 5: If the capacitor is adequate, repeat steps 3 and 4
with the next smaller valued capacitor. A smaller capacitor will usually cost less and occupy less board space. If
the output oscillates within the range of expected operating conditions, repeat steps 3 and 4 with the next larger
standard capacitor value.
Step 6: Test the load transient response by switching in
various loads at several frequencies to simulate its real
working environment. Vary the ESR to reduce ringing.
Step 7: Remove the unit from the environmental chamber
and heat the IC with a heat gun. Vary the load current as
instructed in step 5 to test for any oscillations.
Once the minimum capacitor value with the maximum
ESR is found, a safety factor should be added to allow for
the tolerance of the capacitor and any variations in regulator performance. Most good quality aluminum electrolytic
capacitors have a tolerance of ±20% so the minimum value
found should be increased by at least 50% to allow for this
tolerance plus the variation which will occur at low temperatures. The ESR of the capacitor should be less than 50% of
the maximum allowable ESR found in step 3 above.
Repeat steps 1 through 7 with the capacitor on the other
output, C3.
The maximum power dissipation for a dual output regulator (Figure 1) is:
P
D(max)
= {V
IN(max)-VOUT1(min)}IOUT1(max)
+
{V
IN(max)-VOUT2(min)}IOUT2(max)+VIN(max)IQ
(1)
Where
V
IN(max)
is the maximum input voltage,
V
OUT1(min)
is the minimum output voltage from V
OUT1
,
V
OUT2(min)
is the minimum output voltage from V
OUT2
,
I
OUT1(max)
is the maximum output current for the
application,
I
OUT2(max)
is the maximum output current, for the
application, and
IQis the quiescent current the regulator consumes at
I
OUT(max)
.
Once the value of P
D(max)
is known, the maximum permis-
sible value of R
QJA
can be calculated:
R
QJA
= (2)
The value of R
QJA
can then be compared with those in
the package section of the data sheet. Those packages
with R
QJA
's less than the calculated value in equation 2
will keep the die temperature below 150¡C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
Figure 1: Dual output regulator with key performance parameters
labeled.
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and
the outside environment will have a thermal resistance.
Like series electrical resistances, these resistances are
summed to determine the value of R
QJA
.
R
QJA
= R
QJC
+ R
QCS
+ R
QSA
(3)
where
R
QJC
= the junction-to-case thermal resistance,
R
QCS
= the case-to-heatsink thermal resistance, and
R
QSA
= the heatsink-to-ambient thermal resistance.
R
QJC
appears in the package section of the data sheet. Like
R
QJA
, it too is a function of package type. R
QCS
and R
QSA
are functions of the package type, heatsink and the interface between them. These values appear in heat sink data
sheets of heat sink manufacturers.
Heat Sinks
150¡C - T
A
P
D
Calculating Power Dissipation
in a Dual Output Linear Regulator
I
IN
V
IN
Regulator
Control
Features
}
Smart
I
Q
I
I
OUT
OUT
1
V
OUT
1
2
V
OUT
2
Page 8
Part Number Description
CS8135YT5 5 Lead TO-220 Straight
CS8135YTVA5 5 Lead TO-220 Vertical
CS8135YTHA5 5 Lead TO-220 Horizontal
8
CS8135
Rev. 10/21/97
Ordering Information
PACKAGE THERMAL DATA
Package Dimensions in MM (Inches)
Thermal Data 5 Lead TO-220
R
QJC
typ 2.3 ûC/W
R
QJA
typ 50 ûC/W
Package Specification
© 1999 Cherry Semiconductor Corporation
Cherry Semiconductor Corporation reserves the
right to make changes to the specifications without
notice. Please contact Cherry Semiconductor
Corporation for the latest available information.
5 Lead TO-220 (T) Straight
2.87 (.113)
2.62 (.103)
6.93(.273)
6.68(.263)
9.78 (.385)
10.54 (.415)
1.02(.040)
0.63(.025)
1.83(.072)
1.57(.062)
0.56 (.022)
0.36 (.014)
2.92 (.115)
2.29 (.090)
1.40 (.055)
1.14 (.045)
4.83 (.190)
4.06 (.160)
6.55 (.258)
5.94 (.234)
14.22 (.560)
13.72 (.540)
1.02 (.040)
0.76 (.030)
3.71 (.146)
3.96 (.156)
14.99 (.590)
14.22 (.560)
5 Lead TO-220 (THA) Horizontal
0.81(.032)
1.70 (.067)
6.81(.268)
1.40 (.055)
1.14 (.045)
5.84 (.230)
6.60 (.260)
6.83 (.269)
0.56 (.022)
0.36 (.014)
10.54 (.415)
9.78 (.385)
6.55 (.258)
5.94 (.234)
3.96 (.156)
3.71 (.146)
1.68
(.066)
TYP
14.99 (.590)
14.22 (.560)
2.77 (.109)
2.29 (.090)
2.92 (.115)
4.83 (.190)
4.06 (.160)
2.87 (.113)
2.62 (.103)
5 Lead TO-220 (TVA) Vertical
1.68
(.066) typ
1.70 (.067)
7.51 (.296)
1.78 (.070)
4.34 (.171)
0.56 (.022)
0.36 (.014)
1.40 (.055)
1.14 (.045)
4.83 (.190)
4.06 (.160)
14.99 (.590)
14.22 (.560)
2.92 (.115)
2.29 (.090)
.94 (.037)
.69 (.027)
8.64 (.340)
7.87 (.310)
6.80 (.268)
10.54 (.415)
9.78 (.385)
2.87 (.113)
2.62 (.103)
6.55 (.258)
5.94 (.234)
3.96 (.156)
3.71 (.146)
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