Datasheet CS8128YN8, CS8128YDR8, CS8128YD8 Datasheet (Cherry Semiconductor)

1

The CS8128 contains all the necessary
control circuitry to implement a 5V lin­ear regulator. An external pass device is
used to produce superior performance
compared to conventional monolithic
regulators. The CS8128 with a TIP42
PNP transistor typically provides a
100mV dropout voltage at 500mA,
increasing to 350mV at 3A. Quiescent
current at 500mA is only 5mA.
Monolithic regulators cannot approach
these figures because their power tran­sistors do not provide the high beta and
excellent saturation characteristics at
high currents. The CS8128 is compatible
with a wide variety of external transis­tors, allowing flexibility for thermal,
space, and cost management.

The CS8128 includes thermal shutdown
and externally programmable current
limit and over-voltage shutdown, mak­ing it suitable for use in automotive and
switching regulator post regulator appli­cations. An optional external RC filter
added to the CS8128 supply lead pro­vides EMC hardening in addition to the
on-chip EMC hardening. The SENSE

lead allows remote sensing of the output
voltage for improved regulation.

An active microprocessor RESET func­tion is included on-chip with externally
programmable delay time. During
power-up, or after detection of any error
in the regulated output, the RESET lead
will remain in the low state for the dura­tion of the delay. Types of errors include
short circuit, low input voltage, over­voltage shutdown, thermal shutdown,
or others that cause the output to
become unregulated. This function is
independent of the input voltage and
will function correctly with an output
voltage as low as 1V. Hysteresis is
included in both the reset and delay
comparators for noise immunity and to
prevent oscillations. A latching dis­charge circuit is used to discharge the
delay capacitor, even when triggered by
a relatively short fault condition. This
circuit improves upon the commonly
used SCR structure by providing
improved noise immunity and full
capacitor discharge (0.2V typ).

Features

■ Externally Set Delay for

Reset

■ 60V Load Dump

Protection

■ Internal Thermal

Overload Protection

■ 3% Output Accuracy

■ Active RESET

■ Noise Immunity

■ On Chip EMC Hardening

Protection Incorporated

■ Externally Set Current

Limit

■ Externally Set

Overvoltage Shutdown

Package Options

8L SO & 8L PDIP

CS8128

5V Linear Controller/Driver

1

V

IN

2
3
4

Sense

Delay

V

OUT

Pwr Gnd
SHUTDOWN
Ref Gnd

8
7
6
5

RESET

CS8128

Description

Block Diagram

A Company

®

Rev. 2/5/99

Cherry Semiconductor Corporation

2000 South County Trail, East Greenwich, RI 02818

Tel: [phone] Fax: [phone]

Email: [e-mail]

Web Site: www.cherry-semi.com

Pwr Gnd

Ref Gnd

V

IN

Delay

IC
Power
Gnd

IC
Reference
Gnd

PRE-

REGULATOR

Regulated Supply

for Circuit Bias

10µA
Delay
Current

Discharge

-

+

V

dis

Thermal

Shutdown

Bandgap

Reference

Reset

Delay
Comparator

-

+

Comparator

Latching

Q

S
R

1.25V

Over

Voltage

Shutdown

+

+

-

-

Error
Amp

SHUTDOWN

V

OUT

Sense

RESET

2

Note 1: Dependent on characteristics of external transistor.

Electrical Characteristics: T

A

= -40˚C to +125˚C, TJ= -40˚C to +150˚C, VIN= 6 to 26V, I

OUT

= 5 to 500mA, Per Test Circuit

(unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Absolute Maximum Ratings

Power Dissipation.............................................................................................................................................Internally Limited

Input Voltage ..................................................................................................................................................................–0.3V, 26V

Transient Input Voltage ............................................................................................................................................................60V

Output Current ...............................................................................................................................................Externally Limited

ESD Susceptibility (Human Body Model)..............................................................................................................................2kV

Junction Temperature ............................................................................................................................................–45°C to 150°C

Storage Temperature..............................................................................................................................................–55°C to 150°C

Lead Temperature Soldering

Wave Solder (through hole styles only) .....................................................................................10 sec. max, 260°C peak

Reflow (SMD styles only) ......................................................................................60 sec. max above 183°C, 230°C peak

CS8128

C

Delay

x V

DTC

I

Charge

Note 2: Delay Time =

= C

Delay

x 3.5 x 10

5

(Typical)

■ Output Stage (V

OUT

)

Output Voltage 4.85 5.00 5.15 V
Dropout Voltage I

OUT

= 500mA, note 1 0.1 0.6 V

Supply Current I

Q

I

OUT

≤ 10mA 4 8 mA

I

OUT

≤ 500mA 5 15

I

OUT

≤ 3A, note 1 30

Line Regulation 6V ≤ V

IN

≤ 26V, I

OUT

= 5mA 12 50 mV

Load Regulation 5V ≤ I

OUT

≤ 500mA, VIN= 14V 2 50 mV

Ripple Rejection f = 120Hz, 7V ≤ V

IN

≤ 17V, 60 70 dB

I

OUT

= 350mA
VINOvervoltage Shutdown 32 40 V
Drive Current V

SENSE

= 0V 25 250 mA

■ and Delay Functions

Delay Charge Current, I

Charge

V

Delay

= 2V 5 10 15 µA

Threshold V

RTH

V

OUT

Increasing 4.65 4.90 V

OUT

-0.10 V

V

RTL

V

OUT

Decreasing 4.50 4.70 V

OUT

-0.15 V

Hysteresis V

RH

150 200 250 mV

Delay Threshold V

DTC

Charge 3.25 3.50 3.75 V

V

DTD

Discharge 2.80 3.00 3.40 V

Delay Hysteresis, V

DH

V

DTC

- V

DTD

200 400 800 mV

Output Voltage Low 1V < V

OUT

< V

RTL

, 3kΩ to V

OUT

0.4 V

Output VD> V

DTC

, V

OUT>VRTH

10 µA

Leakage Current
Delay Capacitor (V

dis

) Discharge Latched "ON", 0.2 0.5 V

Discharge Voltage V

OUT

> V

RTH

Delay Time C

Delay

= 0.1µF, note 2 16 32 48 ms

RESET

RESET

RESET

RESET

RESET

3

Typical Performance Characteristics (per Test Circuit)

5.02

5.01
5

4.99

4.98

4.97

4.96

4.95

-40

-20 0 20 40 60 80 100120 140150
JUNCTION TEMPERATURE (°C)

V

OUT

(V)

5.00V @ 25°C

I

OUT

=500mA

00

200

400

600

800

1000

1200

1400

1600

1800

2000

RESET OUTPUT CURRENT (mA)

RESET OUTPUT VOLTAGE (mV)

Vin = 5V

0 5 10 15 20 25 30 35 40

0.00

10.00

20.00

30.00

40.00

50.00

60.00

70.00

80.00

90.00

100.00

01234 56 7 8 910

VIN (V)

I

Q

(mA)

I

OUT

= 3A

R

OUT

= 47Ω

I

OUT

= 0.5A

R

OUT

= 330Ω

IQvs. V

IN

RESET Voltage vs. Output Current

Temperature Performance of V

OUT

012345678910

0.00

0.50

1.00

1.50

2.00

2.50

3.00

3.50

4.00

4.50

5.00

5.50

V

IN

(V)

V

OUT

(V)

I

OUT

=0.5A

I

OUT

= 3A

0

0.5

1.0 1.5 2.0 2.5 3.0

0

50

100

150

200

250

300

350

400

I

OUT

(Amps)

DROPOUT VOLTAGE (mV)

R

OUT

= 47Ω

25°C

20
18
16
14
12
10

8
6
4
2
0

0 0.5 1.0 1.5 2.0 2.5 3.0

I

OUT

(Amps)

LOAD REGULATION (mV)

VIN=14V

25°C

Load Regulation vs. I

OUT

Dropout Voltage vs. I

OUT

V

OUT

vs. V

IN

6V≤VIN ≤- 26V

I

OUT

(Amps)

LINE REGULATION (mV)

20

0

15

10

5

0

0.5 1.0 1.5 2.0 2.5 3.0

25°C

40
35
30

25
20

15
10

5
0

0

0.5 1.0 1.5 2.0 2.5 3.0

VIN=14V

I

OUT

(Amps)

I

Q

(mA)

25°C

10

100

1K

10K 100K

FREQUENCY (Hz)

1M

10M 100M

0

10

20

30

40

50

60

70

80

V

IN

/ V

OUT

(dB)

I

OUT

=250mA

25°C

Ripple Rejection

IQvs. I

OUT

Line Regulation vs. I

OUT

Package Lead Description

PACKAGE LEAD # LEAD SYMBOL FUNCTION

CS8128

8L SO & PDIP

1V

IN

Unregulated supply voltage to the IC.

2 Sense Kelvin connection which allows remote sensing of output volt-

age for improved regulation.

3 Delay Timing CAP for function

4 CMOS/TTL compatible open collector output. goes low

whenever V

OUT

drops below 6% of it's typical value.

5 Ref Gnd Ground connection

6 SHUTDOWN Overvoltage shutdown control input.

7 Pwr Gnd Ground connection

8V

OUT

Supplies base current to PNP pass transistor or threshold volt­age to FET pass transistor.

RESETRESET

RESET

The CS8128 function is very precise, has hysteresis
on both the and Delay comparators, a latching
Delay capacitor discharge circuit, and operation down to
1V.

The reset circuit output is an open collector type with ON
and OFF parameters as specified. The reset output NPN
transistor is controlled by the Low Voltage Inhibit and
Reset Delay circuits (see Block Diagram).

This circuit monitors output voltage, and when output
voltage is below V

RTL

, causes the reset output transistor to
be in the ON (saturation) state. When the output voltage is
above V

RTH

, this circuit permits the reset output transistor
to go into the OFF state if allowed by the reset Delay cir­cuit.

This circuit provides a programmable (by external capaci­tor) delay on the output lead. The Delay lead pro­vides source current to the external delay capacitor only
when the Low Voltage Inhibit circuit indicates that output
voltage is above V

RTH

. Otherwise, the Delay lead sinks
current to ground (used to discharge the Delay capacitor).
The discharge current is latched ON when the output volt­age falls below V

RTL

. The Delay capacitor is fully dis­charged anytime the output voltage falls out of regulation,
even for a short period of time. This feature ensures a con­trolled pulse is generated following the detection
of an error condition. The circuit allows the out­put transistor to go to the OFF (open) state only when the
voltage on the Delay lead is higher than V

DTC

.

RESET

RESET

RESET

RESET Delay Circuit

Low Voltage Inhibit Circuit

RESET

RESET

4

CS8128

RESET Circuit Waveform

RESET Circuit Functional Description

(1) = No Delay Capacitor
(2) = With Delay Capacitor
(3) = Max: RESET Voltage (1.0V)

(3)

V

OUT

V

RTH

V

RTL

RESET

Delay

V

DTC

V

DTD

V

RH

(1)

(2)

V

RL

T

D

V

DH

(2)

V

DIS

5

V

Test Circuit

CS8128

Application Information

The CS8128 includes an over voltage shutdown circuit
which is activated by connecting the SHUTDOWN lead to
the input. Shutdown typically occurs at 36V. Grounding
the SHUTDOWN lead disables this function. With the
overvoltage shutdown disabled, the CS8128 will continue
to regulate during an overvoltage condition.

The CS8128 includes a thermal shutdown circuit that dis­ables the output when junction temperature exceeds
approximately 180˚C. This is a self-protection feature
designed to protect the CS8128. The thermal shutdown cir­cuit does not monitor the temperature of the pass transis­tor, which will probably be much hotter. To optimize ther­mal shutdown, board design should minimize the differ­ence in temperature of the CS8128 and the pass device.

External Pass Device - Select a pass device that will deliv­er the desired output current, withstand the maximum
expected input voltage, and dissipate the resulting power.
The CS8128 is compatible with a wide variety of Bipolar
and FET pass transistors.

Output Capacitor - An output capacitor is required for sta­bility in most applications. Though a 10µF capacitor should
be sufficient, regulator stability is dependent on the
characteristics of the pass transistor. Capacitor effective
series resistance (ESR) also factors in system stability. Some
bench work may be required to determine the capacitor
characteristics required for use in a particular application.

BIAS Resistor - This resistor provides bias current for the
CS8128 output stage, and prevents the pass device from

“leaking”. It also speeds the turn-off of the pass device
during an overvoltage transient. For proper operation over
temperature, the recommended value is 560Ω, although it
may be increased or decreased for a particular application.

R

OUT

Resistor - This resistor controls the drive current

available to the pass transistor. It also determines regula­tor start-up current and short circuit current limit. For
bipolar pass transistors, it can be selected by use of the fol­lowing formulae:

R

OUT

=

x ßQ1***

***βQ1= Pass transistor minimum β @ maximum output
current.

Typical start-up current and current limit can be calculat­ed as follows:

I

START

≈

+ 5mA

I

Limit

≈ x ßQ1@ Current Limit

For example, if the minimum input voltage is 6V, maxi­mum output current is 1Amp, and minimum transistor
β @ 1Amp is 60, then R

OUT

can be calculated as follows:

R

OUT

≈ x 60 = 300Ω

I

Start

≈ + 5mA = 18.3mA

With VIN= 14V, and a pass transistor β of 40 @ current
limit:

I

Limit

≈ x 40 = 1.7Amps

14V – 1V

300Ω

4V

300Ω

6V – 1V

1Amp

V

IN

– 1V

R

OUT

4V

R

OUT

V

IN(min)

– 1V

I

OUT(max)

External Component Selection

Thermal Shutdown

Overvoltage Shutdown

(5V)

V

OUT

IN

C

O

10µF

R

IN

220Ω

C

IN

0.022µF

TIP42B

R

BIAS

560Ω

R

OUT

220Ω

RESET

C

Delay

0.022µF

R

RST

4.7 kΩ

V

IN

Sense

V

OUT

Pwr Gnd

CS8128

Delay

RESET

SHUTDOWN

Ref Gnd

Gnd

Part Number Description

CS8128YN8 8 Lead PDIP
CS8128YD8 8 Lead SO Narrow
CS8128YDR8 8 Lead SO Narrow (tape & reel)

D

Lead Count Metric English

Max Min Max Min
8L PDIP 10.16 9.02 .400 .355
8L SO Narrow 5.00 4.80 .197 .189

6

Thermal Data 8 Lead 8 Lead

PDIP SO Narrow

RΘ

JC

typ 52 45 ˚C/W

RΘ

JA

typ 100 165 ˚C/W

Package Specification

PACKAGE DIMENSIONS IN mm (INCHES)

Ordering Information

PACKAGE THERMAL DATA

Rev. 2/5/99

CS8128

© 1999 Cherry Semiconductor Corporation

Cherry Semiconductor Corporation reserves the
right to make changes to the specifications without
notice. Please contact Cherry Semiconductor
Corporation for the latest available information.

Plastic DIP (N); 300 mil wide

0.39 (.015)
MIN.

2.54 (.100) BSC

1.77 (.070)

1.14 (.045)

D

Some 8 and 16 lead
packages may have
1/2 lead at the end
of the package.
All specs are the same.

.203 (.008)

.356 (.014)

REF: JEDEC MS-001

3.68 (.145)

2.92 (.115)

8.26 (.325)

7.62 (.300)

7.11 (.280)

6.10 (.240)

.356 (.014)

.558 (.022)

Surface Mount Narrow Body (D); 150 mil wide

1.27 (.050) BSC

0.51 (.020)

0.33 (.013)

6.20 (.244)

5.80 (.228)

4.00 (.157)

3.80 (.150)

1.57 (.062)

1.37 (.054)

D

0.25 (0.10)

0.10 (.004)

1.75 (.069) MAX

1.27 (.050)

0.40 (.016)

REF: JEDEC MS-012

0.25 (.010)

0.19 (.008)