Page 1
1
Features
■
Dual 1.5A Totem Pole
Outputs
■
40nsec Rise and Fall into
1000pF
■
Parallel or Push-Pull
Operation
■ Single-Ended to Push-Pull
Conversion
■ High-Speed Power
MOSFET Compatible
■ Low Cross-Conduction
Current Spike
■ Analog Latched
Shutdown
■ Internal Deadband Inhibit
Circuit
■ Low Quiescent Current
■ 5V to 40V Operation
■ Thermal Shutdown
Protection
CS3706
Dual Output Driver
CS3706
Description
Block Diagram
The CS3706 integrated circuit provides an interface between lowlevel TTL inputs and high-power
switching devices such as power
MOSFETs. A typical application is
single-ended PWM control to pushpull power control conversion.
The primary function of this device
is to convert a bipolar single-ended
low current digital input to a pair of
totem pole outputs which can
source or sink up to 1.5A. An internal flip-flop, driven by doublepulse suppression logic, can be
enabled to provide single-ended to
push-pull conversion. With the flipflop disabled, the outputs work in
parallel for 3.0A capability.
Protection functions are also included for pulse-by-pulse current limiting, automatic deadband control
and thermal shutdown.
Package Options
16 Lead PDIP
(Internally Fused Leads)
1
INHIBIT B
2
3
4
5
6
7
8
INV
NONINV
Gnd
Gnd
V
OUT
A
F/F ENABLE
V
CC
16
15
14
13
12
11
10
9
INHIBIT A
INHIBIT REF
V
IN
Gnd
Gnd
V
OUT
B
STOP +
STOP -
Note: All Four Ground
Pins must be Connected
to Common Ground.
A Company
¨
Rev. 4/29/99
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
F/F Enable
INHIBIT A
INHIBIT REF
INHIBIT B
INV
NONINV
V
IN
STOP +
STOP -
Voltage
Regulator
130mV
-
Inh
Amp
+
+
Inh
Amp
-
+5V
Logic
Toggle
TQ
+5V
A
+5V
B
+5V
Thermal
Shutdown
+V
IN
Stop
Amp
Flip
Flop
+5V
Q
+5V
Digital
Input
Logic
+5V
Analog
R
Stop
Latch
S
+5V
A
Output
Logic
+5V
B
Output
Logic
V
CC
V
OUT
A
V
OUT
B
Gnd
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Electrical Characteristics: These specifications apply over the operating temperature range of the IC.
(V
IN
= V
CC
= 20V, Pins 4, 5, 12 &13 = 0V; unless otherwise stated.)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Absolute Maximum Ratings
CS3706
Logic Supply Voltage (VIN) ...................................................................................................................................................40.0V
Output Supply Voltage (VCC) ...............................................................................................................................................40.0V
Output Current (each output, source, or sink)
Steady State ...............................................................................................................................................................±500mA
Peak Transient for Less Than 100µs ...........................................................................................................................±1.5A
Capacitive Discharge Energy......................................................................................................................................20.0µJ
Digital Inputs (INV, NONINV)..............................................................................................................................................5.5V
Analog Inputs (STOP +, STOP -) ............................................................................................................................................V
IN
Inhibit Inputs (INHIBIT A, INHIBIT B, INHIBIT REF)......................................................................................................5.5V
Operating Temperature Range .......................................................................................................................................0 to 70ûC
Storage Temperature Range.......................................................................................................................................-65 to 150ûC
Lead Temperature Soldering
Wave Solder (through hole styles only).....................................................................................10 sec. max, 260¡C peak
Notes: All voltages are with respect to the four ground pins which must be connected together. All currents are positive into, negative out of the specified terminal.
VINSupply Current V
IN
= 40V, V
CC
= 20V, INV = 0V,
Unused pins = open. 8 12 mA
V
CC
Supply Current V
IN
= 20V, V
CC
= 40V, Outputs low 3 5 mA
V
CC
Leakage Current V
IN
= 0V, V
CC
= 40V 0.05 0.10 mA
Digital Input Low Level 0.8 V
Digital Input High Level 2.2 V
Digital Input Current V
I
= 0V -0.6 -1.0 mA
Digital Input Leakage V
I
= 5V 0.05 0.10 mA
Output High Sat., V
C-VOUTIOUT
= -50mA 2.0 V
Output High Sat., V
C-VOUTIOUT
= -500mA 2.5 V
Output Low Sat., V
OUT
I
OUT
= 50mA 0.4 V
Output Low Sat., V
OUT
I
OUT
= 500mA 2.5 V
Inhibit Threshold V
REF
= 0.5V 0.4 0.6 V
Inhibit Threshold V
REF
= 3.5V 3.3 3.7 V
Inhibit Input Current V
REF
= 0V -10 -20 µA
Analog Threshold V
CM
= 0V to 15 V 100 130 150 mV
Analog Input Bias Current V
I
= 0V, V
CM
= 15V -10 -20 µA
Thermal Shutdown Turn on 155 ûC
Thermal Shutdown Turn off 125 ûC
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CS3706
Typical Switching Characteristics: (V
IN
= V
CC
= 20V, TA = 25ûC. Delays measured 50% in to 50% out.)
PARAMETER TEST CONDITIONS OUTPUT CL= UNIT
From Inv. Input to Output: open 1.0 2.2 nF
Rise Time Delay 110 130 140 ns
10% to 90% Rise 20 40 60 ns
Fall Time Delay 80 90 110 ns
90% to 10% Fall 25 30 50 ns
From N.I. Input to Output:
Rise Time Delay 120 130 140 ns
10% to 90% Rise 20 40 60 ns
Fall Time Delay 100 120 130 ns
90% to 10% Fall 25 30 50 ns
V
C
Cross-Conduction Output Rise 25 ns
Current Spike Duration Output Fall 0 ns
Inhibit Delay Inhibit Ref. = 1V
Inhibit = 0.5 to 1.5V 250 ns
Analog Shutdown Delay Stop (+) Ref. = 0
Stop (-) Input = 0 to 0.5V 180 ns
Package Pin Description
PACKAGE PIN # PIN SYMBOL FUNCTION
16L PDIP
(Internally Fused Leads)
1 INHIBIT B Control pin for deadband control on Channel B.
2 INV Inverting input for output drivers.
3 NONINV Noninverting input for output drivers.
4 Gnd Ground.
5 Gnd Ground.
6V
OUT(A)
Channel A output.
7 F/F ENABLE Controls the phase of the two outputs.
F/F ENABLE = Gnd Out of phase.
F/F ENABLE = floating In phase.
8VCCSupply voltage (5V to 40V) for output drivers.
9 STOP - Inverting input for stop latch comparator.
10 STOP + Noninverting input for stop latch comparator.
11 V
OUT(B)
Channel B output.
12 Gnd Ground.
13 Gnd Ground.
14 V
IN
Supply voltage (5V to 40V) for IC (except output driver).
15 INHIBIT REF Reference input for deadband control.
16 INHIBIT A Control pin for deadband control on channel A.
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Outputs
The totem-pole outputs have been designed to minimize
cross-conduction current spikes while maximizing fast,
high-current rise and fall times. Current limiting can be
done externally either at the outputs or at the common
V
CC
pin. The output diodes included have slow recovery
and should be shunted with high-speed external diodes
when driving high-frequency inductive loads.
Flip/Flop
Grounding F/F Enable activates the internal flip-flop to
alternate the two outputs. With pin open, the two outputs
operate simultaneously and can be paralleled for higher
current operation. Since the flip-flop is triggered by the
digital input, an off-time of at least 200nsec. must be provided to allow the flip/flop to change states. Note that the
circuit logic is configured such that the ÒOFFÓ state is
defined as the outputs low.
Digital Inputs
With both an inverting and non-inverting input available,
either active-high or active-low signals may be accepted.
These are true TTL compatible inputsÐthe threshold is
approximately 1.2V with no hysteresis; and external pullup resistors are not required.
Inhibit Circuit
Although it may have other uses, this circuit is included to
eliminate the need for deadband control when driving relatively slow bipolar power transistors. A diode from each
inhibit input to the opposite power switch collector will
keep one output from turning on until the other has
turned-off. The threshold is determined by the voltage on
INHIBIT REF which can be set from 0.5 to 3.5 V. When this
circuit is not used, ground INHIBIT REF and leave INHIBIT A&B open.
Analog Shutdown
This circuit is included to get a latched shutdown as close
to the outputs as possible, from a time standpoint. With an
internal 130mV threshold, this comparator has a commonmode range from ground to (VIN- 3V). When not used,
both inputs should be grounded. The time required for
this circuit to latch is inversely proportional to the amount
of overdrive but reaches a minimum of 180nsec. As with
the flip-flop, an input off-time of at least 200nsec is
required to reset the latch between pulses.
Supply Voltage
With an internal 5V regulator, this circuit is optimized for
use with a 7 to 40V supply, however, with some slight
response time degradation, it can also be driven from 5V.
When VINis low, the entire circuit is disabled and no current is drawn from VCC. When combined with a CS384X
PWM, the Driver Bias switch can be used to supply VINto
the CS3706. VINswitching should be fast as undefined
operation of the outputs may occur with VINless than 5V.
Thermal Considerations
Should the chip temperature reach approximately 155ûC, a
parallel, non-inverting input is activated driving both outputs to the low state.
Circuit Description
INV. N.I. OUT
HH L
LHH
HL L
LLL
Truth Table
OUT = INV and N.I.
OUT = INV or N.I.
CS3706
Page 5
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CS3706
Application Diagram
5V
14V
10W
Input
3k
2k
V
IN
REF
CS3706
NONINV
INV
F/F ENABLE
Gnd
V
CC
INHIBIT B
INHIBIT A
V
V
OUTA
OUTB
.047mF
100W
100W
.047mF
10k
10k
100mF
R
L
Page 6
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Rev. 4/29/99
© 1999 Cherry Semiconductor Corporation
Cherry Semiconductor Corporation reserves the
right to make changes to the specifications without
notice. Please contact Cherry Semiconductor
Corporation for the latest available information.
Part Number Description
CS3706GNF16 16 Lead PDIP
(Internally Fused Leads)
D
Lead Count Metric English
Max Min Max Min
16L PDIP 19.69 18.67 .775 .735
(Internally Fused Leads)
16 Lead PDIP
Thermal Data (Internally Fused Leads)
R
QJC
typ 15 ûC/W
R
QJA
typ 50 ûC/W
Package Specification
PACKAGE DIMENSIONS IN mm (INCHES)
PACKAGE THERMAL DATA
Ordering Information
CS3706
Plastic DIP (N); 300 mil wide
0.39 (.015)
MIN.
2.54 (.100) BSC
1.77 (.070)
1.14 (.045)
D
Some 8 and 16 lead
packages may have
1/2 lead at the end
of the package.
All specs are the same.
.203 (.008)
.356 (.014)
REF: JEDEC MS-001
3.68 (.145)
2.92 (.115)
8.26 (.325)
7.62 (.300)
7.11 (.280)
6.10 (.240)
.356 (.014)
.558 (.022)
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