Datasheet CN-0205 Datasheet (ANALOG DEVICES)

Circuit Note

engineers. Standard engineering practices have been employed in the design and construction of
each circuit, and their function and performance have been tested and verified in a lab environment at

suitability and applicability for your use and application. Accordingly, in no event shall Analog Devices
be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause

RBIP

50Ω

RBIN

50Ω

67

66

IBBN

IBBP

AD9122

ADL5375-05

RBQN

50Ω

RBQP

50Ω

59

58

21

22

9

10

RSLI

100Ω

RSLQ

100Ω

IOUT1N

IOUT1P

IOUT2P

IOUT2N

QBBP

QBBN

09740-001

LOW-PASS

FILTER

LOW-PASS

FILTER

Circuits from the Lab™ reference circuits are engineered and
tested for quick and easy system integration to help solve today’s
analog, mixed-signal, and RF design challenges. For more
information and/or support, visit www.analog.com/CN0205.

Interfacing the ADL5375 I/Q Modulator to the

AD9122 Dual Channel, 1.2 GSPS High Speed DAC

EVALUATION AND DESIGN SUPPORT

Circuit Evaluation Boards
AD9122/ADL5375 Evaluation Board (AD9122-M5375-EBZ)
Design and Integration Files
Schematics, Layout Files, Bill of Materials

CIRCUIT FUNCTION AND BENEFITS

This circuit provides a simple and flexible interface between
the AD9122 dual high speed TxDAC digital-to-analog
converter and the ADL5375-05 broadband I/Q modulator.
Because the DAC outputs and ADL5375-05 I/Q modulator
inputs share a common bias level of 0.5 V, there is no need
for any active or passive level shifting circuitry. The dc coupled
interface facilitates I/Q modulator local oscillator (LO) leakage
compensation by the DAC.

CN-0205

Devices Connected/Referenced

AD9122

ADL5375 Broadband Quadrature Modulator

The 1.2 GSPS AD9122 DAC sampling rate and the wide
bandwidth of the ADL5375-05 modulator I and Q inputs
ensure that both zero-IF (ZIF) or complex-IF (CIF)
architectures can be supported. In addition to filtering Nyquist
images, the baseband filter provides excellent rejection of both
differential-mode and common-mode DAC spurs.

CIRCUIT DESCRIPTION

The circuit and board shown in Figure 1 and Figure2 utilize the

AD9122 TxDAC and the ADL5375-05 wideband transmit

modu lator. Signal biasing and scaling in the interface circuit is
controlled by the four ground-referenced resistors (RBIP, RBIN,
RBQP, RBQN) and the two shunt resistors (RSLI,RSLQ),
respectively.

Dual Channel, 1.2 GSPS, 16-Bit, TxDAC®
Digital-to Analog Conver ter

Rev. 0

Circuits from the Lab™ circuits from Analog Devices have been designed and built by Analog Devices

room temperature. However, you are solely responsible for testing th e circuit and determi ning its

whatsoever connected to the use of any Circuits from the Lab circuits. (Continued on last page)

Figure 1. Interface Between the AD9122 and ADL5375-05 with 50 Ω Resistors to Ground to Establish the

500 mV DC Bias for the ADL5375-05 Baseband Inputs (Simplified Schematic)

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]
Fax: [phone] ©2011 Analog Devices, Inc. All rights reserved.

www.analog.com

CN-0205 Circuit Note

TOP VIEW

AD9122

DAC

ADL5375

MODULATOR

BOTTOM VIEW

FILTER

09740-002

[ ]
[ ]

LB

LB

FSSIGNAL

RR

RR

IV

+×

××

×=

2

2

Figure 2. AD9122-M5375-EBZ Evaluation Board for Circuit Implementation

The DA C’s full-scale output current (I

) is programmable from

FS

10 mA to 30 mA. The nominal and default value is 20 mA. In
this configuration, the DAC outputs swing from 0 mA to 20 mA
across each of the four ground-referenced 50 Ω resistors (R
RBIP = RBIN = RBQP = RBQN). This establishes the 500 mV
dc bias level and a full-scale voltage swing of 2 V p-p differential
on each output pair (with no load). This 2 V p-p voltage swing
can be adjusted by the R

(RL = RSLI = RSLQ) shunt resistors

L

without affecting the 500 mV bias level. The resulting
differential peak-to-peak swing at the I/Q modulator input
is given by the equation

Note that the relatively high differential input impedance of the

ADL5375 (typically >60 kΩ) can be ignored when calculating

this signal level. Figure 3 shows the relationship between the

=

B

peak-to-peak voltage swing and R

when 50 Ω bias-setting

L

resistors are used.

The ADL5375-05 and AD9122 are well matched in terms of
dynamic range and gain. As a result, there is no need for any
active gain between the devices. The I/Q modulator drive level
can be fine tuned as needed by adjusting the value of R

L

as
described above. For most applications, a value of 100 Ω for
R

is recommended. This results in a full-scale signal level of

L

1 V p-p (DAC output at 0 dBFS).

Rev. 0 | Page 2 of 9

Circuit Note CN-0205

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

10 100 1k 10k

DIFFERENTIAL SWING (V p-p)

R

L

(Ω)

09740-003

RBIP

50Ω

RBIN

50Ω

67

66

21

22

IBBN

IBBP

AD9122 ADL5375-05

RBQN

50Ω

RBQP

50Ω

59

58

9

10

RSLI

100Ω

RSLQ

100Ω

OUT1_N

OUT1_P

OUT2_P

OUT2_N

QBBP

QBBN

LPI

771.1nH

LNI

771.1nH

53.62pF
C1I

350.1pF
C2I

LNQ

771.1nH

LPQ

771.1nH

53.62pF
C1Q

350.1pF
C2Q

09740-004

1 10 100

–60

–50

–40

–30

–20

–10

0

0

6

12

18

24

30

36

GROUP DEL AY ( ns)

FREQUENCY (MHz)

MAGNITUDE ( dB)

MAGNITUDE

GROUP DEL AY

09740-005

Figure 3. Peak-to-Peak Differential Swing and the Swing Limiting

Baseband Filtering

A filter must be inserted between the AD9122 and ADL5375 to
remove Nyquist images, spurs, and broadband noise originating
from the DAC. The filter should be placed between the dc bias
setting resistors and the ac swing-limiting resistor. With this
configuration, the dc bias setting resistors (R
the signal scaling resistors (R
source and load resistances for the filter design.

Figure 4 shows a third-order Bessel low-pass filter with a −3 dB
frequency of 10 MHz. Matching input and output impedances of
the filter makes the filter design easy and results in better
passband flatness, which allows wide bandwidth filter designs.
In this example, the shunt resistor chosen is 100 Ω, producing
an ac swing of 1 V p-p differential. The frequency response of
this filter is shown in Figure 5.

Figure 4. DAC Modulator Interface with 10 MHz Third-Order, Bessel Filter

Resistor (R

) with 50 Ω Bias-Setting Resistors

L

B

in Figure 4) conveniently set the

L

in Figure 4) and

Filtering for Complex IF (CIF) Applications

Figure 6 shows the frequency response of the ADL5375
baseband I and Q inputs. Because this device has a wide and flat
frequency response (−3 dB point = 750 MHz), it is well suited to
complex IF (CIF) applications where the output signal from the
DAC has been digitally upconverted. In CIF applications, a low­pass Nyquist filter is still desirable, primarily because the dc bias
level can be preserved from the DAC output to the modulator
input.

The filter topology shown in Figure 7 is a 5
filter with a 300 MHz corner frequency and is the
recommended filter topology. A purely differential filter can
reject differential-mode images, spurs, and noise from the DAC.
Using two capacitors with their common connection grounded
(C2 and C4 in Figure 7) diverts some of the common-mode
current to ground and results in better common-mode rejection
of high-frequency signals than would be obtained with a purely
differential filter.

The simulated and measured responses of this filter are shown
in Figure 8 and Figure 9. The measured flatness is ±0.6 dB from
dc to 250 MHz and ±0.4 dB from 125 MHz to 250 MHz. This
data was taken with the AD9122 inverse sinc function on. In
this configuration, Figure 10 shows the common-mode
rejection performance of the 2 × F
common-mode frequency with and without IF filter shown in
Figure 7.

Rev. 0 | Page 3 of 9

Figure 5. Frequency Response for DAC Modulator Interface with

10 MHz Third-Order Bessel Filter

th

order Butterworth

common-mode spur vs.

DAC

CN-0205 Circuit Note

–6.0

–5.0

–4.0

–3.0

–2.0

–1.0

0

1.0

1M 10M 100M 1G

BASEBAND FREQUE NCY RESPONSE (dB)

BB FREQUENCY (Hz)

09740-006

RBIP

50Ω

RBIN

50Ω

67

66

C1I

3.6pF

C2PI

22pF

C4PI
3pF

C2NI
22pF

C4NI
3pF

L1PI

33nH

L2PI

33nH

IBBN

IBBP

AD9122

ADL5375-05

RBQN

50Ω

RBQP

50Ω

59

58

RSLI

100Ω

RSLQ

100Ω

IOUT1N

IOUT1P

IOUT2P

IOUT2N

QBBP

QBBN

09740-007

L1NI

33nH

L2NI

33nH

C3I

6pF

C1Q

3.6pF

C2NQ

22pF

C4NQ
3pF

C2PQ

22pF

C4PQ
3pF

L1NQ

33nH

L2NQ

33nH

L1PQ

33nH

L2PQ

33nH

C3Q

6pF

21

22

9

10

0

–5

–10

–15

–20

–25

1 10 100 500

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

MAGNITUDE ( dB)

GROUP DEL AY ( ns)

FREQUENCY (MHz)

MAGNITUDE

GROUP DEL AY

09740-008

–40

–30

–20

–10

0

0 100 200 300 400 500

FILTER RESPONSE (dBm)

FREQUENCY (MHz)

09740-009

–120

–110

–100

–90

–80

–70

–60

–50

–40

–30

–20

–10

0

300 400 500 600 700 800 900 1000

OUTPUT POWER OF COMMON MODE (dBm)

COMMON MODE FREQ UE NCY (MHz)

09740-010

NO FILTER

WITH FILTER

Figure 8 . Frequency Response for DAC Modulator Interface with 300 MHz

Fifth-Order Butterworth Filter (Simulated)

Figure 6. Baseband (BB) Frequency Response of ADL5375-05

Figure 7. Recommended DAC Modulator Interface topology with Fc =300

MHz Fifth-Order, Butterworth Filter

Figure 9. Measured Frequency Response for DAC Modulator Interface with

300 MHz Fifth-Order Butterworth Filter

Figure10. Measured Common-Mode Rejection Performance at ADL5375-05

RF output with Filter and without Filter

Rev. 0 | Page 4 of 9

Circuit Note CN-0205

09740-011

RBIP

45.3Ω

RBIN

45.3Ω

67

66

21

22

OUT1_N

OUT1_P

IBBN

IBBP

5V

AD9122 ADL5375-15

RLIP

3480Ω

RLIN

3480Ω

RBQN

45.3Ω

RSQP

1kΩ

RBQP

45.3Ω

59

58

9

10

OUT2_P

OUT2_N

QBBP

QBBN

5V

RLQN

3480Ω

RLQP

3480Ω

RSQN

1kΩ

RSIP

1kΩ

RSIN

1kΩ

09740-012

Figure 11. Spreadsheet to Calculate Modulator Output Power

Calculating the Output Power of the AD9122 and the ADL5375

In addition to the bias-setting and signal scaling resistors, the
power level at the output of the ADL5375 is a function of the
DAC’s digital backoff level (dBFS), the signal’s peak-to-average
ratio, the DAC’s full-scale current, the insertion loss of the
Nyquist filter, and I/Q modulator’s voltage gain. The
spreadsheet shown in Figure 11 can be used to make this
calculation.

This spreadsheet can be downloaded using the following URL:

www.analog.com/CN0205-PowerCalculator.

Level Shifting to Drive the ADL5375-15

The ADL5375-15 requires a dc bias level of 1500 mV. Other
than the difference in bias levels, the ADL5375-05 and

ADL5375-15 are identical. To drive the ADL5375-15 from the
AD9122, either a passive or active level-shifting network must

be used. The passive level shifting network shown in Figure 12
uses four series resistors along with four pull-up resistors to
achieve a bias level of 1500 mV at the ADL5375-15 input. This
passive level shifting network introduces a loss of
approximately 2 dB in the signal level.

An active level shifting circuit would use a dual-differential
amplifier, such as ADA4938, where placing 1500 mV on the
VOCM pin sets the output dc bias level. In this approach,
however, the interface bandwidth is limited by the op amp.

Figure 12. Passive Level-Shifting Network For Biasing ADL5375-15 from the

AD9122 TxDAC

As previously mentioned, it is necessary to put a filter between

AD9122 and ADL5375-15. The LC filter can be located

anywhere between the DAC termination resistors (R1 in Figure 13)
and the ac swing-limiting resistor (R4 in Figure 13). However,
the circuit in Figure 13 allows flexibility in the design of the
level shifting circuit with low loss by R2 and a high driving
level to modulator. It also allows a matched filter at source and
load impedance. Figure 13 is the recommended passive level­shifting network with filter.

Rev. 0 | Page 5 of 9

CN-0205 Circuit Note

AD9122

LC FILTER

IOUT_P

R1

R1

R2

R2

A

A

B

B

IOUT_N

ADL5375-15

REQUIRED DC LE V EL
B = 1.5V

R3

R4

R3

V1

09740-013

34.0
218
760
750

20

5.00

31.70

0.50

0.63

1.50

0.34

–5.43

504
502

SETUP

R1 (Ω)

R2 (Ω)

R3(Ω)

R4 (Ω)

IFS (MA)

V1 (V)
DAC R

(SINGLE)

FILTER

INPUT IMPEDANCE (Ω)

OUTPUT IMPEDANCE (Ω)

DAC

DAC

COMMON VOLTAGE (V)

DAC SWING ( V p_p)

(SINGLE)

MOD

MODULATOR

COMMON VOLTAGE (V)

MOD INPUT SWING

(V p_p)

(SINGLE)

LOSS BY R2 ( DB)

09740-014

09740-015

The LC filter should be placed close to the DAC to allow short
return current path. The 5 V bias supply (V1) should be close
to the modulator because it is shared with the modulator. For
the case when R1, R2, R3, and R4 are 34 Ω, 218 Ω, 760 Ω, and
750 Ω, respectively, the 500 mV dc bias at the AD9122 DAC
output is matched to the 1500 mV dc bias at ADL5375-15.
Actually, it is not necessary to be 500 mV at point A of Figure
13, but it will give flexibility in the ac swing level without
exceeding the compliance voltage of the DAC output. The DAC
load is 31.7 Ω. The input and output impedance of the filter are
504 Ω and 502 Ω. The attenuation by R2, which is the voltage
drop by R2 between the DAC output and modulator input, is
set by the combination of R2 and R3||(R4/2),which is about 5.4 dB.

To calculate dc bias level and ac swing level at the A and B
points (Figure 13), attenuation by R2, and source/load
impedances of the filter, the spreadsheet below can be used.
This can be downloaded at the following URL:

www.analog.com/CN0205-LevelShifter.

The ADIsimRF tool can also be used to perform DAC­modulator power level calculations. The tool can be
downloaded from www.analog.com/ADIsimRF.

Layout Recommendations

Special care should be taken in the layout of the
DAC/modulator interface. Here are some recommendations.
Figure 15 shows a top-level layout, which follows these
recommendations:

• Keep all I/Q differential trace lengths well matched.

Figure13. Recommended Passive Level-Shifting Network with LC Filter

The differential source impedance and load impedance of the
filter are

2 × (R1 + R2) and

2 × {R3||(R4/2)}, respectively.

The single-ended impedance seen by DAC is

R1||{R2+R3||(R4/2)}.

R4 acts as the ac load to the DAC. The differential ac swing at
DAC output is

2 × I

× R1||{R2+R3||(R4/2)},

FS

and the differential ac swing at the modulator input is

2 × {R3||(R4/2)}÷{R2+(R3||(R4/2)}

multiplied by the differential ac swing at DAC output.

Figure14. Spreadsheet for the Level Shifting Circuit

• Place filter termination resistor as close as possible to

modulator input.

• Place DAC output 50 Ω resistors as close as possible to

DAC.

• Thicken trace widths through the filter network to

reduce signal loss.

• Place vias around all DAC output traces, filter

networks, modulator output traces, and LO input
traces.

• Route LO and modulator outputs on different layers

or at 90° angle to each other to prevent coupling.

Figure15. General Layout Recommendations

Rev. 0 | Page 6 of 9

Circuit Note CN-0205

I

OUT1

I

OUT1

20mA TO 0mA

AD9122

0mA TO 20mA

50Ω

SPECTRUM
ANALYZER

DPG

DATA

PATTERN

GENERATOR

SIGNAL

GENERATOR

FOR F

DAC

F

DAC

F

DATA

ADL5375-05

I

OUT2

I

OUT2

SIGNAL

GENERATOR

FOR LO

LO

100Ω

100Ω

BB

FILTER

AD9122-M5375-EBZ

POWER SUPPLY

5V

J9

J1

J6

PC

DPG
DOWNLOADER
SOFTWARE

AD9122

SOFTWARE

USB

USB

50Ω

50Ω

50Ω

BB

FILTER

20mA TO 0mA

0mA TO 20mA

09740-016

Figure 16. Test Setup Functional Block Diagram

Further insight to proper layout can be found by examining the
AD9122-M5375-EBZ layout files in the design support package

www.analog.com/CN0205-DesignSupport.

COMMON VARIATIONS

The interface described in this circuit note can be used between
any TxDAC digital-to-analog converter (AD9779A, AD9788,

AD9125, AD9148) that is set for 20 mA full-scale current and

the ADL5370, ADL5371/ADL5372, ADL5373, ADL5374,

ADL5385, ADL5386, etc., family of I/Q modulators that require

0.5 V baseband dc bias levels.

The interface can also be adapted to the AD8345/AD8349 low
current modulators, with some adjustment to the bias level by
properly selecting the DAC termination resistors.

CIRCUIT EVALUATION AND TEST

The following section describes details of performing the
common-mode test (results shown in Figure 10). The test setup
is flexible and allows other measurements shown in this circuit
note to be performed.

Equipment Needed (Equivalents Can be Substituted)

• DPG : ADI Digital Pattern Generator

• Signal Generator for clock: Agilent E4437B

• Signal generator for LO: Agilent 8665B

• Spectrum analyzer: Agilent E4440A

• Power supply: Agilent E3631A

Rev. 0 | Page 7 of 9

Setup and Test

1. Connect the setup and measurement system shown in

Figure 16.

2. Set the power supply to +5 V.

3. Set the signal generator for F

to 368.64 MHz @ 5 dBm,

DAC

and the signal generator for LO to 2140 MHz @ 0 dBm.

4. Turn on the power supply and signal generators. Set the

spectrum analyzer at 2 × F

MHz, 1 MHz span.

DAC

5. Set up the AD9122 through USB at AD9122/AD9125

SPI control software as shown in Figure 17 and run.
Refer to the AD9122 Evaluation Board Quick Start
Guide in www.analog.com-CN0205-DesignSupport.

• Interpolation ("1" in Figure 17) : 1×

• Fine modulation ("2" in Figure 17) : ON

• Data rate ("3" in Figure 17) : same as F

frequency

• NCO frequency ("4" in Figure 17) : 173.32 MHz

6. Set up DPG (refer to AD9122 Evaluation Board Quick

Start Guide)

• Make sure DCO frequency ("1" in Figure 18)

is close to FDAC frequency.

• Set sample rate ("2" in Figure 18) same as

F

frequency and 1 MHz at desired

DAC

frequency.

DAC

CN-0205 Circuit Note

09740-017

09740-018

• Set "3" and "4 "as shown in Figure 18.

• Download I and Q vector by clicking buttons

at "1" in Figure 18.

7. Measure common-mode noise levels at 2 × F

DAC

8. Change frequency of signal generator for F

“Data Rate” mentioned in (5), and “Sample Rate”
mentioned in (6)

9. Measure common-mode noise levels at 2 × F

10. Repeat (8), (9)

, change

DAC

DAC

(NEW)

Figure 17. SPI Control User Interface Setup for Data Clock and NCO Control

Figure 18. Setting up the DPG Using the DPG Downloader Software

Rev. 0 | Page 8 of 9

Circuit Note CN-0205

LEARN MORE

CN0205 Design Support Package:

www.analog.com/CN0205-DesignSupport

MT-016 Tutorial, Basic DAC Architectures III: Segmented DACs.

Analog Devices.

MT-017 Tutorial, Oversampling Interpolating DACs, Analog

Devices.

MT-031 Tutorial, Grounding Data Converters and Solving the

Mystery of 'AGND' and 'DGND'. Analog Devices.

MT-101 Tutorial, Decoupling Techniques, Analog Devices.

CN-0021 Circuit Note, Interfacing the ADL5375 I/Q Modulator

to the AD9779A Dual-Channel, 1 GSPS High Speed DAC ,
Analog Devices.

CN-0134 Circuit Note, Broadband Low EVM Direct Conversion

Transmitte r , Analog Devices.

CN-0144 Circuit Note, Broadband Low EVM Direct Conversion

Transmitter Using LO Divide-by-2 Modulator, Analog
Devices.

Nash, Eamon. AN-1039 Application Note, Correcting

Imperfections in IQ Modulators to Improve RF Signal Fidelity,
Analog Devices.

Zhang, Yi. AN-1100 Application Note, Wireless Tranmitter I/Q

Balance and Sideband Suppression, Analog Devices.

Brandon, David and David Crook, Ken Gentile, AN-0996, The

Advantages of Using a Quadrature Digital Upconverter
(QDUC) in Point-to-Point Microwave Transmit Systems,

Analog Devices.

ADIsimPLL Design Tool

ADIsimRF Design Tool

AD9122 Evaluation Board Quick Start Guide

Analog Devices Data Pattern Generator (DPG)

Data Sheets and Evaluation Boards

AD9122 Data Sheet

ADL5375 Data Sheet

AD9122 Evaluation Board

ADL5375-05 Evaluation Board

AD9122-M 5375-EBZ Evaluation Board

REVISION HISTORY

8/11—Revision 0: Initial Version

(Continued from first page ) Circuits from the Lab circuits are intended only for use with Analog Devices products and are the intellectual property of Analog Devices or its licensors. While you
may use the Circuits from the Lab circuits in the design of your product, no other license is granted by implication or otherwise under any patents or other intellectual property by
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©2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
CN09740-0-8

/11(0)

Rev. 0 | Page 9 of 9