Datasheet CMX602AP3, CMX602AD4 Datasheet (MX COM Inc)

COMMUNICATION ICs

g

Calling Line Identifier/Calling

DATA BULLETIN

Features Applications

Automatic CAS Dual Tone Detector

x

High Sensitivity, Low Falsing

Automatic CAS Duration Checking

1PA max. 'Zero-Power' Ring or Line

x

Polarity Reversal Detector

V23/Bell202 FSK Demodulator

x

with Data Retiming facility

PC Interrupt / Wake-up output to

x

minimize system operating power

Low Power Operation 0.5mA at 2.7V

x

DD

Line Identifier on Call Waitin

PRELIMINARY INFORMATION

x

Caller ID/Caller ID on Call Waiting

Telephones
Adjunct Boxes

Bellcore, ETSI, British Telecom, and

x

Mercury Systems

Computer Telephone Integration

x

Call Logging Systems

x

Voice Mail Equipment

x

CMX602A

AMPOUT

FSK

IN-

IN+

V

DD

V

BIAS

V

SS

RD

The CMX602A is a low power CMOS device used for the reception of physical layer signals in Bellcore's
Calling Identity Delivery (CID) and Calling Identity on Call Waiting (CIDCW) systems, British Telecom Calling
Line Identification Service (CLIP), the Cable Communications Association's Caller Display Services (CDS),
and similar evolving services. The CMX602A also meets the requirements of emerging Caller Identity with
Call Waiting Services (CIDCW).

This device includes a 'zero-power' ring or line polarity reversal detector, a dual-tone (2130Hz plus 2750Hz)
internally timed CPE Alerting Signal (CAS) detector, and a 1200-baud FSK Bell202/V23 compatible
asynchronous data demodulator with data retiming circuitry which removes the need for a UART in the
associated µC.

The CMX602A is suitable for use in systems using Bellcore specifications GR-30-CORE and SR-TSV­002476, British Telecom specifications SIN227 and SIN242, CCA TW/P&E/312, ETSI: ETS 300 659 parts 1
and 2 and ETS 300 778 parts 1 and 2, and Mercury Communications MNR 19.

This device may be used with a 2.7V to 5.5V supply and is available in the following packages:
16-pin SOIC (CMX602AD4) and a 16-pin PDIP (CMX602AP3).

CONTENTS

-

+

Input Signal
Amplifier

Power

Supply

Circuits

RT

Bandpass

Filter

XTAL XTAL

Demod

Level

Detector

Tone Alert

Detector

Xtal Osc and

Clock Dividers

Data

Retiming

Mode

Control

Logic

RXD
RXCLK

DET
IRQ

ZP

MODE

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Calling Line Identifier/Calling Line Identifier on Call Waiting 2 CMX602A PRELIMINARY INFORMATION

Section Page

1. Block Diagram................................................................................................................3

2. Signal List.......................................................................................................................4

3. External Components....................................................................................................5

4. General Description.......................................................................................................6

4.1 Mode Control Logic .......................................................................................................... 6

4.2 Input Signal Amplifier........................................................................................................ 6

4.3 Bandpass Filter................................................................................................................. 7

4.4 Level Detector .................................................................................................................. 8

4.5 FSK Demodulator............................................................................................................. 8

4.6 FSK Data Retiming........................................................................................................... 8

4.7 FSK Data Without Retiming.............................................................................................. 9

4.8 Tone Alert Detector ........................................................................................................ 10

4.9 Ring or Line Polarity Reversal Detector.......................................................................... 10

4.10 Xtal Osc and Clock Dividers........................................................................................... 12

5. Application ...................................................................................................................12

5.1 'On-Hook' Operation....................................................................................................... 12

5.1.1 Bellcore System......................................................................................................................12

5.1.2 British Telecom System..........................................................................................................13

5.1.3 Other 'On-Hook' Systems .......................................................................................................13

5.2 'Off-Hook' Operation....................................................................................................... 15

6. Performance Specification..........................................................................................17

6.1 Electrical Performance ................................................................................................... 17

6.1.1 Absolute Maximum Ratings....................................................................................................17

6.1.2 Operating Limits......................................................................................................................17

6.1.3 Operating Characteristics .......................................................................................................18

6.2 Packaging....................................................................................................................... 21

MX-COM, Inc. reserves the right to change specifications at any time and without notice.

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Calling Line Identifier/Calling Line Identifier on Call Waiting 3 CMX602A PRELIMINARY INFORMATION

1. Block Diagram

To / From µC

RXD

Data

FSK

RXCLK

Retiming

Demod

DET

IRQ

Level

Detector

Filter

Bandpass

Tone Alert

Mode

Detector

MODE

ZP

Logic

Control

XTAL

C1

3.579545MHz

X1

Xtal Osc and

Clock Dividers

C2

XTAL

RT

C5

AMPOUT

R8

R6

C6

Audio band

IN-

input

DD

V

R5

Power

Supply

BIAS

V

Circuits

SS

V

RD

-

+

Input Signal

Amplifier

IN+

DD

V

C9

C8

Ring or Line Polarity

Reversal Detector input

(components shown

for unbalanced input)

Figure 1: Block Diagram

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Calling Line Identifier/Calling Line Identifier on Call Waiting 4 CMX602A PRELIMINARY INFORMATION

2. Signal List

Pin No. Signal Type Description

1

XTAL

2 XTAL input Input to the on-chip Xtal oscillator inverter
3 RD input

4 RT input /

5 AMPOUT output Output of the on-chip Input Signal Amplifier
6 IN - input Inverting input to the on-chip Input Signal Amplifier
7 IN + input Non-inverting input to the on-chip Input Signal Amplifier

V

8
9

V

SS
BIAS

10 MODE

11 ZP input

12

IRQ

13 DET output Logic level output driven by the Ring or Line Polarity Reversal Detector, the

14 RXCLK input

15 RXD output Logic level output carrying either the raw output of the FSK Demodulator or

16

V

DD

output Output of the on-chip Xtal oscillator inverter

Input to the Ring or Line Polarity Reversal Detector

(S)

Open-drain output and Schmitt trigger input forming part of the Ring or Line

output

Polarity Reversal detector. An external resistor to V
V

should be connected to RT to filter and extend the RD input signal

SS

and a capacitor to

DD

power Negative supply
output

Internally generated bias voltage, held at V
'Zero-Power' mode. Should be bypassed to V

/2 when the device is not in

DD

by a capacitor mounted

SS

close to the device pins.

input

(S)

Input used to select the Tone Alert or FSK Level Detection operating mode.
See Section 4.1

High level on this input selects 'Zero-Power' mode, a low level input enables

(S)

the V

supply, the Input signal amplifier, the Bandpass Filter , and either

BIAS

the FSK or the Tone alert circuits depending on the MODE input

output Open-drain output (active low) that may be used as an Interrupt Request /

Wake-up input to the associated µC. Indicates CAS Dual Tone event of
correct duration when device is in Tone Alert Detect Mode. An external pull­up resistor should be connected between this output and V

DD

.

Tone Alert Detector or the FSK Level detect circuits, depending on the
operating mode. When device is in Tone Alert Mode, it may be used as a
near end voice mute control signal. See Section 4.1

Logic level input, which may be used to clock, received data bits out of the
FSK Data Retiming block. When held high disables FSK Data Retiming
block.

re-timed 8-bit characters depending on the state of the RXCLK input. See
Section 4.6

power Positive supply. Levels and thresholds within the device are proportional to

this voltage. Should be bypassed to V

by a capacitor mounted close to the

SS

device pins.

Notes: input (S) = Schmitt trigger input

Table 1 : Signal List

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Calling Line Identifier/Calling Line Identifier on Call Waiting 5 CMX602A PRELIMINARY INFORMATION

3. External Components

V

DD

C8

To/From µC

C9

Line

C1

C3

C4

C6

C7

R3

D1-D4

R4

R6

R7

R1

R2

C2

V

DD

R5

C5

R9 R10

A

Line

Protection

Network

B

XTAL

X1

XTAL

RD
RT

AMPOUT

R8

IN­IN+

V

SS

1
2
3
4

CMX602A

5
6
7
8

16
15
14
13
12
11
10

9

V

DD

RXD
RXCLK
DET
IRQ
ZP
MODE

V

BIAS

R11

Note:

provide a low impedance ground connection to the V

It is recommended that the printed circuit board provide a ground plane in the CMX602A area to

pin and to the bypass capacitors C8 and C9.

SS

Figure 2 : Recommended External Components for Bellcore and/or British Telecom Application

R1
R2 Note 1

470k

:r

r

1%
1%

R3, R4 C3, C4
R5, R6

:r

470k

1%
R7 C6, C7 680pF
R8 Note 2, 3

470k: @ 3.3V

r

1%

R11

100k

C1, C2 18pF

0.1PF

C5

C8,C9

0.33PF

0.1PF

:r

20%

r

20%

r

20%

r

20%

r

20%

r

20%

680k: @ 5.0V

R9 Note 2

240k: @ 3.3V

r

1%

X1 Note 4 3.579545MHz

r

0.1%

200k: @ 5.0V

R10

:r

160k

1%

D1 - D4 1N4004

Table 2: Recommended External Components

Recommended External Component Notes:

1. See Section 4.8

2. See Section 4.2

3. The recommended values of R8 were selected for applications in both Bellcore and British Telecom
Systems. Optimum Bellcore-only operation may be achieved by reducing the value of R8 e.g. to 656k
@ 5.0V.

4. For best results, a crystal oscillator design should drive the clock inverter input with signal levels of at
least 40% of V

, peak to peak. Tuning fork crystals generally cannot meet this requirement. To obtain

DD

crystal oscillator design assistance, consult your crystal manufacturer.

:

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Calling Line Identifier/Calling Line Identifier on Call Waiting 6 CMX602A PRELIMINARY INFORMATION

4. General Description

4.1 Mode Control Logic

The CMX602A's operating mode and the source of the DET and

outputs are determined by the logic

IRQ

levels applied to the MODE and ZP input pins.

ZP MODE Mode DET output from

IRQ output from

0 0 Tone Alert Detect Tone Alert Signal Detection Valid 'off-hook' CAS Duration.

Ring or Line Polarity Reversal Detector

0 1 FSK Receive FSK Level Detector FSK Data Retiming (if enabled). Ring or

Line Polarity Reversal Detector.

1 0 Zero-Power

Ring or Line Polarity

Ring or Line Polarity Reversal Detector.

Reversal Detector

1 1 Zero-Power

Ring or Line Polarity

None

Reversal Detector

In the 'Zero-Power' modes, power is removed from all of the internal circuitry except for the Ring or Line
Polarity Reversal Detector and the DET and

IRQ

outputs.

4.2 Input Signal Amplifier

The Input Signal Amplifier is used to convert the balanced FSK and Tone Alert signals received over the
telephone line to an unbalanced signal of the correct amplitude for the FSK receiver and Tone Alert Detector
circuits.

AMPOUT

C6

C7

R6

R7

R9 R10

A
B

R8

IN­IN+

V

SS

-

+

Input Signal
Amplifier

V

BIAS

C9

Figure 3: Input Signal Amplifier, balanced input configuration

The design equations for this circuit are:

V

Differential Voltage Gain

R6 = R7 = 470k R10 = 160k

AMPOUT

V

(B-A)

::

RR8

= R9 =

6

R8 R10

u

(R8 - R10)

The target differential voltage gain depends on the expected A and B input signal levels and the CMX602A's
internal overload and threshold levels, which are proportional to the supply voltage.

The CMX602A has been designed to meet the applicable specifications when R8 = 430k: at V
nominal, rising to 680k: at V
V

= 5.0V as indicated in Section 3 and as shown in Figure 5. Reference Notes found in Section 3.

DD

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= 5.0V (see note) and R9 = 240k: at V

DD

= 3.0V dropping to 200k: at

DD

DD

= 3.0V

Calling Line Identifier/Calling Line Identifier on Call Waiting 7 CMX602A PRELIMINARY INFORMATION

The Input Signal Amplifier may also be used to allow the CMX602A to operate from an unbalanced signal
source as shown in Figure 4. In this unbalanced signal configuration, the values of R6 and R8 are the same
as used for the balanced input configuration.

AMPOUT

A

C6

R8R6

IN­IN+

V

SS

-

+

Input Signal
Amplifier

V

BIAS

C9

Figure 4: Input Signal Amplifier, unbalanced input configuration

1000

900

800

700

600

R8

500

400

R8 and R9 kΩ

300

200

R9

100

0

33.5

4

V(Volts)

DD

4.5

Figure 5: Input Signal Amplifier, Optimum Values of R8 and R9 vs. V

55.5

DD

4.3 Bandpass Filter

The Bandpass Filter is used to attenuate out of band noise and interfering signals from reaching the FSK
Demodulator, Tone Alert Detector and Level Detector circuits. The characteristics of this filter differ between
FSK and Tone Alert modes. Switched Capacitor filter stages clocked at 57.7kHz provide primary filtering. If
the input signal is band limited to below 28.85kHz then external anti-aliasing filtering is not required.

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Calling Line Identifier/Calling Line Identifier on Call Waiting 8 CMX602A PRELIMINARY INFORMATION

4.4 Level Detector

The Level Detector block operates by measuring the level of the signal at the output of the Bandpass Filter. It
then compares it against a threshold, which depends on whether FSK Receive or Tone Alert Detect mode has
been selected.

In Tone Alert Detect mode the output of the Level Detector block provides an input to the Tone Alert Signal
Detector.

In FSK Receive mode the CMX602A DET output will be set high when the level has exceeded the threshold
for a sufficient duration. Amplitude and time hysteresis are used to reduce chattering of the DET output in
marginal conditions.

Note: In FSK Receive mode, this circuit may also respond to non-FSK signals such as speech.

t

DFOFF

Line Signal

DET

t

DFON

FSK signal

MODE, ZP

See Section 6.1 for definitions of t

FSK Receiver mode

DFON

and t

DFOFF

Figure 6: FSK Level Detector Operation

4.5 FSK Demodulator

The FSK Demodulator block converts the 1200 baud FSK input signal to a digital data stream which is output
via the RXD pin as long as the Data Retiming function is not enabled (Holding RXCLK continuously high).
The RXD output does not depend on the state of the FSK Level Detector output.

Note: In the absence of a valid FSK signal, the demodulator may falsely interpret speech or other extraneous

signals as data.

4.6 FSK Data Retiming

The Data Retiming block extracts the 8 data bits of each character from the received asynchronous data
stream and presents them to the PC under the control of strobe pulses applied to the RXCLK input. The
timing of these pulses is not critical, and they may easily be generated by a simple software loop. This facility
removes the need for a UART in the PC without incurring an excessive software overhead.

The block operates on a character by character basis by first looking for the mark to space transition which
signals the beginning of the start bit. Using this transition as a timing reference, the block samples the output
of the FSK Demodulator in the middle of each of the following 8 received data bits and stores the results in an
internal 8-bit shift register.

When the eighth data bit has been clocked into the internal shift register, the CMX602A examines the RXCLK
input. If RXCLK input is low, then the

data bits to the RXD output pin. Upon detecting that the
RXCLK pin high 8 times. The high to low transition at the end of the first 7 of these pulses will be used by the
CMX602A to shift the next data bit from the shift register onto the RXD output. At the end of the eighth pulse,
the FSK Demodulator output will be reconnected to the RXD output pin. The
first time the RXCLK input goes high.

Thus to use the Data Retiming function, the RXCLK input should be kept low until the
the Data Retiming function is not required the RXCLK input should continuously be kept high.

The only restrictions on the timing of the RXCLK waveform are those shown in Figure 7 and the need to
complete the transfer of all eight bits into the PC within 8.3ms (to empty the buffer before the next character is
received and put into the buffer).

output will be pulled low, thereby sending the first of the stored

IRQ

output has gone low, the PC should pulse the

IRQ

output will be cleared the

IRQ

output goes low; if

IRQ

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Calling Line Identifier/Calling Line Identifier on Call Waiting 9 CMX602A PRELIMINARY INFORMATION

Received Character 'n'

Output of FSK Demod:

ST ART

345678

STOP112

IRQ output:
RXCLK input:

RXD output:

8

Retimed data bits from

received character 'n'

IRQ

t

D

t

CLO

t

CHI

RXCLK

t

D

RXD

t

= Internal CMX602A delay (max 1PS); t

D

Data Bit 1 Data B it 2

= RXCLK low time (min 1PS); t

CLO

t

D

= RXCLK high time (min 1PS)

CHI

Figure 7: FSK Operation with Data Retiming

Note: If enabled, the Data Retiming block will interpret the FSK Channel Seizure signal (a sequence of

alternating mark and space bits) as valid received characters, with values of 55 (hex). Similarly it may
interpret speech or other signals as random characters.

4.7 FSK Data Without Retiming

If the Data Retiming facility is not required, the RXCLK input to the CMX602A should continuously be kept
high. The asynchronous data from the FSK Demodulator is then connected directly to the RXD output pin
and the

FSK Demod output:

output will not be activated by the FSK signal. This case is illustrated in Figure 8.

IRQ

Received Character 'n'

START

1

3

4

5

6

7

2

8

STOP

RXD output:

START

1

3

4

5

6

7

8

2

STOP

Figure 8: FSK Operation without Data Retiming (RXCLK always high)

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Calling Line Identifier/Calling Line Identifier on Call Waiting 10 CMX602A PRELIMINARY INFORMATION

4.8 Tone Alert Detector

The Tone Alert Detector block is enabled when the CMX602A is set to Tone Alert Detector operating mode. It
then monitors the received signal for the presence of simultaneous 2130Hz and 2750Hz tones of sufficient
level and duration.

Two digital bandpass filters, centered around 2130Hz and 2750Hz, are used within the block to provide
additional rejection of interfering signals.

The CMX602A DET output will be set high while Tone Alert signal is detected.
When DET goes low at the end of the Tone Alert signal, the

high for a period of time falling within the CAS qualifying time (t
remain low until the CMX602A is switched out of Tone Detect mode. This

valid CAS dual-tone has occurred.
Note: The t

timing has been optimized for the detection of 75 to 85ms CPE Alert Signals (CAS) used in

QCAS

off-hook applications. The longer (88ms to 110ms) Tone Alert signal employed by British Telecom for on­hook applications will not necessarily cause

Line Signal

t

DET

IRQ

DTON

to go low.

IRQ

Tone Alert signal

output will be pulled low, only if DET was

IR Q

) limits (See Section 6.1).

QCAS

falling transition indicates a

IRQ

t

DTOFF

IRQ will only be p u lle d low, if
DET output was high for t

QCAS

IRQ

will

MODE, ZP

See Section 6.1 for definitions of t

Tone Alert Detect mode Other mode

DTON

, t

DTOFF

and t

QCAS

Figure 9: Tone Alert Detector Operation

4.9 Ring or Line Polarity Reversal Detector

These circuits are used to detect the Line Polarity Reversal and Ringing signals associated with the Calling
Line Identification protocol. Figure 10 illustrates their use in a typical application.

DET
IRQ

ZP
MODE

DD

A

Line

B

Line

Protection

Network

C3

R3

R4

C4

Ring Signal

D1-D4

R1

R2

RD

FromTone Alert,
Energy Detector and
Data Retiming blocks

A

C5

RT

B

R5

V

Vt

RD

RT

IRQ for ZP or [ZP and MODE ]

LO HI LO

DET for ZP

HI

HI

V

SS

Vt

HI

V

SS

Figure 10: Ring or Line Polarity Reversal Operation

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Calling Line Identifier/Calling Line Identifier on Call Waiting 11 CMX602A PRELIMINARY INFORMATION

When no signal is present on the telephone line, RD will be at VSS and RT pulled to VDD by R5 so the output
of the Schmitt trigger 'B' will be low.

The ring signal is usually applied at the subscriber's exchange as an ac voltage. The ring signal is inserted in
series with one of the telephone wires and will pass through either C3 and R3 or C4 and R4 to appear at the
top end of R1 in a rectified and attenuated form.

The signal prior to R1 will be further attenuated by the potential divider formed by R1 and R2 before being
applied to the CMX602A input RD. If the amplitude of the signal appearing at RD is greater than the input
threshold (Vt

voltage at RT to V
go high, activating the DET and/or

) of Schmitt trigger 'A' then the N transistor connected to RT will be turned on, pulling the

HI

by discharging the external capacitor C5. The output of the Schmitt trigger 'B' will then

SS

outputs depending on the states of the MODE and ZP inputs.

IRQ

The minimum amplitude ringing signal that is certain to be detected is:

Where Vt

¨
©

is the high-going threshold voltage of the Schmitt trigger A (see Section 6.1).

HI

HI

R2

§

R1 R2 R3





0.7 Vt

·

0.707V

¸



¹

RMS

With R1, R3 and R4 all 470k: as indicated in Figure 2, then setting R2 to 68k: will guarantee detection of
ringing signals of 40V

and above for VDD = 2.7 to 5.5V.

RMS

A line polarity reversal may be detected using the same circuit but there will be only one pulse at RD. The
British Telecom specification SIN242 indicates that the circuit must detect a +15V to -15V reversal between
the two lines slewing in 30ms. For a linearly changing voltage at the input to C3 (or C4), then the voltage
appearing at the RD pin will be



and

t

·



¸

T

¸
¹

dV

is the input slew rate.

dt

where

§

dV

¨

C3 1 e R2

¨

dt

©

TC3R1R2R3





For dV/dt = 500V/sec (15V in 30ms), R1, R3 and R4 all 470k: and C3, C4 both 0.1PF as indicated in Figure
2, then setting R2 to 390k: will guarantee detection at V

DD

= 5.5V.

If the time constant of R5 and C5 is large enough then the voltage on RT will remain below the threshold of
the 'B' Schmitt trigger keeping the DET and/or

The time for the voltage on RT to charge from V

outputs active for the duration of a ring cycle

IRQ

towards VDD can be derived from the formula

SS



R5C5

t

·
¸

¸
¹

§
¨



VV1e

RT DD

¨
©

As the Schmitt trigger high-going input threshold voltage (VtHI) has a minimum value of 0.56 x VDD, then the
Schmitt trigger 'B' output will remain high for a time of at least 0.821 x R5 x C5 following a pulse at RD.

Using the values provided in Figure 2 (470k: and 0.33PF) gives a minimum time of 100ms (independent of
V

), which is adequate for ring frequencies of 10Hz or above.

DD

If necessary, the µC can distinguish between a ring and a reversal by timing the length of the

IRQ

or DET

output.

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Calling Line Identifier/Calling Line Identifier on Call Waiting 12 CMX602A PRELIMINARY INFORMATION

4.10 Xtal Osc and Clock Dividers

A 3.579545MHz clock present at the XTAL pin determines frequency and timing accuracy of the CMX602A.
This may be generated by the on-chip oscillator inverter using the external components C1, C2, and X1 of
Figure 2, or may be supplied from an external source to the XTAL input, in which case C1, C2, and X1 should
not be fitted.

The oscillator is turned off in the 'Zero-Power' modes.
If the clock is provided by an external source which is not always running, then the ZP input must be set high

when the clock is not available. Failure to observe this rule may cause a significant rise in the supply current
drawn by CMX602A as well as generating undefined states of the RXD, DET, and

IRQ

outputs.

5. Application

5.1 'On-Hook' Operation

The systems described in this section operate when the telephone set is not in use (on-hook) to display the
number of a calling party before the call is answered. System specific descriptions are provided as well as a
flowchart for on-hook applications (Figure 13).

5.1.1 Bellcore System

Figure 11 illustrates the line signaling and CMX602A input and output signals for the Bellcore 'On-Hook'
Caller ID system as defined in Bellcore documents GR-30-CORE and SR-TSV-002476 and also in ETS 300
659-1 Section 6.1.1.

As for the British Telecom system, the 'Chan Seize' signal is a '1010…' FSK bit sequence. The Bellcore
specifications do not require AC or DC line terminations while the FSK data is being received, however ETS
300 659-1 allows for the possibility of an AC termination begin applied.

Note: For simplicity of presentation, the Data Retiming function is not used in Figure 11 (RXCLK is kept high).

SIGNALING

RD
RT
IRQ
ZP
MODE
DET
RXD

FIRST

RING

3400 to 4400 mS

≥ 250mS

250mS 150m S

CHAN
SEIZE

MARK M ESSA GE

Figure 11: Bellcore System Signals

≥ 200mS

RINGING

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Calling Line Identifier/Calling Line Identifier on Call Waiting 13 CMX602A PRELIMINARY INFORMATION

5.1.2 British Telecom System

Figure 12 illustrates the line signaling and CMX602A input and output signals for the British Telecom 'On­Hook' Caller ID system as defined in the British Telecom specifications SIN227 and SIN242 part 1. A similar
system is described in ETSI 300 659-1 Section 6.1.2c.

The Tone Alert signal consists of simultaneous 2130Hz and 2750Hz tones. The 'Chan Seize' signal consists
of a '1010..' FSK bit sequence. Not shown are the requirements for AC and DC loads, including a short initial
Current Wetting Pulse, to be applied to the line 20ms after the end of the Tone Alert signal and to be
maintained during reception of the FSK signal.

Note: For simplicity of presentation, the Data Retiming function is not used in Figure 12 (RXCLK is kept high).

SIGNALING

Line

reversal

IDLE 1

100mS



< 4.8Sec

88-110mS >200mS80-262mS

TONE

ALERT

IDLE 2

45mS



< 4.8Sec

CHAN
SEIZE

45-75mS

 2.5Sec

MARK MESSAGE

RINGING

RD
RT

Note 2

IRQ
ZP
MODE
DET
RXD

Notes:

1. IDLE 1 + IDLE 2  5 sec

2. may go low at end of DET high period but this is not guaranteed.IRQ

Figure 12: British Telecom System Signals

5.1.3 Other 'On-Hook' Systems

ETS 300 659-1 also allows for systems where the FSK transmission is preceded by a Dual Tone Alert signal
similar to that used by British Telecom but without line reversal (ETS 300 659-1 Section 6.1.2a) or by a
Ringing Pulse alerting Signal (ETS 300 659-1 Section 6.1.2b).

The U.K. CCA (Cable Communications Association) specification TW/P&E/312 precedes the FSK signals by
a 200 to 450ms ring burst. AC and DC line terminations during FSK reception are optional.

Mercury Communications Ltd. Specification MNR 19 allows for either the British Telecom system or that
specified by CCA.

As these are all slight variants on the Bellcore and British Telecom systems, they can also be supported by
the CMX602A.

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Calling Line Identifier/Calling Line Identifier on Call Waiting 14 CMX602A PRELIMINARY INFORMATION

START:(BT)

CMX602A in ZP mode

Line Reversal

Detected ?

Yes

Set CMX602A to

Tone Alert Detect mode.

Start 5 second timeout.

CMX602A DET

output high ?

Yes

CMX602A DET

output low?

Yes

No

No

No

START:(Bellcore)

CMX602A in ZP mode

Ring signal

detected ?

Yes

End of

ring signal ?

Yes

Set CMX602A to

FSK Receive mode.

Start 5 second timeout.

No

No

Set CMX602A to

FSK Receive mode.

Restart 5 second timeout.

Wait 15ms

Apply

Current Wetting Pulse,

AC and DC terminations.

Read FSK Message,

display data if

checksum OK.

Clear timeout.

Remove any AC and DC

line terminations.
Set CMX602A to

Zero P ower mode.

END

Timeout

expired

Figure 13: Flow Chart for 'On-Hook' Operation of CMX602A

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Calling Line Identifier/Calling Line Identifier on Call Waiting 15 CMX602A PRELIMINARY INFORMATION

5.2 'Off-Hook' Operation

The CIDCW (Calling Identity on Call Waiting) system, as described in this section, operates when the
telephone set is in use (off-hook) to display the number of a waiting caller without interrupting the current call.

Bellcore documents GR-30-CORE and SR-TSV-002476, British Telecom specifications SIN227 and SIN242
part 2 and ETS 300-659-2 all describe similar systems in which a successful CIDCW transaction consists of a
sequence of actions between the near end CPE (Customer Premises Equipment - e.g. a telephone) and the
Central Office as indicated in Figure 14.

Signals originating
from far end CPE
and Central Office

far voice

CAS

FSK data

far voice

Signals originating
at near end CPE

near voice

A

ACK

B

CE

D

near voice

F

A. Normal conversation with both near and far voice present.
B. Central Office mutes far end voice, emits CAS, and becomes silent.
C. CPE recognizes CIDCW initiation and mutes near end voice and keypad.
D. CPE emits DTMF ACK to Central Office to signal its readiness to receive Caller ID data stream.
E. Central Office recognizes ACK and emits FSK Data stream of Caller ID data which is received and

decoded by CPE.

F. CIDCW transaction is complete. CPE unmutes near end voice and Central Office unmutes far end voice

returning to normal conversation with both near and far voice present.

Figure 14 CIDCW Transaction From Near End CPE Perspective

The CAS signal is transmitted by the Central Office to initiate a CIDCW transaction and consists of an 80ms
burst of simultaneous 2130Hz and 2750Hz tones.

CAS detection is very important because a 'missed' signal causes Caller ID information to be lost and a false
signal detection produces a disruptive tone which is heard by the far end caller. Because the CAS signals
must be detected in the presence of conversations, which both mask and masquerade as the tone signals,
this function is difficult to accomplish correctly.

Because the number of false responses (Talk-offs) and missed signals (Talk-downs) are related to the speech
levels at the CMX602A input, the level of near end speech from the local handset is normally greater than that
of far end speech coming from the Central Office. A further improvement in overall performance can be
obtained by taking the CMX602A's audio input from the receive side of the telephone set hybrid where this is
possible.

The internal algorithms used by the CMX602A to drive the DET and

outputs in Tone Alert Detect mode

IRQ

have been optimized for the detection of off-hook CAS signals in the presence of speech when used
according to the following principles:

1. If it is possible to mute the local speech from the microphone rapidly (within 0.5ms) without introducing
noise (i.e. where the CIDCW equipment is built into the telephone set), then this muting should be done
whenever the CMX602A is in Tone Alert Detect mode and the DET output is high. Doing this will
markedly reduce the number of false responses generated by local (near end) speech. Note that the
DET output is not used for any other purpose in an off-hook application when the CMX602A is set to
Tone Alert Detect mode.

2. When the

output goes low in Tone Alert Detect mode, this indicates that a CAS has been detected.

IRQ

The local handset and keypad should then be muted as required by the Bellcore specification and the
CMX602A switched to FSK Receive mode to be ready to receive the FSK data. Doing this will also clear
the

IRQ

output.

3. The CMX602A's DET output should be monitored for a period of 50ms after changing to FSK Receive
mode and before sending the ACK signal. The transaction should be abandoned if the DET output goes
high during this time, which would be the case if a false CAS detect had been caused by far end speech.

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Calling Line Identifier/Calling Line Identifier on Call Waiting 16 CMX602A PRELIMINARY INFORMATION

START

CMX602A in Tone Alert

Detect mode

IRQ output

low ?

Yes (See Note 2)

Mute local handset

and keypad.

See Note 1

Set CMX602A to

FSK Receive mode.

Start timer.

Timer > 50ms ?

Yes

Send ACK.

Start 2 second timeout.

Notes:

1. If it is possible to mute the speech output

2. The output will be reset by changing

No

No (See Note 3)

3. When monitoring the CMX602A DET output for

CMX602A DET

from the local microphone quickly and without
introducing noise, then this should be done
whenever the CMX602A DET output is high.

IRQ

from Tone Alert Detect to FSK Receive mode.

the 50ms period after changing to FSK mode
note that changing between Tone Alert Detect
and FSK Receive modes resets the DET output.
It will then remain low f o r at least 15m s, after
which if it does go high, it will remain high for at
least 8ms.

No

output high ?

Yes

Read FSK Message,

display data if

checksum OK.

Clear timeout.

Remov e mute from

handset and keypad.

Set CMX602A to

Tone Alert Detect mode.

2 second timeout

expired

Figure 15, Flow Chart for 'Off-Hook' Operation of CMX602A

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Calling Line Identifier/Calling Line Identifier on Call Waiting 17 CMX602A PRELIMINARY INFORMATION

6. Performance Specification

6.1 Electrical Performance

6.1.1 Absolute Maximum Ratings

Exceeding these maximum ratings can result in damage to the device.

Min. Max. Units

Supply (VDD - VSS)
Voltage on any pin to V

SS

Current into or out of VDD and VSS pins
Current into or out of any other pin -20 20 mA

D4 / P3 Package

Total Allowable Power Dissipation at T

Derating above 25°C

q

AMB

= 25°C

Storage Temperature -55 125 °C
Operating Temperature -40 85 °C

6.1.2 Operating Limits

Correct operation of the device outside these limits is not implied.

-0.3 7.0 V
V

-0.3

DD

+ 0.3

V

-30 30 mA

800 mW

13 mW/°C above 25°C

Notes Min. Max. Units

Supply (V

DD

- VSS)

12.7 5.5V

Operating Temperature 1 -40 85 °C
Xtal frequency 2 3.575965 3.583125 MHz

Operating Limits Notes:

1. Operating temperature range –10qC to 60qC at V

< 3.0V.

DD

2. A Xtal frequency of 3. 579545MHz ±0.1% is required for correct Tone Alert and FSK detection.

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Calling Line Identifier/Calling Line Identifier on Call Waiting 18 CMX602A PRELIMINARY INFORMATION

6.1.3 Operating Characteristics

For the following conditions unless otherwise specified:
V

= 2.7V at T

DD

Xtal Frequency = 3.579545MHz r 0.1%, 0dBV corresponds to 1.0V

= 10°C to 60°C and V

AMB

= 3.0V to 5.0V at T

DD

= -40°C to 85°C

AMB

RMS

Notes Min. Typ. Max. Units

DC Parameters

IDD (ZP input high) at V
IDD (ZP input low) at V
IDD (ZP input low) at V
Logic 1 input level

DD
DD
DD

= 5.0V
= 3.0V
= 5.0V

1,2 0.02 1.0

A

P

10.51.0mA

11.02.0mA
70%

V

DD

(RXCLK and XTAL inputs)
Logic 0 input level

30%

V

DD

(RXCLK and XTAL inputs)
Logic input leakage current

(V

= 0 to VDD) excluding XTAL input

IN

Output logic 1 level (l
Output logic 0 level (l

output 'off' state current

IRQ

= VDD)

(V

OUT

= 360µA) VDD - 0.4

OH

= 360µA)

OL

-1.0 1.0

0.4 V

1.0 µA

A

P

V

Schmitt Trigger input thresholds
(Figure 16)

High going (VtHI) (0.56)(VDD) (0.56)(VDD) + 0.6
Low going (VtLO) (0.44)(VDD) - 0.6 (0.44)(V

DD

)

V
V

Tone Alert Detector

'Low' tone nominal frequency 2130 Hz
'High' tone nominal frequency 2750 Hz
Start of Tone Alert signal to DET high time

(t
End of Tone Alert signal to DET and

low time (t
DET high time to ensure

(t

Figure 9)

DTON

see Figure 9)

QCAS

DTOFF

Figure 9)

IRQ

IRQ

goes low

To ensure detection:

'Low' tone frequency deviation from

0.5 10.0 ms

8.0 45.0 ms

3

55.0 ms

±20 Hz

nominal
'High' tone frequency deviation from

±30 Hz

nominal
Tone level of each simultaneously

4 -40.0 -2.2 dBV

applied tone
2750Hz tone level with respect to

2130Hz

-7.0 7.0 dB

tone level
Signal to Noise ratio 5 20.0 dB
Dual Tone Burst Duration for DET output 75 ms

Dual Tone Burst Duration to ensure

IRQ

75 85 ms

goes low

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Calling Line Identifier/Calling Line Identifier on Call Waiting 19 CMX602A PRELIMINARY INFORMATION

Notes Min. Typ. Max. Units

To ensure non-detection:

'Low' tone frequency deviation from

6

±75 Hz

nominal
'High' tone frequency deviation from

±95 Hz

nominal
Level (total) 4 -46.0 dBV
Dual Tone Burst Duration 45.0 ms

FSK Receiver

Transmission rate 1188 1200 1212 Baud
V23 Mark (logic 1) frequency 1280 1300 1320 Hz
V23 Space (logic 0) frequency 2068 2100 2132 Hz
Bell202 Mark (logic 1) frequency 1188 1200 1212 Hz
Bell202 Space (logic 0) frequency 2178 2200 2222 Hz
Valid input level range 4 -40.0 -8.0 dBV
Acceptable twist (mark level with respect

to space level)

V23 -7.0 7.0 dB
Bell202 -10.0 10.0 dB

Acceptable Signal to Noise ratio

V23 5 20.0 dB

Bell202 5 30.0 dB
Level Detector 'on' threshold level 4 -40.0 dBV
Level Detector 'off' to 'on' time (t

DFON

25.0 ms

Figure 6)
Level Detector 'on' to 'off' time

(t

DFOFF

Figure 6)

8.0 ms

Input Signal Amplifier

Input impedance 7 10.0

M

:

Voltage gain 500 V/V

XTAL Input

'High' pulse width 8 100 ns
'Low' pulse width 8 100 ns

Operating Characteristics Notes:

1. At 25qC, not including any current drawn from the CMX602A pins by external circuitry other than X1, C1,
and C2.

2. RD, MODE, RXCLK inputs at V

, ZP input at VDD. See Figure 17.

SS

3. All conditions must be met to ensure detection.

4. For V
in Section 3. The internal threshold levels are proportional to V

= 5.0V with equal level tones and with the input signal amplifier external components as shown

DD

. For other supply voltages or different

DD

signal level ranges the voltage gain of the input signal amplifier should be adjusted by selecting the
appropriate external components as described in Section 4.2

5. Flat Noise in the 300Hz-3400Hz band for V23 and 200Hz-3200Hz for Bell202.

6. Meeting any of these conditions will ensure non-detection.

7. Open loop, small signal, low frequency measurements.

8. Timing for an external input to the XTAL pin.

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Calling Line Identifier/Calling Line Identifier on Call Waiting 20 CMX602A PRELIMINARY INFORMATION

4

3.5
3

Vt

HI

2.5

V

IN

1.5

2

Vt

LO

(Volts)

1

0.5
0

33.544.555.5

V

DD

(Volts)

µA

0.01

0.001

0.0001

Figure 16: Schmitt Trigger typical input voltage thresholds vs. V

DD

10

1

0.1

-40-30-20-100 1020304050607080
Temperature °C

Figure 17: Typical 'Zero-Power' IDD vs. Temperature (VDD = 5.0V)

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Calling Line Identifier/Calling Line Identifier on Call Waiting 21 CMX602A PRELIMINARY INFORMATION

6.2 Packaging

PackageTolerances

TYP.

0.041 (1.04)

0.050 (1.27)

45°
0° 10°
5°

MAX.MIN.

0.413 (10.49)

0.299 (7.59)

0.105 (2.67)0.093 (2.36)

0.419 (10.64)

0.020 (0.51)0.003 (0.08)

0.050 (1.27)

5°

7°

ALTERNATIVE

PIN
LOCATION
MARKING

Y

H

PIN 1

J

A

B

E

Z

W

L

T

X

DIM.

0.395 (10.03)

A

0.286 (7.26)

B
C

0.390 (9.90)

E

H

0.013 (0.33) 0.020 (0.51)

J

K

0.016 (0.41)

L

P

0.009 (0.23) 0.0125 (0.32)

T

W

K

C

P

X
Y

Z

NOTE: All dimensio ns in inches (mm.)

Angles are in degrees

Figure 18 : 16-pin SOIC Mechanical Outline:

A

B

E1

Y

T

K

PIN 1

C

H

L

P

J1

J

Figure 19 : 16-pin PDIP Mechanical Outline:

Order as part no. CMX602AD4

PackageTolerances

DIM.

A

0.740 (18.80)

B

E

0.240 (6.10)

0.135 (3.43)

C

0.300 (7.62)

E

0.290 (7.37) 0.325 (8.26)

E1

0.015 (0.38) 0.070 (1.77)

H

0.014 (0.35) 0.023 (0.58)

J

0.040 (1.02) 0.065 (1.65)

J1

0.056 (1.42) 0.064 (1.63)

K

0.121 (3.07)

L
P

0.008 (0.20) 0.015 (0.38)

T
Y

NOTE: All dimensio ns in inches (mm.)

Angles are in degrees

Order as part no. CMX602AP3

TYP. MAX.MIN.

0.810 (20.57)

0.262 (6.63)

0.200 (5.06)

0.390 (9.91).

0.150 (3.81)

0.100 (2.54)

7°

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