Double Conversion Super-Heterodyne
Receiver and FM/FSK Demodulator
•
LNA with Switched Gain
•
High Performance UHF Down-Converter
Stage with Integrated VCO
•
2.7V Operation
•
Zero-Power Mode (<10µA)
•
Temperature Compensated RSSI
•
28-Pin SSOP Package
GAINSEL
ST
1DOWN
CONVERTER
TAN K
VCO
BUFFERED
OSCILLATOR
OUTPUT
OSCOUT OSCBA OSCEM
CONVERTER
ND
2DOWN
•
High Performance Analog/Digital
Radio Links (860-965MHz)
•
General ISM 915MHz Band
•
Analog/Digital Cordless Phones
•
Spread Spectrum Receivers
•
Analog FM Receivers
•
Handheld Data Terminals
•
SO-HO Wireless Data Links
ENABLE
BANDGAP
& BIAS
CONTROL
IF LIMITING
AMPLIFIER
ADVANCE INFORMATION
RSSI
LNAIN
FM/FSK
DISCRIMINATOR
LNA
LNADEC
50W
MIX1IN
MIX1OUT
100W100W50W430W
MIX2OUT
MIX2IN
LIMIN
LIMDEC1
430W
LIMOUTQUADINLIMDEC2LNAOUT
50W
DETOUT
The CMX018 is a single chip UHF FM/FSK double-conversion super-heterodyne receiver. It combines a dual
gain mode Low Noise Amplifier (LNA), two down-converters (including integrated oscillators), limiting
amplifier, RSSI, FM/FSK demodulator and zero-power mode control.
The CMX018 can be used in conjunction with the CMX017, an integrated FM/FSK modulator and transmitter,
to implement a complete UHF radio link.
The CMX018 operates from a 2.7V to 3.3V power supply and is available in the following package style:
28-pin SSOP (CMX018D6).
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USAAll trademarks and service marks are held by their respective companies.
UHF FM/FSK Receiver4CMX018 Advance Information
2 Signal List
Pin No.Signal
Description
Package D6NameType
1LNAINinputLNA RF Input
2GNDgroundLNA Ground connection
3LNAOUToutputLNA RF Output
4GNDgroundLNA Ground connection
5MIX1INinputRF Input to the First Down-Converter
6MIX1OUToutputIF Output from the First Down-Converter
7GNDgroundFirst Down-Converter Ground connection
8MIX2INinputRF Input to the Second Down-Converter
9MIX2OUToutputIF Output from the Second Down-Converter
10GNDgroundSecond Down-Converter, Limiting Amplifier, RSSI, and
Demodulator stages - Ground connection
11LIMINinputInput to the Limiting Amplifier
12LIMDEC1input
13LIMDEC2input
External Decoupling capacitors – one required at each limiting
Amplifier Inputs
14RSSIoutputReceive Signal Strength Indicator output
15QUADINinputQuadrature input to the FM Demodulator
16LIMOUToutputOutput from the Limiting Amplifier
17Vcc3powerPower supply to the Second Down-Converter, Limiting Amplifier,
RSSI and Demodulator stages – nominally 3.0V
18DETOUToutputOutput of the FM/FSK Quadrature Demodulator
19OSCEM
Emitter connection to the Second Down-Converter Local Oscillator
transistor
20OSCBABase connection to the Second Down-Converter Local Oscillator
transistor
21OSCOUToutput
Buffered Local Oscillator (Open-Collector) output from the First
25VCC1powerLNA Power Supply – nominally 3.0V
26LNADECExternal LNA bias decoupling capacitor
27GAINSELCMOS inputLNA Gain control logic input. A logic ‘0’ provides a typical power
gain of 16dB and a logic ‘1’ provides an attenuation of 6dB
28ENABLECMOS inputZero-Power logic control. A logic ‘0’ powers down the device.
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USAAll trademarks and service marks are held by their respective companies.
UHF FM/FSK Receiver6CMX018 Advance Information
4 General Description
The CMX018 is a single chip UHF FM/FSK double-conversion super-heterodyne receiver. It combines a dual
gain mode Low Noise Amplifier (LNA), two down-converters (including integrated oscillators), limiting
amplifier, RSSI, FM/FSK demodulator and zero-power mode control.
The receiver frequency is selected using an external PLL or synthesizer, which is driven by the buffered RF
oscillator signal from the first down-converter.
The CMX018 can be used in conjunction with the CMX017, an integrated FM/FSK modulator and transmitter,
to implement a complete UHF radio link.
4.1 Low Noise Amplifier
The LNA includes a switched gain function, which is used to increase the dynamic range of the receiver. The
gain is selected using the GAINSEL logic input at pin 2. With a logic ‘0’ at the GAINSEL input a high gain is
selected and the amplifier achieves the lowest noise figure. This mode is used where maximum sensitivity is
required for low level input signals. Where high level signals are present at the receiver input, which cause
difficulties due to inter-modulation, the gain of the LNA can be reduced by typically 22dB from about +16dB to
about –6dB. The attenuation is selected by applying a logic ‘1’ at the GAINSEL input; this minimizes the
amount of non-linear distortion in the overall receiver at the expense of small signal sensitivity. The input and
output impedances of the LNA are typically 50Ω.
4.2 First Down-Converter
The first down-converter includes a double balanced mixer with a low noise pre-amplifier, and on-chip
oscillator components. The oscillator is configured as a ‘high-sided’ voltage controlled local oscillator, using
an external varicap diode and tank resonator circuit, such that the first IF is typically centered at 70MHz. A
buffered oscillator signal (OSCOUT at pin 21) is provided to drive the frequency synthesizer which controls
the frequency tuning. The input impedance is typically 50Ω and the output impedance is typically 100Ω.
4.3 Second Down-Converter
The second down-converter also includes a double balanced mixer with a low noise pre-amplifier, and on-chip
oscillator components. The oscillator is configured as a ‘low-sided’ local oscillator, using an external crystal at
typically 60MHz, such that the second IF is centered at 10.7MHz. The input impedance is typically 100Ω and
the output impedance is typically 430Ω.
4.4 Limiting Amplifier and RSSI
The limiting amplifier provides the IF amplification and limiting prior to the FM/FSK demodulator. An RSSI
circuit is included which has temperature compensation. An RF signal level of -100dBm at the LNA input will
produce an RSSI voltage of typically TBD mV. The RSSI voltage will increase with increasing RF input level
at a rate of 20mV/dB up to a typical voltage of TBD V at a -60dBm RF input. In practice the absolute RSSI
voltage will depend upon the insertion losses associated with each of the IF filters. The input impedance is
typically 430Ω.
4.5 FM/FSK Demodulator
A quadrature detector is employed together with an external discriminator and phase shift network to
demodulate the FM or FSK signal.
4.6 Zero-Power Mode
The device is powered down by applying a logic ‘0’ level at the ENABLE input (pin 28). In this mode the
device current is reduced to less than 10µA. This feature is useful when the device is operating within a
transceiver where the receiver needs to be enabled and disabled.
A delay should be allowed for the receiver to settle after power-up. This is likely to be less that the crystal
oscillator stabilization time, which may be altered by adjusting the value of R2, shown in Figure application.
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USAAll trademarks and service marks are held by their respective companies.
UHF FM/FSK Receiver7CMX018 Advance Information
5 Application Notes
5.1 General
Example Schematic and Layout
The following schematic (Figure 3) and printed circuit layout (Figure 4 and Figure 5) show a typical application
interface for the CMX018. To aid legibility, the schematic and layout are available electronically from the MXCOM website http://www.mxcom.com.
Alternative components and component values are shown on the schematic. These should be selected
according to the intended application. The schematic uses the following ICs:
Power Gain (GAINSEL = VCC)1, 3-6.0dB
Noise Figure1, 33.0dB
Input 1dB Gain Compression Point (GAINSEL = 0V)1-20dBm
Input 1dB Gain Compression Point (GAINSEL = VCC)116dBm
Input Third Order Intercept Point (GAINSEL = 0V)1-10dBm
Input Third Order Intercept Point (GAINSEL= VCC)125dBm
Reverse Isolation (GAINSEL = 0V)3, 1-35dB
Reverse Isolation (GAINSEL = VCC)3, 1-6.0dB
Input Impedance150
Output Impedance350
Input Return Loss (50Ω source)
Output Return Loss (50Ω load)
1
3
10
15
VCO to LNA Leakage1-45dBm
First Down Converter
(RF = 915MHz and IF = 70MHz)
Conversion Gain5, 615dB
Noise Figure5, 615dB
Input 1dB Gain Compression Point6-12dBm
Input Third Order Intercept Point6-4.0dBm
Input Impedance550
Output Impedance6100
Input Return Loss (50Ω source)
Output Return Loss (50Ω load)
5TBDdB
6TBDdB
Buffered oscillator output power21-10dBm
RF to IF Leakage5, 6TBDdB
LO to IF Leakage6TBDdBm
LO to RF Leakage5TBDdBm
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USAAll trademarks and service marks are held by their respective companies.
UHF FM/FSK Receiver13CMX018 Advance Information
6.2 Packaging
Figure 6: 28-Pin Plastic SSOP Mechanical Outline:
Order as part no. CMX018D6
6.3 Handling Precautions
This device is a high performance RF integrated circuit and is ESD sensitive.
Adequate precautions must be taken during handling and assembly of this device.